[igt-dev] [PATCH 1/2] i915/perf: add tests for triggered OA reports

[igt-dev] [PATCH 1/2] i915/perf: add tests for triggered OA reports

[Umesh Nerlige Ramappa]

From: Lionel G Landwerlin <lionel.g.landwerlin@intel.com>

By whitelisting a couple of registers we can allow an application
batch to trigger OA reports in the OA buffer by switching back & forth
an inverter on the condition logic.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
---
 tests/i915/perf.c | 254 +++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 252 insertions(+), 2 deletions(-)

diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 92edc9f1..eb38ea12 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -53,6 +53,8 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming interface");
 #define OAREPORT_REASON_SHIFT          19
 #define OAREPORT_REASON_TIMER          (1<<0)
 #define OAREPORT_REASON_INTERNAL       (3<<1)
+#define OAREPORT_REASON_TRIGGER1       (1<<1)
+#define OAREPORT_REASON_TRIGGER2       (1<<2)
 #define OAREPORT_REASON_CTX_SWITCH     (1<<3)
 #define OAREPORT_REASON_GO             (1<<4)
 #define OAREPORT_REASON_CLK_RATIO      (1<<5)
@@ -383,11 +385,17 @@ gen8_read_report_clock_ratios(uint32_t *report,
 	*unslice_freq_mhz = (unslice_freq * 16666) / 1000;
 }
 
+static uint32_t
+gen8_report_reason(const uint32_t *report)
+{
+	return ((report[0] >> OAREPORT_REASON_SHIFT) &
+		OAREPORT_REASON_MASK);
+}
+
 static const char *
 gen8_read_report_reason(const uint32_t *report)
 {
-	uint32_t reason = ((report[0] >> OAREPORT_REASON_SHIFT) &
-			   OAREPORT_REASON_MASK);
+	uint32_t reason = gen8_report_reason(report);
 
 	if (reason & (1<<0))
 		return "timer";
@@ -3118,6 +3126,241 @@ emit_stall_timestamp_and_rpc(struct intel_batchbuffer *batch,
 	emit_report_perf_count(batch, dst, report_dst_offset, report_id);
 }
 
+/* The following register all have the same layout. */
+#define OAREPORTTRIG2 (0x2744)
+#define   OAREPORTTRIG2_INVERT_A_0  (1 << 0)
+#define   OAREPORTTRIG2_INVERT_A_1  (1 << 1)
+#define   OAREPORTTRIG2_INVERT_A_2  (1 << 2)
+#define   OAREPORTTRIG2_INVERT_A_3  (1 << 3)
+#define   OAREPORTTRIG2_INVERT_A_4  (1 << 4)
+#define   OAREPORTTRIG2_INVERT_A_5  (1 << 5)
+#define   OAREPORTTRIG2_INVERT_A_6  (1 << 6)
+#define   OAREPORTTRIG2_INVERT_A_7  (1 << 7)
+#define   OAREPORTTRIG2_INVERT_A_8  (1 << 8)
+#define   OAREPORTTRIG2_INVERT_A_9  (1 << 9)
+#define   OAREPORTTRIG2_INVERT_A_10 (1 << 10)
+#define   OAREPORTTRIG2_INVERT_A_11 (1 << 11)
+#define   OAREPORTTRIG2_INVERT_A_12 (1 << 12)
+#define   OAREPORTTRIG2_INVERT_A_13 (1 << 13)
+#define   OAREPORTTRIG2_INVERT_A_14 (1 << 14)
+#define   OAREPORTTRIG2_INVERT_A_15 (1 << 15)
+#define   OAREPORTTRIG2_INVERT_B_0  (1 << 16)
+#define   OAREPORTTRIG2_INVERT_B_1  (1 << 17)
+#define   OAREPORTTRIG2_INVERT_B_2  (1 << 18)
+#define   OAREPORTTRIG2_INVERT_B_3  (1 << 19)
+#define   OAREPORTTRIG2_INVERT_C_0  (1 << 20)
+#define   OAREPORTTRIG2_INVERT_C_1  (1 << 21)
+#define   OAREPORTTRIG2_INVERT_D_0  (1 << 22)
+#define   OAREPORTTRIG2_THRESHOLD_ENABLE      (1 << 23)
+#define   OAREPORTTRIG2_REPORT_TRIGGER_ENABLE (1 << 31)
+#define OAREPORTTRIG6 (0x2754)
+#define GEN12_OAREPORTTRIG2 (0xd924)
+#define GEN12_OAREPORTTRIG6 (0xd934)
+
+static void
+emit_triggered_oa_report(struct intel_batchbuffer *batch,
+			 uint32_t trigger)
+{
+	/*
+	 * We have 2 trigger registers that each generate a different
+	 * report reason.
+	 */
+	static const uint32_t gen8_triggers[] = {
+		OAREPORTTRIG2,
+		OAREPORTTRIG6,
+	};
+	static const uint32_t gen12_triggers[] = {
+		GEN12_OAREPORTTRIG2,
+		GEN12_OAREPORTTRIG6,
+	};
+	const uint32_t *triggers = intel_gen(devid) >= 12 ? gen12_triggers : gen8_triggers;
+
+	assert(trigger <= 1);
+
+	BEGIN_BATCH(6, 0);
+	OUT_BATCH(MI_LOAD_REGISTER_IMM);
+	OUT_BATCH(triggers[trigger]);
+	OUT_BATCH(OAREPORTTRIG2_INVERT_C_1 |
+		  OAREPORTTRIG2_REPORT_TRIGGER_ENABLE);
+	OUT_BATCH(MI_LOAD_REGISTER_IMM);
+	OUT_BATCH(triggers[trigger]);
+	OUT_BATCH(OAREPORTTRIG2_INVERT_C_1 |
+		  OAREPORTTRIG2_INVERT_D_0 |
+		  OAREPORTTRIG2_REPORT_TRIGGER_ENABLE);
+	ADVANCE_BATCH();
+}
+
+static uint64_t
+rcs_timestmap_reg_read(int fd)
+{
+	struct drm_i915_reg_read rr = {
+		.offset = 0x2358 | I915_REG_READ_8B_WA, /* render ring timestamp */
+	};
+
+	do_ioctl(fd, DRM_IOCTL_I915_REG_READ, &rr);
+
+	return rr.val;
+}
+
+/*
+ * Verify that we can trigger OA reports into the OA buffer using
+ * MI_LRI.
+ */
+static void
+test_triggered_oa_reports(void)
+{
+	int oa_exponent = max_oa_exponent_for_period_lte(1000000);
+	uint64_t properties[] = {
+		DRM_I915_PERF_PROP_CTX_HANDLE, UINT64_MAX, /* updated below */
+
+		/* Note: we have to specify at least one sample property even
+		 * though we aren't interested in samples in this case
+		 */
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+
+		/* OA unit configuration */
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+		DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+		/* Note: no OA exponent specified in this case */
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = ARRAY_SIZE(properties) / 2,
+		.properties_ptr = to_user_pointer(properties),
+	};
+	struct drm_i915_perf_record_header *header;
+	drm_intel_bufmgr *bufmgr;
+	drm_intel_context *context;
+	struct igt_helper_process child = {};
+	struct intel_batchbuffer *batch;
+	struct igt_buf src[2], dst[2];
+	uint64_t timestamp32_mask = (1ull << 32) - 1;
+	uint64_t timestamps[2];
+	uint32_t buf_size = 16 * 1024 * 1024;
+	uint8_t *buf = malloc(buf_size);
+	uint32_t ctx_id;
+	int width = 800;
+	int height = 600;
+	uint32_t trigger_counts[2] = { 0, };
+	int ret;
+
+	do {
+		igt_fork_helper(&child) {
+			bufmgr = drm_intel_bufmgr_gem_init(drm_fd, 4096);
+			drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+
+			scratch_buf_init(bufmgr, &src[0], width, height, 0xff0000ff);
+			scratch_buf_init(bufmgr, &dst[0], width, height, 0x00ff00ff);
+			scratch_buf_init(bufmgr, &src[1], 2 * width, height, 0xff0000ff);
+			scratch_buf_init(bufmgr, &dst[1], 2 * width, height, 0x00ff00ff);
+
+			batch = intel_batchbuffer_alloc(bufmgr, devid);
+
+			context = drm_intel_gem_context_create(bufmgr);
+			igt_assert(context);
+
+			ret = drm_intel_gem_context_get_id(context, &ctx_id);
+			properties[1] = ctx_id;
+
+
+			timestamps[0] = rcs_timestmap_reg_read(drm_fd);
+
+			stream_fd = __perf_open(drm_fd, &param, false);
+
+			emit_triggered_oa_report(batch, 0);
+
+			render_copy(batch,
+				    context,
+				    &src[0], 0, 0, width, height,
+				    &dst[0], 0, 0);
+
+			emit_triggered_oa_report(batch, 0);
+
+			emit_triggered_oa_report(batch, 1);
+
+			render_copy(batch,
+				    context,
+				    &src[1], 0, 0, 2 * width, height,
+				    &dst[1], 0, 0);
+
+			emit_triggered_oa_report(batch, 1);
+
+			intel_batchbuffer_flush_with_context(batch, context);
+
+			timestamps[1] = rcs_timestmap_reg_read(drm_fd);
+
+			if (timestamps[1] < timestamps[0] ||
+			    (timestamps[1] & timestamp32_mask) < (timestamps[1] & timestamp32_mask)) {
+				igt_debug("Timestamp rollover, trying again\n");
+				exit(EAGAIN);
+			}
+
+			ret = i915_read_reports_until_timestamp(test_set->perf_oa_format,
+								buf, buf_size,
+								timestamps[0] & timestamp32_mask,
+								timestamps[1] & timestamp32_mask);
+
+			for (size_t offset = 0; offset < ret; offset += header->size) {
+				uint32_t *report;
+
+				header = (void *)(buf + offset);
+
+				igt_assert_eq(header->pad, 0); /* Reserved */
+
+				igt_assert_neq(header->type, DRM_I915_PERF_RECORD_OA_BUFFER_LOST);
+
+				if (header->type == DRM_I915_PERF_RECORD_OA_REPORT_LOST)
+					continue;
+
+				/* Currently the only other record type expected is a
+				 * _SAMPLE. Notably this test will need updating if
+				 * i915-perf is extended in the future with additional
+				 * record types.
+				 */
+				igt_assert_eq(header->type, DRM_I915_PERF_RECORD_SAMPLE);
+
+				report = (void *)(header + 1);
+
+				igt_debug("report ts=0x%08x hw_id=0x%08x reason=%s\n",
+					  report[1], report[2],
+					  gen8_read_report_reason(report));
+
+				if (gen8_report_reason(report) & OAREPORT_REASON_TRIGGER1) {
+					igt_assert_eq(trigger_counts[1], 0);
+					trigger_counts[0]++;
+				}
+				if (gen8_report_reason(report) & OAREPORT_REASON_TRIGGER2) {
+					igt_assert_eq(trigger_counts[0], 2);
+					trigger_counts[1]++;
+				}
+			}
+
+			igt_assert_eq(trigger_counts[0], 2);
+			igt_assert_eq(trigger_counts[1], 2);
+
+			for (int i = 0; i < ARRAY_SIZE(src); i++) {
+				drm_intel_bo_unreference(src[i].bo);
+				drm_intel_bo_unreference(dst[i].bo);
+			}
+
+			intel_batchbuffer_free(batch);
+			drm_intel_gem_context_destroy(context);
+			drm_intel_bufmgr_destroy(bufmgr);
+			__perf_close(stream_fd);
+		}
+
+		ret = igt_wait_helper(&child);
+
+		igt_assert(WEXITSTATUS(ret) == EAGAIN ||
+			   WEXITSTATUS(ret) == 0);
+
+	} while (WEXITSTATUS(ret) == EAGAIN);
+
+	free(buf);
+}
+
 /* Tests the INTEL_performance_query use case where an unprivileged process
  * should be able to configure the OA unit for per-context metrics (for a
  * context associated with that process' drm file descriptor) and the counters
@@ -5096,6 +5339,13 @@ igt_main
 	igt_subtest("whitelisted-registers-userspace-config")
 		test_whitelisted_registers_userspace_config();
 
+	igt_describe("Verify that triggered reports work");
+	igt_subtest("triggered-oa-reports") {
+		igt_require(intel_gen(devid) >= 8);
+		igt_require(i915_perf_revision(drm_fd) >= 6);
+		test_triggered_oa_reports();
+	}
+
 	igt_fixture {
 		/* leave sysctl options in their default state... */
 		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
-- 
2.20.1

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[igt-dev] [PATCH 2/2] i915/perf: Sanity check reports in mapped OA buffer

[Umesh Nerlige Ramappa]

For applications that need a faster way to access reports in the OA
buffer, i915 now provides a way to map the OA buffer to privileged user
space. Add a test to sanity check reports in the mapped OA buffer.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 include/drm-uapi/i915_drm.h |  32 +++++
 tests/i915/perf.c           | 241 ++++++++++++++++++++++++++++++++++++
 2 files changed, 273 insertions(+)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 2b55af13..f7523d55 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -2048,6 +2048,38 @@ struct drm_i915_perf_open_param {
  */
 #define I915_PERF_IOCTL_CONFIG	_IO('i', 0x2)
 
+/**
+ * Returns OA buffer properties to be used with mmap.
+ *
+ * This ioctl is available in perf revision 6.
+ */
+#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
+
+/**
+ * OA buffer size and offset.
+ */
+struct drm_i915_perf_oa_buffer_info {
+	__u32 size;
+	__u32 offset;
+	__u64 reserved[4];
+};
+
+/**
+ * Returns current position of OA buffer head and tail.
+ *
+ * This ioctl is available in perf revision 6.
+ */
+#define I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL _IO('i', 0x4)
+
+/**
+ * OA buffer head and tail.
+ */
+struct drm_i915_perf_oa_buffer_head_tail {
+	__u32 head;
+	__u32 tail;
+	__u64 reserved[4];
+};
+
 /**
  * Common to all i915 perf records
  */
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index eb38ea12..b7aa1596 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -206,6 +206,7 @@ static struct intel_perf *intel_perf = NULL;
 static struct intel_perf_metric_set *test_set = NULL;
 static bool *undefined_a_counters;
 static uint64_t oa_exp_1_millisec;
+struct intel_mmio_data mmio_data;
 
 static igt_render_copyfunc_t render_copy = NULL;
 static uint32_t (*read_report_ticks)(uint32_t *report,
@@ -5011,6 +5012,220 @@ test_whitelisted_registers_userspace_config(void)
 	i915_perf_remove_config(drm_fd, config_id);
 }
 
+#define OA_BUFFER_DATA(tail, head, oa_buffer_size) \
+	(((tail) - (head)) & ((oa_buffer_size) - 1))
+
+#ifndef MAP_FAILED
+#define MAP_FAILED ((void *)-1)
+#endif
+
+static uint32_t oa_status_reg(void)
+{
+	if (IS_HASWELL(devid))
+		return intel_register_read(&mmio_data, 0x2346) & 0x7;
+	else if (IS_GEN12(devid))
+		return intel_register_read(&mmio_data, 0xdafc) & 0x7;
+	else
+		return intel_register_read(&mmio_data, 0x2b08) & 0xf;
+}
+
+static void invalid_map_oa_buffer(void)
+{
+	struct drm_i915_perf_oa_buffer_info oa_buffer;
+	void *oa_vaddr = NULL;
+
+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO, &oa_buffer);
+
+	igt_debug("size        = %d\n", oa_buffer.size);
+	igt_debug("offset      = %x\n", oa_buffer.offset);
+
+	igt_assert_eq(oa_buffer.size & (oa_buffer.size - 1), 0);
+
+	/* try a couple invalid mmaps */
+	/* bad offsets */
+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 0);
+	igt_assert(oa_vaddr == MAP_FAILED);
+
+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 8192);
+	igt_assert(oa_vaddr == MAP_FAILED);
+
+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 11);
+	igt_assert(oa_vaddr == MAP_FAILED);
+
+	/* bad size */
+	oa_vaddr = mmap(0, oa_buffer.size + 1, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
+	igt_assert(oa_vaddr == MAP_FAILED);
+
+	/* do the right thing */
+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
+	igt_assert(oa_vaddr != NULL);
+
+	munmap(oa_vaddr, oa_buffer.size);
+}
+
+static void *map_oa_buffer(uint32_t *size)
+{
+	struct drm_i915_perf_oa_buffer_info oa_buffer;
+	void *vaddr;
+
+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO, &oa_buffer);
+
+	igt_debug("size        = %d\n", oa_buffer.size);
+	igt_debug("offset      = %x\n", oa_buffer.offset);
+
+	igt_assert_eq(oa_buffer.size & (oa_buffer.size - 1), 0);
+	igt_assert_eq(oa_status_reg(), 0);
+
+	vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
+	igt_assert(vaddr != NULL);
+
+	*size = oa_buffer.size;
+
+	return vaddr;
+}
+
+static void unmap_oa_buffer(void *addr, uint32_t size)
+{
+	munmap(addr, size);
+}
+
+static void check_reports(void *oa_vaddr, uint32_t oa_size)
+{
+	struct drm_i915_perf_oa_buffer_head_tail oa_ht;
+	struct oa_format format = get_oa_format(test_set->perf_oa_format);
+	size_t report_size = format.size;
+	uint8_t *reports;
+	uint32_t *report0, *report1;
+	uint32_t num_reports, timer_reports = 0;
+	int i;
+
+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL, &oa_ht);
+
+	igt_debug("head = %x\n", oa_ht.head);
+	igt_debug("tail = %x\n", oa_ht.tail);
+
+	reports = (uint8_t *) (oa_vaddr + oa_ht.head);
+
+	num_reports = OA_BUFFER_DATA(oa_ht.tail,
+				     oa_ht.head,
+				     oa_size) / report_size;
+
+	for (i = 0; i < num_reports; i++) {
+		report1 = (uint32_t *)(reports + (i * report_size));
+		if (!oa_report_is_periodic(oa_exp_1_millisec, report1))
+			continue;
+
+		timer_reports++;
+		if (timer_reports >= 2)
+			sanity_check_reports(report0, report1,
+					     test_set->perf_oa_format);
+
+		report0 = report1;
+	}
+}
+
+static void check_reports_from_mapped_buffer(void)
+{
+	void *vaddr;
+	uint32_t size;
+	uint32_t period_us = oa_exponent_to_ns(oa_exp_1_millisec) / 1000;
+
+	vaddr = map_oa_buffer(&size);
+
+	/* wait for approx 100 reports */
+	usleep(100 * period_us);
+
+	check_reports(vaddr, size);
+
+	unmap_oa_buffer(vaddr, size);
+}
+
+static void try_to_map_oa_buffer(void)
+{
+	struct drm_i915_perf_oa_buffer_info oa_buffer;
+	struct drm_i915_perf_oa_buffer_head_tail oa_ht;
+	void *oa_vaddr;
+
+	igt_info("Mapping OA buffer as non-privileged user\n");
+
+	do_ioctl_err(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO,
+		     &oa_buffer, EACCES);
+
+	do_ioctl_err(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL,
+		     &oa_ht, EACCES);
+
+	oa_vaddr = mmap(0, 4096, PROT_READ, MAP_PRIVATE, stream_fd, 4096);
+	igt_assert(oa_vaddr == MAP_FAILED);
+	igt_assert_eq(errno, EACCES);
+
+	igt_info("Access denied to map oa buffer as expected\n");
+}
+
+static void test_unprivileged_map_oa_buffer(void)
+{
+	igt_fork(child, 1) {
+		igt_drop_root();
+		try_to_map_oa_buffer();
+	}
+	igt_waitchildren();
+}
+
+static void test_mapped_oa_buffer(void (*test_with_fd_open)(void))
+{
+	uint64_t properties[] = {
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+		DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
+
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+
+	stream_fd = __perf_open(drm_fd, &param, false);
+
+	igt_assert(test_with_fd_open);
+	test_with_fd_open();
+
+	__perf_close(stream_fd);
+}
+
+static void close_fd_and_access_oa_buffer(void)
+{
+	uint64_t properties[] = {
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+		DRM_I915_PERF_PROP_OA_FORMAT, test_set->perf_oa_format,
+		DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
+
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+	void *vaddr;
+	uint32_t size;
+	uint32_t report_id;
+	uint32_t period_us = oa_exponent_to_ns(oa_exp_1_millisec) / 1000;
+
+	stream_fd = __perf_open(drm_fd, &param, false);
+
+	vaddr = map_oa_buffer(&size);
+	/* wait for approx 100 reports */
+	usleep(100 * period_us);
+	check_reports(vaddr, size);
+	unmap_oa_buffer(vaddr, size);
+
+	__perf_close(stream_fd);
+
+	report_id = *((uint32_t *)((uint8_t *)vaddr + 4096));
+
+}
+
 static unsigned
 read_i915_module_ref(void)
 {
@@ -5179,6 +5394,9 @@ igt_main
 
 		render_copy = igt_get_render_copyfunc(devid);
 		igt_require_f(render_copy, "no render-copy function\n");
+
+		intel_register_access_init(&mmio_data, intel_get_pci_device(),
+					   0, drm_fd);
 	}
 
 	igt_subtest("non-system-wide-paranoid")
@@ -5346,6 +5564,28 @@ igt_main
 		test_triggered_oa_reports();
 	}
 
+	igt_subtest_group {
+		igt_fixture {
+			igt_require(i915_perf_revision(drm_fd) >= 8);
+		}
+
+		igt_describe("Verify mapping of oa buffer");
+		igt_subtest("map-oa-buffer")
+			test_mapped_oa_buffer(check_reports_from_mapped_buffer);
+
+		igt_describe("Verify invalid mappings of oa buffer");
+		igt_subtest("invalid-map-oa-buffer")
+			test_mapped_oa_buffer(invalid_map_oa_buffer);
+
+		igt_describe("Verify if non-privileged user can map oa buffer");
+		igt_subtest("non-privileged-map-oa-buffer")
+			test_mapped_oa_buffer(test_unprivileged_map_oa_buffer);
+
+		igt_describe("Close FD and access oa buffer");
+		igt_subtest("close-fd-and-access-oa-buffer")
+			close_fd_and_access_oa_buffer();
+	}
+
 	igt_fixture {
 		/* leave sysctl options in their default state... */
 		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
@@ -5354,6 +5594,7 @@ igt_main
 		if (intel_perf)
 			intel_perf_free(intel_perf);
 
+		intel_register_access_fini(&mmio_data);
 		close(drm_fd);
 	}
 }
-- 
2.20.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [1/2] i915/perf: add tests for triggered OA reports

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 6534 bytes --]

== Series Details ==

Series: series starting with [1/2] i915/perf: add tests for triggered OA reports
URL   : https://patchwork.freedesktop.org/series/79695/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8768 -> IGTPW_4782
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html

Known issues
------------

  Here are the changes found in IGTPW_4782 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload:
    - fi-byt-j1900:       [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-byt-j1900/igt@i915_module_load@reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-byt-j1900/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-bsw-kefka:       [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_selftest@live@coherency:
    - fi-gdg-551:         [PASS][5] -> [DMESG-FAIL][6] ([i915#1748])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-gdg-551/igt@i915_selftest@live@coherency.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-gdg-551/igt@i915_selftest@live@coherency.html

  * igt@i915_selftest@live@gt_lrc:
    - fi-tgl-u2:          [PASS][7] -> [DMESG-FAIL][8] ([i915#1233])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-tgl-u2/igt@i915_selftest@live@gt_lrc.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
    - fi-tgl-u2:          [PASS][9] -> [DMESG-WARN][10] ([i915#402])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html

  * igt@vgem_basic@setversion:
    - fi-tgl-y:           [PASS][11] -> [DMESG-WARN][12] ([i915#402]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-tgl-y/igt@vgem_basic@setversion.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-tgl-y/igt@vgem_basic@setversion.html

  
#### Possible fixes ####

  * igt@gem_mmap@basic:
    - fi-tgl-y:           [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-tgl-y/igt@gem_mmap@basic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-tgl-y/igt@gem_mmap@basic.html

  * igt@i915_module_load@reload:
    - fi-icl-y:           [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-icl-y/igt@i915_module_load@reload.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-icl-y/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@blt:
    - fi-snb-2600:        [DMESG-FAIL][17] -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-snb-2600/igt@i915_selftest@live@blt.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-snb-2600/igt@i915_selftest@live@blt.html

  * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
    - fi-icl-u2:          [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1.html

  
#### Warnings ####

  * igt@i915_pm_rpm@module-reload:
    - fi-kbl-x1275:       [DMESG-FAIL][21] ([i915#62]) -> [SKIP][22] ([fdo#109271])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-kbl-x1275/igt@i915_pm_rpm@module-reload.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-kbl-x1275:       [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][24] ([i915#62] / [i915#92]) +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-kbl-x1275:       [DMESG-WARN][25] ([i915#62] / [i915#92]) -> [DMESG-WARN][26] ([i915#62] / [i915#92] / [i915#95]) +1 similar issue
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1233]: https://gitlab.freedesktop.org/drm/intel/issues/1233
  [i915#1748]: https://gitlab.freedesktop.org/drm/intel/issues/1748
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (46 -> 40)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5741 -> IGTPW_4782

  CI-20190529: 20190529
  CI_DRM_8768: cc11fe21674f094e902748b09efa4e87c8be434b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4782: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html
  IGT_5741: 96a8c8c1371995b73916989880b29b01f5657ba3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@perf@close-fd-and-access-oa-buffer
+igt@perf@invalid-map-oa-buffer
+igt@perf@map-oa-buffer
+igt@perf@non-privileged-map-oa-buffer
+igt@perf@triggered-oa-reports

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html

[-- Attachment #1.2: Type: text/html, Size: 8335 bytes --]

[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [1/2] i915/perf: add tests for triggered OA reports

[Patchwork]

[-- Attachment #1.1: Type: text/plain, Size: 20163 bytes --]

== Series Details ==

Series: series starting with [1/2] i915/perf: add tests for triggered OA reports
URL   : https://patchwork.freedesktop.org/series/79695/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8768_full -> IGTPW_4782_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_4782_full:

### IGT changes ###

#### Possible regressions ####

  * {igt@perf@close-fd-and-access-oa-buffer} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][1] +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb2/igt@perf@close-fd-and-access-oa-buffer.html

  * {igt@perf@triggered-oa-reports} (NEW):
    - shard-tglb:         NOTRUN -> [SKIP][2] +3 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb3/igt@perf@triggered-oa-reports.html

  
New tests
---------

  New tests have been introduced between CI_DRM_8768_full and IGTPW_4782_full:

### New IGT tests (5) ###

  * igt@perf@close-fd-and-access-oa-buffer:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  * igt@perf@invalid-map-oa-buffer:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  * igt@perf@map-oa-buffer:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  * igt@perf@non-privileged-map-oa-buffer:
    - Statuses :
    - Exec time: [None] s

  * igt@perf@triggered-oa-reports:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in IGTPW_4782_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_whisper@basic-queues-priority-all:
    - shard-glk:          [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk7/igt@gem_exec_whisper@basic-queues-priority-all.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk3/igt@gem_exec_whisper@basic-queues-priority-all.html

  * igt@i915_module_load@reload:
    - shard-tglb:         [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb8/igt@i915_module_load@reload.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb8/igt@i915_module_load@reload.html

  * igt@kms_color@pipe-a-legacy-gamma:
    - shard-apl:          [PASS][7] -> [FAIL][8] ([fdo#108145] / [i915#1635] / [i915#71])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-apl7/igt@kms_color@pipe-a-legacy-gamma.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-apl8/igt@kms_color@pipe-a-legacy-gamma.html
    - shard-kbl:          [PASS][9] -> [FAIL][10] ([fdo#108145] / [i915#71])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl6/igt@kms_color@pipe-a-legacy-gamma.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl2/igt@kms_color@pipe-a-legacy-gamma.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#49])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk7/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk5/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc:
    - shard-tglb:         [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb7/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb7/igt@kms_frontbuffer_tracking@psr-rgb565-draw-mmap-wc.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
    - shard-kbl:          [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html

  * igt@kms_psr2_su@page_flip:
    - shard-tglb:         [PASS][17] -> [SKIP][18] ([i915#1911])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb5/igt@kms_psr2_su@page_flip.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb7/igt@kms_psr2_su@page_flip.html

  * igt@kms_vblank@pipe-c-wait-forked-hang:
    - shard-hsw:          [PASS][19] -> [TIMEOUT][20] ([i915#1958] / [i915#2119])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw4/igt@kms_vblank@pipe-c-wait-forked-hang.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw1/igt@kms_vblank@pipe-c-wait-forked-hang.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-apl:          [PASS][21] -> [TIMEOUT][22] ([i915#1635] / [i915#1958] / [i915#2119])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-apl7/igt@perf@gen8-unprivileged-single-ctx-counters.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-apl4/igt@perf@gen8-unprivileged-single-ctx-counters.html
    - shard-glk:          [PASS][23] -> [TIMEOUT][24] ([i915#1958] / [i915#2119])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk3/igt@perf@gen8-unprivileged-single-ctx-counters.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk7/igt@perf@gen8-unprivileged-single-ctx-counters.html
    - shard-iclb:         [PASS][25] -> [TIMEOUT][26] ([i915#1958] / [i915#2119])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-iclb8/igt@perf@gen8-unprivileged-single-ctx-counters.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb4/igt@perf@gen8-unprivileged-single-ctx-counters.html
    - shard-kbl:          [PASS][27] -> [TIMEOUT][28] ([i915#1958] / [i915#2119])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl6/igt@perf@gen8-unprivileged-single-ctx-counters.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl6/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf@polling-parameterized:
    - shard-iclb:         [PASS][29] -> [FAIL][30] ([i915#1542])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-iclb1/igt@perf@polling-parameterized.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb6/igt@perf@polling-parameterized.html

  * igt@perf@rc6-disable:
    - shard-iclb:         [PASS][31] -> [TIMEOUT][32] ([i915#2119])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-iclb2/igt@perf@rc6-disable.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb1/igt@perf@rc6-disable.html
    - shard-hsw:          [PASS][33] -> [TIMEOUT][34] ([i915#2119])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw6/igt@perf@rc6-disable.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw6/igt@perf@rc6-disable.html
    - shard-kbl:          [PASS][35] -> [TIMEOUT][36] ([i915#2119])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl1/igt@perf@rc6-disable.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl4/igt@perf@rc6-disable.html
    - shard-apl:          [PASS][37] -> [TIMEOUT][38] ([i915#1635] / [i915#2119])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-apl6/igt@perf@rc6-disable.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-apl6/igt@perf@rc6-disable.html
    - shard-tglb:         [PASS][39] -> [TIMEOUT][40] ([i915#2119])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb6/igt@perf@rc6-disable.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb6/igt@perf@rc6-disable.html
    - shard-glk:          [PASS][41] -> [TIMEOUT][42] ([i915#2119])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk9/igt@perf@rc6-disable.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk1/igt@perf@rc6-disable.html

  * igt@perf_pmu@semaphore-busy@rcs0:
    - shard-kbl:          [PASS][43] -> [FAIL][44] ([i915#1820])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl2/igt@perf_pmu@semaphore-busy@rcs0.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl7/igt@perf_pmu@semaphore-busy@rcs0.html

  
#### Possible fixes ####

  * igt@gem_exec_reloc@basic-concurrent0:
    - shard-glk:          [FAIL][45] ([i915#1930]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk7/igt@gem_exec_reloc@basic-concurrent0.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk6/igt@gem_exec_reloc@basic-concurrent0.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-glk:          [DMESG-WARN][47] ([i915#118] / [i915#95]) -> [PASS][48] +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk9/igt@gem_exec_schedule@smoketest-all.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk6/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_userptr_blits@unsync-unmap-cycles:
    - shard-tglb:         [INCOMPLETE][49] ([i915#2045]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb7/igt@gem_userptr_blits@unsync-unmap-cycles.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb2/igt@gem_userptr_blits@unsync-unmap-cycles.html

  * igt@kms_addfb_basic@invalid-set-prop:
    - shard-tglb:         [DMESG-WARN][51] ([i915#402]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb3/igt@kms_addfb_basic@invalid-set-prop.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb6/igt@kms_addfb_basic@invalid-set-prop.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-0:
    - shard-glk:          [DMESG-FAIL][53] ([i915#118] / [i915#95]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk8/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk3/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
    - shard-hsw:          [INCOMPLETE][55] ([CI#80]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw2/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw2/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-tglb:         [FAIL][57] ([IGT#5]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb5/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb1/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
    - shard-glk:          [DMESG-WARN][59] ([i915#1982]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-glk6/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-glk3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1:
    - shard-apl:          [FAIL][61] ([i915#1635] / [i915#79]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-kbl:          [DMESG-WARN][63] ([i915#180]) -> [PASS][64] +9 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl4/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-hdmi-a1:
    - shard-hsw:          [INCOMPLETE][65] ([i915#2055]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw6/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw1/igt@kms_flip@flip-vs-suspend@c-hdmi-a1.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-tglb:         [DMESG-WARN][67] ([i915#1982]) -> [PASS][68] +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-tglb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_lease@multimaster-lease:
    - shard-hsw:          [TIMEOUT][69] ([i915#1958] / [i915#2119]) -> [PASS][70] +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw1/igt@kms_lease@multimaster-lease.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw2/igt@kms_lease@multimaster-lease.html
    - shard-snb:          [TIMEOUT][71] ([i915#1958] / [i915#2119]) -> [PASS][72] +2 similar issues
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-snb4/igt@kms_lease@multimaster-lease.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-snb5/igt@kms_lease@multimaster-lease.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [SKIP][73] ([fdo#109441]) -> [PASS][74] +2 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-iclb7/igt@kms_psr@psr2_no_drrs.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb2/igt@kms_psr@psr2_no_drrs.html

  
#### Warnings ####

  * igt@kms_atomic_transition@6x-modeset-transitions-nonblocking-fencing:
    - shard-hsw:          [SKIP][75] ([fdo#109271]) -> [TIMEOUT][76] ([i915#1958] / [i915#2119]) +1 similar issue
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw1/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking-fencing.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw1/igt@kms_atomic_transition@6x-modeset-transitions-nonblocking-fencing.html

  * igt@kms_color_chamelium@pipe-b-gamma:
    - shard-hsw:          [SKIP][77] ([fdo#109271] / [fdo#111827]) -> [TIMEOUT][78] ([i915#1958] / [i915#2119])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw1/igt@kms_color_chamelium@pipe-b-gamma.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw1/igt@kms_color_chamelium@pipe-b-gamma.html
    - shard-snb:          [SKIP][79] ([fdo#109271] / [fdo#111827]) -> [TIMEOUT][80] ([i915#1958] / [i915#2119])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-snb6/igt@kms_color_chamelium@pipe-b-gamma.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-snb1/igt@kms_color_chamelium@pipe-b-gamma.html

  * igt@kms_content_protection@atomic:
    - shard-kbl:          [TIMEOUT][81] ([i915#1319] / [i915#2119]) -> [TIMEOUT][82] ([i915#1319] / [i915#1958] / [i915#2119])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-kbl3/igt@kms_content_protection@atomic.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-kbl4/igt@kms_content_protection@atomic.html

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][83] ([fdo#109349]) -> [DMESG-WARN][84] ([i915#1226])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
    - shard-hsw:          [TIMEOUT][85] ([i915#1958] / [i915#2119]) -> [SKIP][86] ([fdo#109271])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-hsw1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-hsw6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
    - shard-snb:          [TIMEOUT][87] ([i915#1958] / [i915#2119]) -> [SKIP][88] ([fdo#109271])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-snb4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-snb1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html

  * igt@kms_vblank@pipe-c-wait-forked-hang:
    - shard-snb:          [SKIP][89] ([fdo#109271]) -> [TIMEOUT][90] ([i915#1958] / [i915#2119]) +2 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8768/shard-snb2/igt@kms_vblank@pipe-c-wait-forked-hang.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/shard-snb1/igt@kms_vblank@pipe-c-wait-forked-hang.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820
  [i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
  [i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930
  [i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2045]: https://gitlab.freedesktop.org/drm/intel/issues/2045
  [i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055
  [i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#71]: https://gitlab.freedesktop.org/drm/intel/issues/71
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (11 -> 8)
------------------------------

  Missing    (3): pig-snb-2600 pig-glk-j5005 pig-skl-6260u 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5741 -> IGTPW_4782
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_8768: cc11fe21674f094e902748b09efa4e87c8be434b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_4782: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html
  IGT_5741: 96a8c8c1371995b73916989880b29b01f5657ba3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_4782/index.html

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_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

Re: [igt-dev] [PATCH 2/2] i915/perf: Sanity check reports in mapped OA buffer

[Lionel Landwerlin]

Looks good, just one nit and a test suggestion.

On 21/07/2020 04:57, Umesh Nerlige Ramappa wrote:
> For applications that need a faster way to access reports in the OA
> buffer, i915 now provides a way to map the OA buffer to privileged user
> space. Add a test to sanity check reports in the mapped OA buffer.
>
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
>   include/drm-uapi/i915_drm.h |  32 +++++
>   tests/i915/perf.c           | 241 ++++++++++++++++++++++++++++++++++++
>   2 files changed, 273 insertions(+)
>
> diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
> index 2b55af13..f7523d55 100644
> --- a/include/drm-uapi/i915_drm.h
> +++ b/include/drm-uapi/i915_drm.h
> @@ -2048,6 +2048,38 @@ struct drm_i915_perf_open_param {
>    */
>   #define I915_PERF_IOCTL_CONFIG	_IO('i', 0x2)
>   
> +/**
> + * Returns OA buffer properties to be used with mmap.
> + *
> + * This ioctl is available in perf revision 6.
> + */
> +#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
> +
> +/**
> + * OA buffer size and offset.
> + */
> +struct drm_i915_perf_oa_buffer_info {
> +	__u32 size;
> +	__u32 offset;
> +	__u64 reserved[4];
> +};
> +
> +/**
> + * Returns current position of OA buffer head and tail.
> + *
> + * This ioctl is available in perf revision 6.
> + */
> +#define I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL _IO('i', 0x4)
> +
> +/**
> + * OA buffer head and tail.
> + */
> +struct drm_i915_perf_oa_buffer_head_tail {
> +	__u32 head;
> +	__u32 tail;
> +	__u64 reserved[4];
> +};

We should probably test head/tail values.

Open the stream with a fast enough exponent and verify they loop correctly?

> +
>   /**
>    * Common to all i915 perf records
>    */
> diff --git a/tests/i915/perf.c b/tests/i915/perf.c
> index eb38ea12..b7aa1596 100644
> --- a/tests/i915/perf.c
> +++ b/tests/i915/perf.c
> @@ -206,6 +206,7 @@ static struct intel_perf *intel_perf = NULL;
>   static struct intel_perf_metric_set *test_set = NULL;
>   static bool *undefined_a_counters;
>   static uint64_t oa_exp_1_millisec;
> +struct intel_mmio_data mmio_data;
>   
>   static igt_render_copyfunc_t render_copy = NULL;
>   static uint32_t (*read_report_ticks)(uint32_t *report,
> @@ -5011,6 +5012,220 @@ test_whitelisted_registers_userspace_config(void)
>   	i915_perf_remove_config(drm_fd, config_id);
>   }
>   
> +#define OA_BUFFER_DATA(tail, head, oa_buffer_size) \
> +	(((tail) - (head)) & ((oa_buffer_size) - 1))
> +
> +#ifndef MAP_FAILED
> +#define MAP_FAILED ((void *)-1)
> +#endif
> +
> +static uint32_t oa_status_reg(void)
> +{
> +	if (IS_HASWELL(devid))
> +		return intel_register_read(&mmio_data, 0x2346) & 0x7;
> +	else if (IS_GEN12(devid))
> +		return intel_register_read(&mmio_data, 0xdafc) & 0x7;
> +	else
> +		return intel_register_read(&mmio_data, 0x2b08) & 0xf;
> +}
> +
> +static void invalid_map_oa_buffer(void)
> +{
> +	struct drm_i915_perf_oa_buffer_info oa_buffer;
> +	void *oa_vaddr = NULL;
> +
> +	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO, &oa_buffer);
> +
> +	igt_debug("size        = %d\n", oa_buffer.size);
> +	igt_debug("offset      = %x\n", oa_buffer.offset);
> +
> +	igt_assert_eq(oa_buffer.size & (oa_buffer.size - 1), 0);
> +
> +	/* try a couple invalid mmaps */
> +	/* bad offsets */
> +	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 0);
> +	igt_assert(oa_vaddr == MAP_FAILED);
> +
> +	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 8192);
> +	igt_assert(oa_vaddr == MAP_FAILED);
> +
> +	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 11);
> +	igt_assert(oa_vaddr == MAP_FAILED);
> +
> +	/* bad size */
> +	oa_vaddr = mmap(0, oa_buffer.size + 1, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
> +	igt_assert(oa_vaddr == MAP_FAILED);
> +
> +	/* do the right thing */
> +	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
> +	igt_assert(oa_vaddr != NULL);

oa_vaddr != NULL && oa_vaddr != MAP_FAILED ;)


> +
> +	munmap(oa_vaddr, oa_buffer.size);
> +}
> +
> +static void *map_oa_buffer(uint32_t *size)
> +{

> ...

> +
>   static unsigned
>   read_i915_module_ref(void)
>   {
> @@ -5179,6 +5394,9 @@ igt_main
>   
>   		render_copy = igt_get_render_copyfunc(devid);
>   		igt_require_f(render_copy, "no render-copy function\n");
> +
> +		intel_register_access_init(&mmio_data, intel_get_pci_device(),
> +					   0, drm_fd);
>   	}
>   
>   	igt_subtest("non-system-wide-paranoid")
> @@ -5346,6 +5564,28 @@ igt_main
>   		test_triggered_oa_reports();
>   	}
>   
> +	igt_subtest_group {
> +		igt_fixture {
> +			igt_require(i915_perf_revision(drm_fd) >= 8);
> +		}
> +
> +		igt_describe("Verify mapping of oa buffer");
> +		igt_subtest("map-oa-buffer")
> +			test_mapped_oa_buffer(check_reports_from_mapped_buffer);
> +
> +		igt_describe("Verify invalid mappings of oa buffer");
> +		igt_subtest("invalid-map-oa-buffer")
> +			test_mapped_oa_buffer(invalid_map_oa_buffer);
> +
> +		igt_describe("Verify if non-privileged user can map oa buffer");
> +		igt_subtest("non-privileged-map-oa-buffer")
> +			test_mapped_oa_buffer(test_unprivileged_map_oa_buffer);
> +
> +		igt_describe("Close FD and access oa buffer");
> +		igt_subtest("close-fd-and-access-oa-buffer")
> +			close_fd_and_access_oa_buffer();

I think one additional test that would be helpful is to do the following :


for (i = 0; i < 256; i++) {

   int fd = perf_open();

   void *ptr = mmap(fd);

   close(fd);

}

16Mb * 256 = 4Gb

That way you verify that we're not leaking GGTT space when closing the 
perf fd.

You might want to tweak the noa_wait sysfs value before/after the loop.

This might also only work on !32bits machines with enough memory...


-Lionel


> +	}
> +
>   	igt_fixture {
>   		/* leave sysctl options in their default state... */
>   		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
> @@ -5354,6 +5594,7 @@ igt_main
>   		if (intel_perf)
>   			intel_perf_free(intel_perf);
>   
> +		intel_register_access_fini(&mmio_data);
>   		close(drm_fd);
>   	}
>   }


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Re: [igt-dev] [PATCH 2/2] i915/perf: Sanity check reports in mapped OA buffer

[Umesh Nerlige Ramappa]

On Tue, Jul 21, 2020 at 09:21:44AM +0300, Lionel Landwerlin wrote:
>Looks good, just one nit and a test suggestion.
>
>On 21/07/2020 04:57, Umesh Nerlige Ramappa wrote:
>>For applications that need a faster way to access reports in the OA
>>buffer, i915 now provides a way to map the OA buffer to privileged user
>>space. Add a test to sanity check reports in the mapped OA buffer.
>>
>>Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
>>---
>>  include/drm-uapi/i915_drm.h |  32 +++++
>>  tests/i915/perf.c           | 241 ++++++++++++++++++++++++++++++++++++
>>  2 files changed, 273 insertions(+)
>>
>>diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
>>index 2b55af13..f7523d55 100644
>>--- a/include/drm-uapi/i915_drm.h
>>+++ b/include/drm-uapi/i915_drm.h
>>@@ -2048,6 +2048,38 @@ struct drm_i915_perf_open_param {
>>   */
>>  #define I915_PERF_IOCTL_CONFIG	_IO('i', 0x2)
>>+/**
>>+ * Returns OA buffer properties to be used with mmap.
>>+ *
>>+ * This ioctl is available in perf revision 6.
>>+ */
>>+#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
>>+
>>+/**
>>+ * OA buffer size and offset.
>>+ */
>>+struct drm_i915_perf_oa_buffer_info {
>>+	__u32 size;
>>+	__u32 offset;
>>+	__u64 reserved[4];
>>+};
>>+
>>+/**
>>+ * Returns current position of OA buffer head and tail.
>>+ *
>>+ * This ioctl is available in perf revision 6.
>>+ */
>>+#define I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL _IO('i', 0x4)
>>+
>>+/**
>>+ * OA buffer head and tail.
>>+ */
>>+struct drm_i915_perf_oa_buffer_head_tail {
>>+	__u32 head;
>>+	__u32 tail;
>>+	__u64 reserved[4];
>>+};
>
>We should probably test head/tail values.
>
>Open the stream with a fast enough exponent and verify they loop correctly?

Will try this out in the next iteration of patches.

>
>>+
>>  /**
>>   * Common to all i915 perf records
>>   */
>>diff --git a/tests/i915/perf.c b/tests/i915/perf.c
>>index eb38ea12..b7aa1596 100644
>>--- a/tests/i915/perf.c
>>+++ b/tests/i915/perf.c
>>@@ -206,6 +206,7 @@ static struct intel_perf *intel_perf = NULL;
>>  static struct intel_perf_metric_set *test_set = NULL;
>>  static bool *undefined_a_counters;
>>  static uint64_t oa_exp_1_millisec;
>>+struct intel_mmio_data mmio_data;
>>  static igt_render_copyfunc_t render_copy = NULL;
>>  static uint32_t (*read_report_ticks)(uint32_t *report,
>>@@ -5011,6 +5012,220 @@ test_whitelisted_registers_userspace_config(void)
>>  	i915_perf_remove_config(drm_fd, config_id);
>>  }
>>+#define OA_BUFFER_DATA(tail, head, oa_buffer_size) \
>>+	(((tail) - (head)) & ((oa_buffer_size) - 1))
>>+
>>+#ifndef MAP_FAILED
>>+#define MAP_FAILED ((void *)-1)
>>+#endif
>>+
>>+static uint32_t oa_status_reg(void)
>>+{
>>+	if (IS_HASWELL(devid))
>>+		return intel_register_read(&mmio_data, 0x2346) & 0x7;
>>+	else if (IS_GEN12(devid))
>>+		return intel_register_read(&mmio_data, 0xdafc) & 0x7;
>>+	else
>>+		return intel_register_read(&mmio_data, 0x2b08) & 0xf;
>>+}
>>+
>>+static void invalid_map_oa_buffer(void)
>>+{
>>+	struct drm_i915_perf_oa_buffer_info oa_buffer;
>>+	void *oa_vaddr = NULL;
>>+
>>+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO, &oa_buffer);
>>+
>>+	igt_debug("size        = %d\n", oa_buffer.size);
>>+	igt_debug("offset      = %x\n", oa_buffer.offset);
>>+
>>+	igt_assert_eq(oa_buffer.size & (oa_buffer.size - 1), 0);
>>+
>>+	/* try a couple invalid mmaps */
>>+	/* bad offsets */
>>+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 0);
>>+	igt_assert(oa_vaddr == MAP_FAILED);
>>+
>>+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 8192);
>>+	igt_assert(oa_vaddr == MAP_FAILED);
>>+
>>+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, 11);
>>+	igt_assert(oa_vaddr == MAP_FAILED);
>>+
>>+	/* bad size */
>>+	oa_vaddr = mmap(0, oa_buffer.size + 1, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
>>+	igt_assert(oa_vaddr == MAP_FAILED);
>>+
>>+	/* do the right thing */
>>+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
>>+	igt_assert(oa_vaddr != NULL);
>
>oa_vaddr != NULL && oa_vaddr != MAP_FAILED ;)
>
>
>>+
>>+	munmap(oa_vaddr, oa_buffer.size);
>>+}
>>+
>>+static void *map_oa_buffer(uint32_t *size)
>>+{
>
>>...
>
>>+
>>  static unsigned
>>  read_i915_module_ref(void)
>>  {
>>@@ -5179,6 +5394,9 @@ igt_main
>>  		render_copy = igt_get_render_copyfunc(devid);
>>  		igt_require_f(render_copy, "no render-copy function\n");
>>+
>>+		intel_register_access_init(&mmio_data, intel_get_pci_device(),
>>+					   0, drm_fd);
>>  	}
>>  	igt_subtest("non-system-wide-paranoid")
>>@@ -5346,6 +5564,28 @@ igt_main
>>  		test_triggered_oa_reports();
>>  	}
>>+	igt_subtest_group {
>>+		igt_fixture {
>>+			igt_require(i915_perf_revision(drm_fd) >= 8);
>>+		}
>>+
>>+		igt_describe("Verify mapping of oa buffer");
>>+		igt_subtest("map-oa-buffer")
>>+			test_mapped_oa_buffer(check_reports_from_mapped_buffer);
>>+
>>+		igt_describe("Verify invalid mappings of oa buffer");
>>+		igt_subtest("invalid-map-oa-buffer")
>>+			test_mapped_oa_buffer(invalid_map_oa_buffer);
>>+
>>+		igt_describe("Verify if non-privileged user can map oa buffer");
>>+		igt_subtest("non-privileged-map-oa-buffer")
>>+			test_mapped_oa_buffer(test_unprivileged_map_oa_buffer);
>>+
>>+		igt_describe("Close FD and access oa buffer");
>>+		igt_subtest("close-fd-and-access-oa-buffer")
>>+			close_fd_and_access_oa_buffer();
>
>I think one additional test that would be helpful is to do the following :
>
>
>for (i = 0; i < 256; i++) {
>
>  int fd = perf_open();
>
>  void *ptr = mmap(fd);
>
>  close(fd);
>
>}
>
>16Mb * 256 = 4Gb
>
>That way you verify that we're not leaking GGTT space when closing the 
>perf fd.
>
>You might want to tweak the noa_wait sysfs value before/after the loop.
>
>This might also only work on !32bits machines with enough memory...
>

Looks like calling close() in the above sequence will not result in a 
call to i915_perf_release (because mmap holds a reference to the file).  

Based on the latest patch series in the mailing list, if you see 
something we can add, please let me know. Note that we block mremap of 
an mmap-ped address by setting VM_DONTEXPAND in i915 perf mmap 
implementation.

Thanks,
Umesh

>
>-Lionel
>
>
>>+	}
>>+
>>  	igt_fixture {
>>  		/* leave sysctl options in their default state... */
>>  		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
>>@@ -5354,6 +5594,7 @@ igt_main
>>  		if (intel_perf)
>>  			intel_perf_free(intel_perf);
>>+		intel_register_access_fini(&mmio_data);
>>  		close(drm_fd);
>>  	}
>>  }
>
>
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Re: [igt-dev] [PATCH 2/2] i915/perf: Sanity check reports in mapped OA buffer

[Lionel Landwerlin]

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On 25/07/2020 02:33, Umesh Nerlige Ramappa wrote:
>>
>> 16Mb * 256 = 4Gb
>>
>> That way you verify that we're not leaking GGTT space when closing 
>> the perf fd.
>>
>> You might want to tweak the noa_wait sysfs value before/after the loop.
>>
>> This might also only work on !32bits machines with enough memory...
>>
>
> Looks like calling close() in the above sequence will not result in a 
> call to i915_perf_release (because mmap holds a reference to the file).
> Based on the latest patch series in the mailing list, if you see 
> something we can add, please let me know. Note that we block mremap of 
> an mmap-ped address by setting VM_DONTEXPAND in i915 perf mmap 
> implementation.
>
> Thanks,
> Umesh 

Oh thanks for reminding me :)

Since mmap holds a ref that means nobody will be able to open the stream 
once more until munmap is called.

So there won't be any GGTT space leakage and it's all good.


Forget my request then.

Thanks!


-Lionel


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[igt-dev] [PATCH 2/2] i915/perf: Sanity check reports in mapped OA buffer

[Umesh Nerlige Ramappa]

For applications that need a faster way to access reports in the OA
buffer, i915 now provides a way to map the OA buffer to privileged user
space. Add a test to sanity check reports in the mapped OA buffer.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 include/drm-uapi/i915_drm.h |  32 ++++++++++
 tests/i915/perf.c           | 113 ++++++++++++++++++++++++++++++++++++
 2 files changed, 145 insertions(+)

diff --git a/include/drm-uapi/i915_drm.h b/include/drm-uapi/i915_drm.h
index 2b55af13..f7523d55 100644
--- a/include/drm-uapi/i915_drm.h
+++ b/include/drm-uapi/i915_drm.h
@@ -2048,6 +2048,38 @@ struct drm_i915_perf_open_param {
  */
 #define I915_PERF_IOCTL_CONFIG	_IO('i', 0x2)
 
+/**
+ * Returns OA buffer properties to be used with mmap.
+ *
+ * This ioctl is available in perf revision 6.
+ */
+#define I915_PERF_IOCTL_GET_OA_BUFFER_INFO _IO('i', 0x3)
+
+/**
+ * OA buffer size and offset.
+ */
+struct drm_i915_perf_oa_buffer_info {
+	__u32 size;
+	__u32 offset;
+	__u64 reserved[4];
+};
+
+/**
+ * Returns current position of OA buffer head and tail.
+ *
+ * This ioctl is available in perf revision 6.
+ */
+#define I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL _IO('i', 0x4)
+
+/**
+ * OA buffer head and tail.
+ */
+struct drm_i915_perf_oa_buffer_head_tail {
+	__u32 head;
+	__u32 tail;
+	__u64 reserved[4];
+};
+
 /**
  * Common to all i915 perf records
  */
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index eb38ea12..a02896e5 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -206,6 +206,7 @@ static struct intel_perf *intel_perf = NULL;
 static struct intel_perf_metric_set *test_set = NULL;
 static bool *undefined_a_counters;
 static uint64_t oa_exp_1_millisec;
+struct intel_mmio_data mmio_data;
 
 static igt_render_copyfunc_t render_copy = NULL;
 static uint32_t (*read_report_ticks)(uint32_t *report,
@@ -5011,6 +5012,108 @@ test_whitelisted_registers_userspace_config(void)
 	i915_perf_remove_config(drm_fd, config_id);
 }
 
+#define OA_BUFFER_DATA(tail, head, oa_buffer_size) \
+	(((tail) - (head)) & ((oa_buffer_size) - 1))
+
+static uint32_t oa_status_reg(void)
+{
+	if (IS_HASWELL(devid))
+		return intel_register_read(&mmio_data, 0x2346) & 0x7;
+	else if (IS_GEN12(devid))
+		return intel_register_read(&mmio_data, 0xdafc) & 0x7;
+	else
+		return intel_register_read(&mmio_data, 0x2b08) & 0xf;
+}
+
+static void check_reports_from_mapped_buffer(enum drm_i915_oa_format fmt,
+					     int oa_exponent)
+{
+	struct drm_i915_perf_oa_buffer_info oa_buffer;
+	struct drm_i915_perf_oa_buffer_head_tail oa_ht;
+	struct oa_format format = get_oa_format(fmt);
+	size_t report_size = format.size;
+	uint8_t *reports;
+	uint32_t *report0, *report1;
+	uint32_t num_reports, timer_reports = 0;
+	uint32_t period_us = oa_exponent_to_ns(oa_exponent) / 1000;
+	void *oa_vaddr;
+	int i;
+
+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_INFO, &oa_buffer);
+
+	igt_debug("size        = %d\n", oa_buffer.size);
+	igt_debug("offset      = %x\n", oa_buffer.offset);
+
+	igt_assert_eq(oa_buffer.size & (oa_buffer.size - 1), 0);
+	igt_assert_eq(oa_status_reg(), 0);
+
+	/* try a couple invalid mmaps */
+	/* bad offsets */
+	igt_assert(mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE,
+			stream_fd, 0) == (void *) -1);
+	igt_assert(mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE,
+			stream_fd, 8192) == (void *) -1);
+	igt_assert(mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE,
+			stream_fd, 11) == (void *) -1);
+
+	/* bad size */
+	igt_assert(mmap(0, oa_buffer.size + 4096, PROT_READ, MAP_PRIVATE,
+			stream_fd, oa_buffer.offset) == (void *) -1);
+
+	/* do the right thing */
+	oa_vaddr = mmap(0, oa_buffer.size, PROT_READ, MAP_PRIVATE, stream_fd, oa_buffer.offset);
+
+	/* wait for approx 100 reports */
+	usleep(100 * period_us);
+
+	do_ioctl(stream_fd, I915_PERF_IOCTL_GET_OA_BUFFER_HEAD_TAIL, &oa_ht);
+
+	igt_debug("head = %x\n", oa_ht.head);
+	igt_debug("tail = %x\n", oa_ht.tail);
+
+	reports = (uint8_t *) (oa_vaddr + oa_ht.head);
+
+	num_reports = OA_BUFFER_DATA(oa_ht.tail,
+				     oa_ht.head,
+				     oa_buffer.size) / report_size;
+
+	for (i = 0; i < num_reports; i++) {
+		report1 = (uint32_t *)(reports + (i * report_size));
+		if (!oa_report_is_periodic(oa_exponent, report1))
+			continue;
+
+		timer_reports++;
+		if (timer_reports >= 2)
+			sanity_check_reports(report0, report1, fmt);
+
+		report0 = report1;
+	}
+
+	munmap(oa_vaddr, oa_buffer.size);
+}
+
+static void test_mapped_oa_buffer(void)
+{
+	int oa_exponent = max_oa_exponent_for_period_lte(1000000);
+	enum drm_i915_oa_format fmt = test_set->perf_oa_format;
+	uint64_t properties[] = {
+		DRM_I915_PERF_PROP_SAMPLE_OA, true,
+		DRM_I915_PERF_PROP_OA_METRICS_SET, test_set->perf_oa_metrics_set,
+		DRM_I915_PERF_PROP_OA_FORMAT, fmt,
+		DRM_I915_PERF_PROP_OA_EXPONENT, oa_exponent,
+
+	};
+	struct drm_i915_perf_open_param param = {
+		.flags = I915_PERF_FLAG_FD_CLOEXEC,
+		.num_properties = sizeof(properties) / 16,
+		.properties_ptr = to_user_pointer(properties),
+	};
+
+	stream_fd = __perf_open(drm_fd, &param, false);
+	check_reports_from_mapped_buffer(fmt, oa_exponent);
+	__perf_close(stream_fd);
+}
+
 static unsigned
 read_i915_module_ref(void)
 {
@@ -5179,6 +5282,9 @@ igt_main
 
 		render_copy = igt_get_render_copyfunc(devid);
 		igt_require_f(render_copy, "no render-copy function\n");
+
+		intel_register_access_init(&mmio_data, intel_get_pci_device(),
+					   0, drm_fd);
 	}
 
 	igt_subtest("non-system-wide-paranoid")
@@ -5346,6 +5452,12 @@ igt_main
 		test_triggered_oa_reports();
 	}
 
+	igt_describe("Verify mapping of oa buffer");
+	igt_subtest("mapped-oa-buffer") {
+		igt_require(i915_perf_revision(drm_fd) >= 8);
+		test_mapped_oa_buffer();
+	}
+
 	igt_fixture {
 		/* leave sysctl options in their default state... */
 		write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
@@ -5354,6 +5466,7 @@ igt_main
 		if (intel_perf)
 			intel_perf_free(intel_perf);
 
+		intel_register_access_fini(&mmio_data);
 		close(drm_fd);
 	}
 }
-- 
2.20.1

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