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From: Peter Collingbourne <pcc@google.com>
To: Richard Henderson <richard.henderson@linaro.org>,
	qemu-devel@nongnu.org,  qemu-arm@nongnu.org
Cc: Peter Collingbourne <pcc@google.com>
Subject: [PATCH] target/arm: Fix decode of {LD,ST}RA[AB] instructions
Date: Mon,  3 Aug 2020 15:26:56 -0700	[thread overview]
Message-ID: <20200803222656.63936-1-pcc@google.com> (raw)

These instructions use zero as the discriminator, not SP.

Signed-off-by: Peter Collingbourne <pcc@google.com>
---
 target/arm/translate-a64.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 8c0764957c..c996ca1393 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -3429,9 +3429,11 @@ static void disas_ldst_pac(DisasContext *s, uint32_t insn,
 
     if (s->pauth_active) {
         if (use_key_a) {
-            gen_helper_autda(dirty_addr, cpu_env, dirty_addr, cpu_X[31]);
+            gen_helper_autda(dirty_addr, cpu_env, dirty_addr,
+                             new_tmp_a64_zero(s));
         } else {
-            gen_helper_autdb(dirty_addr, cpu_env, dirty_addr, cpu_X[31]);
+            gen_helper_autdb(dirty_addr, cpu_env, dirty_addr,
+                             new_tmp_a64_zero(s));
         }
     }
 
-- 
2.28.0.163.g6104cc2f0b6-goog



             reply	other threads:[~2020-08-03 22:44 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-03 22:26 Peter Collingbourne [this message]
2020-08-04  0:21 ` [PATCH] target/arm: Fix decode of {LD,ST}RA[AB] instructions Peter Collingbourne
2020-08-04 15:41   ` Richard Henderson
2020-08-04 17:28     ` Peter Collingbourne

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