From: Rob Herring <robh@kernel.org> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Jiri Olsa <jolsa@redhat.com> Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexander Shishkin <alexander.shishkin@linux.intel.com>, Namhyung Kim <namhyung@kernel.org>, Raphael Gault <raphael.gault@arm.com>, Mark Rutland <mark.rutland@arm.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, Ian Rogers <irogers@google.com>, honnappa.nagarahalli@arm.com Subject: [PATCH v2 0/9] libperf and arm64 userspace counter access support Date: Fri, 28 Aug 2020 14:56:05 -0600 [thread overview] Message-ID: <20200828205614.3391252-1-robh@kernel.org> (raw) This is resurrecting Raphael's series[1] to enable userspace counter access on arm64. My previous version is here[2]. New in this version is adding userspace read support into libperf rather than adding yet another copy of the read loop. Details are in patch 5. The following changes to the arm64 support have been made compared to Raphael's last version: The major change is support for heterogeneous systems with some restrictions. Specifically, userspace must pin itself to like CPUs, open a specific PMU by type, and use h/w specific events. The tests have been reworked to demonstrate this. Chained events are not supported. The problem with supporting chained events was there's no way to distinguish between a chained event and a native 64-bit counter. We could add some flag, but do self monitoring processes really need that? Native 64-bit counters are supported if the PMU h/w has support. As there's already an explicit ABI to request 64-bit counters, userspace can request 64-bit counters and if user access is not enabled, then it must retry with 32-bit counters. Prior versions broke the build on arm32 (surprisingly never caught by 0-day). As a result, event_mapped and event_unmapped implementations have been moved into the arm64 code. There was a bug in that pmc_width was not set in the user page. The tests now check for this. The documentation has been converted to rST. I've added sections on chained events and heterogeneous. The tests have been expanded to test the cycle counter access. Rob [1] https://lore.kernel.org/linux-arm-kernel/20190822144220.27860-1-raphael.gault@arm.com/ [2] https://lore.kernel.org/linux-arm-kernel/20200707205333.624938-1-robh@kernel.org/ Raphael Gault (4): arm64: pmu: Add hook to handle pmu-related undefined instructions arm64: pmu: Add function implementation to update event index in userpage arm64: perf: Enable pmu counter direct access for perf event on armv8 Documentation: arm64: Document PMU counters access from userspace Rob Herring (5): tools/include: Add an initial math64.h libperf: Add support for user space counter access libperf: Add arm64 support to perf_mmap__read_self() perf: arm64: Add test for userspace counter access on heterogeneous systems perf: Remove x86 specific rdpmc test Documentation/arm64/index.rst | 1 + .../arm64/perf_counter_user_access.rst | 56 ++++++ arch/arm64/include/asm/mmu.h | 5 + arch/arm64/include/asm/mmu_context.h | 2 + arch/arm64/include/asm/perf_event.h | 14 ++ arch/arm64/kernel/cpufeature.c | 4 +- arch/arm64/kernel/perf_event.c | 116 +++++++++++ include/linux/perf/arm_pmu.h | 2 + tools/include/linux/math64.h | 75 +++++++ tools/lib/perf/Documentation/libperf.txt | 1 + tools/lib/perf/evsel.c | 33 +++ tools/lib/perf/include/internal/evsel.h | 2 + tools/lib/perf/include/internal/mmap.h | 3 + tools/lib/perf/include/perf/evsel.h | 1 + tools/lib/perf/libperf.map | 1 + tools/lib/perf/mmap.c | 188 ++++++++++++++++++ tools/lib/perf/tests/test-evsel.c | 64 ++++++ tools/perf/arch/arm64/include/arch-tests.h | 7 + tools/perf/arch/arm64/tests/Build | 1 + tools/perf/arch/arm64/tests/arch-tests.c | 4 + tools/perf/arch/arm64/tests/user-events.c | 170 ++++++++++++++++ tools/perf/arch/x86/include/arch-tests.h | 1 - tools/perf/arch/x86/tests/Build | 1 - tools/perf/arch/x86/tests/arch-tests.c | 4 - tools/perf/arch/x86/tests/rdpmc.c | 182 ----------------- 25 files changed, 748 insertions(+), 190 deletions(-) create mode 100644 Documentation/arm64/perf_counter_user_access.rst create mode 100644 tools/include/linux/math64.h create mode 100644 tools/perf/arch/arm64/tests/user-events.c delete mode 100644 tools/perf/arch/x86/tests/rdpmc.c -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, Arnaldo Carvalho de Melo <acme@kernel.org>, Jiri Olsa <jolsa@redhat.com> Cc: Mark Rutland <mark.rutland@arm.com>, Ian Rogers <irogers@google.com>, Alexander Shishkin <alexander.shishkin@linux.intel.com>, linux-kernel@vger.kernel.org, honnappa.nagarahalli@arm.com, Raphael Gault <raphael.gault@arm.com>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, Namhyung Kim <namhyung@kernel.org>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 0/9] libperf and arm64 userspace counter access support Date: Fri, 28 Aug 2020 14:56:05 -0600 [thread overview] Message-ID: <20200828205614.3391252-1-robh@kernel.org> (raw) This is resurrecting Raphael's series[1] to enable userspace counter access on arm64. My previous version is here[2]. New in this version is adding userspace read support into libperf rather than adding yet another copy of the read loop. Details are in patch 5. The following changes to the arm64 support have been made compared to Raphael's last version: The major change is support for heterogeneous systems with some restrictions. Specifically, userspace must pin itself to like CPUs, open a specific PMU by type, and use h/w specific events. The tests have been reworked to demonstrate this. Chained events are not supported. The problem with supporting chained events was there's no way to distinguish between a chained event and a native 64-bit counter. We could add some flag, but do self monitoring processes really need that? Native 64-bit counters are supported if the PMU h/w has support. As there's already an explicit ABI to request 64-bit counters, userspace can request 64-bit counters and if user access is not enabled, then it must retry with 32-bit counters. Prior versions broke the build on arm32 (surprisingly never caught by 0-day). As a result, event_mapped and event_unmapped implementations have been moved into the arm64 code. There was a bug in that pmc_width was not set in the user page. The tests now check for this. The documentation has been converted to rST. I've added sections on chained events and heterogeneous. The tests have been expanded to test the cycle counter access. Rob [1] https://lore.kernel.org/linux-arm-kernel/20190822144220.27860-1-raphael.gault@arm.com/ [2] https://lore.kernel.org/linux-arm-kernel/20200707205333.624938-1-robh@kernel.org/ Raphael Gault (4): arm64: pmu: Add hook to handle pmu-related undefined instructions arm64: pmu: Add function implementation to update event index in userpage arm64: perf: Enable pmu counter direct access for perf event on armv8 Documentation: arm64: Document PMU counters access from userspace Rob Herring (5): tools/include: Add an initial math64.h libperf: Add support for user space counter access libperf: Add arm64 support to perf_mmap__read_self() perf: arm64: Add test for userspace counter access on heterogeneous systems perf: Remove x86 specific rdpmc test Documentation/arm64/index.rst | 1 + .../arm64/perf_counter_user_access.rst | 56 ++++++ arch/arm64/include/asm/mmu.h | 5 + arch/arm64/include/asm/mmu_context.h | 2 + arch/arm64/include/asm/perf_event.h | 14 ++ arch/arm64/kernel/cpufeature.c | 4 +- arch/arm64/kernel/perf_event.c | 116 +++++++++++ include/linux/perf/arm_pmu.h | 2 + tools/include/linux/math64.h | 75 +++++++ tools/lib/perf/Documentation/libperf.txt | 1 + tools/lib/perf/evsel.c | 33 +++ tools/lib/perf/include/internal/evsel.h | 2 + tools/lib/perf/include/internal/mmap.h | 3 + tools/lib/perf/include/perf/evsel.h | 1 + tools/lib/perf/libperf.map | 1 + tools/lib/perf/mmap.c | 188 ++++++++++++++++++ tools/lib/perf/tests/test-evsel.c | 64 ++++++ tools/perf/arch/arm64/include/arch-tests.h | 7 + tools/perf/arch/arm64/tests/Build | 1 + tools/perf/arch/arm64/tests/arch-tests.c | 4 + tools/perf/arch/arm64/tests/user-events.c | 170 ++++++++++++++++ tools/perf/arch/x86/include/arch-tests.h | 1 - tools/perf/arch/x86/tests/Build | 1 - tools/perf/arch/x86/tests/arch-tests.c | 4 - tools/perf/arch/x86/tests/rdpmc.c | 182 ----------------- 25 files changed, 748 insertions(+), 190 deletions(-) create mode 100644 Documentation/arm64/perf_counter_user_access.rst create mode 100644 tools/include/linux/math64.h create mode 100644 tools/perf/arch/arm64/tests/user-events.c delete mode 100644 tools/perf/arch/x86/tests/rdpmc.c -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-08-28 20:56 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-08-28 20:56 Rob Herring [this message] 2020-08-28 20:56 ` [PATCH v2 0/9] libperf and arm64 userspace counter access support Rob Herring 2020-08-28 20:56 ` [PATCH v2 1/9] arm64: pmu: Add hook to handle pmu-related undefined instructions Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 2/9] arm64: pmu: Add function implementation to update event index in userpage Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 3/9] arm64: perf: Enable pmu counter direct access for perf event on armv8 Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 4/9] tools/include: Add an initial math64.h Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 5/9] libperf: Add support for user space counter access Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-31 9:11 ` Jiri Olsa 2020-08-31 9:11 ` Jiri Olsa 2020-09-02 16:58 ` Rob Herring 2020-09-02 16:58 ` Rob Herring 2020-08-31 9:11 ` Jiri Olsa 2020-08-31 9:11 ` Jiri Olsa 2020-09-02 17:01 ` Rob Herring 2020-09-02 17:01 ` Rob Herring 2020-09-02 18:07 ` Ian Rogers 2020-09-02 18:07 ` Ian Rogers 2020-09-02 19:48 ` Rob Herring 2020-09-02 19:48 ` Rob Herring 2020-09-04 5:51 ` Ian Rogers 2020-09-04 5:51 ` Ian Rogers 2020-08-28 20:56 ` [PATCH v2 6/9] libperf: Add arm64 support to perf_mmap__read_self() Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 7/9] perf: arm64: Add test for userspace counter access on heterogeneous systems Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 8/9] Documentation: arm64: Document PMU counters access from userspace Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-28 20:56 ` [PATCH v2 9/9] perf: Remove x86 specific rdpmc test Rob Herring 2020-08-28 20:56 ` Rob Herring 2020-08-31 9:11 ` Jiri Olsa 2020-08-31 9:11 ` Jiri Olsa
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20200828205614.3391252-1-robh@kernel.org \ --to=robh@kernel.org \ --cc=Jonathan.Cameron@huawei.com \ --cc=acme@kernel.org \ --cc=alexander.shishkin@linux.intel.com \ --cc=catalin.marinas@arm.com \ --cc=honnappa.nagarahalli@arm.com \ --cc=irogers@google.com \ --cc=jolsa@redhat.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=mark.rutland@arm.com \ --cc=mingo@redhat.com \ --cc=namhyung@kernel.org \ --cc=peterz@infradead.org \ --cc=raphael.gault@arm.com \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.