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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 3/7] riscv: Use NULL as a sentinel value for smp_call_function
Date: Mon,  7 Sep 2020 14:16:55 -0400	[thread overview]
Message-ID: <20200907181659.92449-4-seanga2@gmail.com> (raw)
In-Reply-To: <20200907181659.92449-1-seanga2@gmail.com>

Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.

This commit uses NULL as a sentinel for secondary harts so they know when
the IPI is initialized, and it is safe to use the IPI API. The smp addr
parameter is initialized to NULL by board_init_f_init_reserve. Before this,
secondary harts wait in wait_for_gd_init.

This imposes a minor restriction because harts may no longer jump to NULL.
However, given that the RISC-V debug device is likely to be located at
0x400, it is unlikely for any RISC-V implementation to have usable ram
located at 0x0.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

 arch/riscv/lib/smp.c | 26 ++++++++++++++++++++++----
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
index ab6d8bd7fa..8c25755330 100644
--- a/arch/riscv/lib/smp.c
+++ b/arch/riscv/lib/smp.c
@@ -18,6 +18,12 @@ static int send_ipi_many(struct ipi_data *ipi, int wait)
 	u32 reg;
 	int ret, pending;
 
+	/* NULL is used as a sentinel value */
+	if (!ipi->addr) {
+		pr_err("smp_function cannot be set to 0x0\n");
+		return -EINVAL;
+	}
+
 	cpus = ofnode_path("/cpus");
 	if (!ofnode_valid(cpus)) {
 		pr_err("Can't find cpus node!\n");
@@ -50,11 +56,16 @@ static int send_ipi_many(struct ipi_data *ipi, int wait)
 			continue;
 #endif
 
-		gd->arch.ipi[reg].addr = ipi->addr;
 		gd->arch.ipi[reg].arg0 = ipi->arg0;
 		gd->arch.ipi[reg].arg1 = ipi->arg1;
 
-		__smp_mb();
+		/*
+		 * Ensure addr only becomes non-NULL when arg0 and arg1 are
+		 * valid. An IPI may already be pending on other harts, so we
+		 * need a way to signal that the IPI device has been
+		 * initialized, and that it is ok to call the function.
+		 */
+		__smp_store_release(&gd->arch.ipi[reg].addr, ipi->addr);
 
 		ret = riscv_send_ipi(reg);
 		if (ret) {
@@ -83,9 +94,16 @@ void handle_ipi(ulong hart)
 	if (hart >= CONFIG_NR_CPUS)
 		return;
 
-	__smp_mb();
+	smp_function = (void (*)(ulong, ulong, ulong))
+			__smp_load_acquire(&gd->arch.ipi[hart].addr);
+	/*
+	 * If the function is NULL, then U-Boot has not requested the IPI. The
+	 * IPI device may not be initialized, so all we can do is wait for
+	 * U-Boot to initialize it and send an IPI
+	 */
+	if (!smp_function)
+		return;
 
-	smp_function = (void (*)(ulong, ulong, ulong))gd->arch.ipi[hart].addr;
 	invalidate_icache_all();
 
 	/*
-- 
2.28.0

  parent reply	other threads:[~2020-09-07 18:16 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-07 18:16 [PATCH 0/7] riscv: Correctly handle IPIs already pending upon boot Sean Anderson
2020-09-07 18:16 ` [PATCH 1/7] Revert "riscv: Clear pending interrupts before enabling IPIs" Sean Anderson
2020-09-09  7:50   ` Rick Chen
2020-09-09 10:23     ` Sean Anderson
2020-09-10  6:39       ` Rick Chen
2020-09-10 10:18         ` Sean Anderson
2020-09-11  7:38   ` Bin Meng
2020-09-11 10:22     ` Sean Anderson
2020-09-11 14:45       ` Bin Meng
2020-09-11 18:30         ` Sean Anderson
2020-09-14  3:10           ` Rick Chen
2020-09-14 12:45             ` Sean Anderson
2020-09-07 18:16 ` [PATCH 2/7] riscv: Match memory barriers between send_ipi_many and handle_ipi Sean Anderson
2020-09-11  7:45   ` Bin Meng
2020-09-07 18:16 ` Sean Anderson [this message]
2020-09-09  8:33   ` [PATCH 3/7] riscv: Use NULL as a sentinel value for smp_call_function Rick Chen
2020-09-09  9:01     ` Rick Chen
2020-09-09 10:16       ` Sean Anderson
2020-09-09 10:26         ` Heinrich Schuchardt
2020-09-09 10:36           ` Sean Anderson
2020-09-10  8:09         ` Rick Chen
2020-09-14  3:21         ` Rick Chen
2020-09-11  8:04   ` Bin Meng
2020-09-14  1:58     ` Leo Liang
2020-09-14  2:07       ` Bin Meng
2020-09-14  6:10         ` Leo Liang
2020-09-14  6:15           ` Bin Meng
2020-09-14 14:05     ` Sean Anderson
2020-09-07 18:16 ` [PATCH 4/7] riscv: Clear pending IPIs on initialization Sean Anderson
2020-09-14  2:08   ` Bin Meng
2020-09-07 18:16 ` [PATCH 5/7] riscv: Add fence to available_harts_lock Sean Anderson
2020-09-10  3:26   ` Rick Chen
2020-09-11 10:39     ` Sean Anderson
2020-09-11 14:47   ` Bin Meng
2020-09-07 18:16 ` [PATCH 6/7] riscv: Ensure gp is NULL or points to valid data Sean Anderson
2020-09-14  5:25   ` Bin Meng
2020-09-14 13:03     ` Sean Anderson
2020-09-14 13:27       ` Sean Anderson
2020-09-07 18:16 ` [PATCH 7/7] riscv: Add some comments to start.S Sean Anderson
2020-09-14  5:26   ` Bin Meng
2020-09-09  2:02 ` [PATCH 0/7] riscv: Correctly handle IPIs already pending upon boot Rick Chen
2020-09-09  2:38   ` Sean Anderson
2020-09-09  2:44     ` Sean Anderson
2020-09-10  7:08     ` Rick Chen
2020-09-10 10:49       ` Sean Anderson

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