From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>,
Boris Brezillon <boris.brezillon@collabora.com>
Subject: [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read,write}_reg() helpers
Date: Wed, 16 Sep 2020 18:14:05 +0530 [thread overview]
Message-ID: <20200916124418.833-3-p.yadav@ti.com> (raw)
In-Reply-To: <20200916124418.833-1-p.yadav@ti.com>
<<< No Message Collected >>>
WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>,
Boris Brezillon <boris.brezillon@collabora.com>
Subject: [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read,write}_reg() helpers
Date: Wed, 16 Sep 2020 18:14:05 +0530 [thread overview]
Message-ID: <20200916124418.833-3-p.yadav@ti.com> (raw)
Message-ID: <20200916124405.tYpz7BzoZgfF57-MKNnEryFxxxCObfmusecvwiGVF0Y@z> (raw)
In-Reply-To: <20200916124418.833-1-p.yadav@ti.com>
They are thin wrappers around nor->controller_ops->{read,write}_reg().
In a future commit DTR support will be added. These ops can not be
supported by the {read,write}_reg() hooks and these helpers will make it
easier to reject those calls.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/mtd/spi-nor/core.c | 65 +++++++++++++++++++-------------------
1 file changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 623384ef9a5d..cbfc4c2df79d 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -82,6 +82,18 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op)
return spi_mem_exec_op(nor->spimem, op);
}
+static int spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
+ size_t len)
+{
+ return nor->controller_ops->read_reg(nor, opcode, buf, len);
+}
+
+static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,
+ size_t len)
+{
+ return nor->controller_ops->write_reg(nor, opcode, buf, len);
+}
+
/**
* spi_nor_spimem_read_data() - read data from flash's memory region via
* spi-mem
@@ -229,8 +241,7 @@ int spi_nor_write_enable(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0);
}
if (ret)
@@ -258,8 +269,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
}
if (ret)
@@ -289,8 +299,7 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,
- sr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, sr, 1);
}
if (ret)
@@ -320,8 +329,7 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR,
- fsr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, fsr, 1);
}
if (ret)
@@ -352,7 +360,7 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, cr, 1);
}
if (ret)
@@ -385,10 +393,10 @@ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor,
- enable ? SPINOR_OP_EN4B :
- SPINOR_OP_EX4B,
- NULL, 0);
+ ret = spi_nor_write_reg(nor,
+ enable ? SPINOR_OP_EN4B :
+ SPINOR_OP_EX4B,
+ NULL, 0);
}
if (ret)
@@ -421,8 +429,7 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
- nor->bouncebuf, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->bouncebuf, 1);
}
if (ret)
@@ -453,8 +460,7 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,
- nor->bouncebuf, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1);
}
if (ret)
@@ -484,8 +490,7 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR,
- sr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_XRDSR, sr, 1);
}
if (ret)
@@ -529,8 +534,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
}
if (ret)
@@ -593,8 +597,7 @@ static void spi_nor_clear_fsr(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
}
if (ret)
@@ -737,8 +740,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,
- sr, len);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr, len);
}
if (ret) {
@@ -939,8 +941,7 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2,
- sr2, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR2, sr2, 1);
}
if (ret) {
@@ -973,8 +974,7 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2,
- sr2, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR2, sr2, 1);
}
if (ret)
@@ -1004,8 +1004,7 @@ static int spi_nor_erase_chip(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0);
}
if (ret)
@@ -1158,8 +1157,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
addr >>= 8;
}
- return nor->controller_ops->write_reg(nor, nor->erase_opcode,
- nor->bouncebuf, nor->addr_width);
+ return spi_nor_write_reg(nor, nor->erase_opcode, nor->bouncebuf,
+ nor->addr_width);
}
/**
--
2.28.0
WARNING: multiple messages have this Message-ID (diff)
From: Pratyush Yadav <p.yadav@ti.com>
To: Tudor Ambarus <tudor.ambarus@microchip.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Cc: Boris Brezillon <boris.brezillon@collabora.com>,
Sekhar Nori <nsekhar@ti.com>, Pratyush Yadav <p.yadav@ti.com>
Subject: [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers
Date: Wed, 16 Sep 2020 18:14:05 +0530 [thread overview]
Message-ID: <20200916124418.833-3-p.yadav@ti.com> (raw)
In-Reply-To: <20200916124418.833-1-p.yadav@ti.com>
They are thin wrappers around nor->controller_ops->{read,write}_reg().
In a future commit DTR support will be added. These ops can not be
supported by the {read,write}_reg() hooks and these helpers will make it
easier to reject those calls.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---
drivers/mtd/spi-nor/core.c | 65 +++++++++++++++++++-------------------
1 file changed, 32 insertions(+), 33 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 623384ef9a5d..cbfc4c2df79d 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -82,6 +82,18 @@ static int spi_nor_spimem_exec_op(struct spi_nor *nor, struct spi_mem_op *op)
return spi_mem_exec_op(nor->spimem, op);
}
+static int spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
+ size_t len)
+{
+ return nor->controller_ops->read_reg(nor, opcode, buf, len);
+}
+
+static int spi_nor_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,
+ size_t len)
+{
+ return nor->controller_ops->write_reg(nor, opcode, buf, len);
+}
+
/**
* spi_nor_spimem_read_data() - read data from flash's memory region via
* spi-mem
@@ -229,8 +241,7 @@ int spi_nor_write_enable(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREN,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WREN, NULL, 0);
}
if (ret)
@@ -258,8 +269,7 @@ int spi_nor_write_disable(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRDI,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRDI, NULL, 0);
}
if (ret)
@@ -289,8 +299,7 @@ static int spi_nor_read_sr(struct spi_nor *nor, u8 *sr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR,
- sr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR, sr, 1);
}
if (ret)
@@ -320,8 +329,7 @@ static int spi_nor_read_fsr(struct spi_nor *nor, u8 *fsr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDFSR,
- fsr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDFSR, fsr, 1);
}
if (ret)
@@ -352,7 +360,7 @@ static int spi_nor_read_cr(struct spi_nor *nor, u8 *cr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDCR, cr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDCR, cr, 1);
}
if (ret)
@@ -385,10 +393,10 @@ int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor,
- enable ? SPINOR_OP_EN4B :
- SPINOR_OP_EX4B,
- NULL, 0);
+ ret = spi_nor_write_reg(nor,
+ enable ? SPINOR_OP_EN4B :
+ SPINOR_OP_EX4B,
+ NULL, 0);
}
if (ret)
@@ -421,8 +429,7 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_BRWR,
- nor->bouncebuf, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_BRWR, nor->bouncebuf, 1);
}
if (ret)
@@ -453,8 +460,7 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WREAR,
- nor->bouncebuf, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1);
}
if (ret)
@@ -484,8 +490,7 @@ int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_XRDSR,
- sr, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_XRDSR, sr, 1);
}
if (ret)
@@ -529,8 +534,7 @@ static void spi_nor_clear_sr(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLSR,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CLSR, NULL, 0);
}
if (ret)
@@ -593,8 +597,7 @@ static void spi_nor_clear_fsr(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CLFSR,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CLFSR, NULL, 0);
}
if (ret)
@@ -737,8 +740,7 @@ static int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR,
- sr, len);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR, sr, len);
}
if (ret) {
@@ -939,8 +941,7 @@ static int spi_nor_write_sr2(struct spi_nor *nor, const u8 *sr2)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_WRSR2,
- sr2, 1);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_WRSR2, sr2, 1);
}
if (ret) {
@@ -973,8 +974,7 @@ static int spi_nor_read_sr2(struct spi_nor *nor, u8 *sr2)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->read_reg(nor, SPINOR_OP_RDSR2,
- sr2, 1);
+ ret = spi_nor_read_reg(nor, SPINOR_OP_RDSR2, sr2, 1);
}
if (ret)
@@ -1004,8 +1004,7 @@ static int spi_nor_erase_chip(struct spi_nor *nor)
ret = spi_mem_exec_op(nor->spimem, &op);
} else {
- ret = nor->controller_ops->write_reg(nor, SPINOR_OP_CHIP_ERASE,
- NULL, 0);
+ ret = spi_nor_write_reg(nor, SPINOR_OP_CHIP_ERASE, NULL, 0);
}
if (ret)
@@ -1158,8 +1157,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32 addr)
addr >>= 8;
}
- return nor->controller_ops->write_reg(nor, nor->erase_opcode,
- nor->bouncebuf, nor->addr_width);
+ return spi_nor_write_reg(nor, nor->erase_opcode, nor->bouncebuf,
+ nor->addr_width);
}
/**
--
2.28.0
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-09-16 14:49 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-16 12:44 [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 01/15] mtd: spi-nor: core: use EOPNOTSUPP instead of ENOTSUPP Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-29 11:30 ` Tudor.Ambarus
2020-09-29 11:30 ` Tudor.Ambarus
2020-09-16 12:44 ` Pratyush Yadav [this message]
2020-09-16 12:44 ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read, write}_reg() helpers Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 02/15] mtd: spi-nor: core: add spi_nor_{read,write}_reg() helpers Pratyush Yadav
2020-09-29 11:38 ` Tudor.Ambarus
2020-09-29 11:38 ` Tudor.Ambarus
2020-09-29 12:54 ` Pratyush Yadav
2020-09-29 12:54 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 03/15] mtd: spi-nor: core: add spi_nor_controller_ops_erase helper Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 04/15] mtd: spi-nor: add support for DTR protocol Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 05/15] mtd: spi-nor: sfdp: get command opcode extension type from BFPT Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 6:17 ` Tudor.Ambarus
2020-09-30 6:17 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 06/15] mtd: spi-nor: sfdp: parse xSPI Profile 1.0 table Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 6:44 ` Tudor.Ambarus
2020-09-30 6:44 ` Tudor.Ambarus
2020-09-30 6:53 ` Pratyush Yadav
2020-09-30 6:53 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 07/15] mtd: spi-nor: core: use dummy cycle and address width info from SFDP Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 6:46 ` Tudor.Ambarus
2020-09-30 6:46 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 08/15] mtd: spi-nor: core: do 2 byte reads for SR and FSR in DTR mode Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 6:50 ` Tudor.Ambarus
2020-09-30 6:50 ` Tudor.Ambarus
2020-09-30 6:55 ` Pratyush Yadav
2020-09-30 6:55 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 09/15] mtd: spi-nor: core: enable octal DTR mode when possible Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-29 11:26 ` Tudor.Ambarus
2020-09-29 11:26 ` Tudor.Ambarus
2020-09-29 12:51 ` Pratyush Yadav
2020-09-29 12:51 ` Pratyush Yadav
2020-09-29 13:05 ` Tudor.Ambarus
2020-09-29 13:05 ` Tudor.Ambarus
2020-09-30 7:11 ` Tudor.Ambarus
2020-09-30 7:11 ` Tudor.Ambarus
2020-09-16 12:44 ` [PATCH v13 10/15] mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPT Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 7:23 ` Tudor.Ambarus
2020-09-30 7:23 ` Tudor.Ambarus
2020-09-30 7:31 ` Pratyush Yadav
2020-09-30 7:31 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 11/15] mtd: spi-nor: core: perform a Soft Reset on shutdown Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-29 13:08 ` Pratyush Yadav
2020-09-29 13:08 ` Pratyush Yadav
2020-09-30 7:32 ` Tudor.Ambarus
2020-09-30 7:32 ` Tudor.Ambarus
2020-09-30 7:43 ` Pratyush Yadav
2020-09-30 7:43 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 12/15] mtd: spi-nor: core: disable Octal DTR mode on suspend Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 7:40 ` Tudor.Ambarus
2020-09-30 7:40 ` Tudor.Ambarus
2020-09-30 7:44 ` Pratyush Yadav
2020-09-30 7:44 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 13/15] mtd: spi-nor: core: expose spi_nor_default_setup() in core.h Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 7:51 ` Tudor.Ambarus
2020-09-30 7:51 ` Tudor.Ambarus
2020-09-30 8:03 ` Pratyush Yadav
2020-09-30 8:03 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 14/15] mtd: spi-nor: spansion: add support for Cypress Semper flash Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 8:36 ` Tudor.Ambarus
2020-09-30 8:36 ` Tudor.Ambarus
2020-09-30 12:32 ` Pratyush Yadav
2020-09-30 12:32 ` Pratyush Yadav
2020-09-16 12:44 ` [PATCH v13 15/15] mtd: spi-nor: micron-st: allow using MT35XU512ABA in Octal DTR mode Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-16 12:44 ` Pratyush Yadav
2020-09-30 9:12 ` Tudor.Ambarus
2020-09-30 9:12 ` Tudor.Ambarus
2020-09-29 9:59 ` [RFC PATCH 0/3] mtd: spi-nor: Tackle stateful modes Tudor Ambarus
2020-09-29 9:59 ` Tudor Ambarus
2020-09-29 9:59 ` [RFC PATCH 1/3] mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE Tudor Ambarus
2020-09-29 9:59 ` Tudor Ambarus
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 9:59 ` [RFC PATCH 2/3] mtd: spi-nor: Introduce MTD_SPI_NOR_ALLOW_STATEFUL_MODES Tudor Ambarus
2020-09-29 9:59 ` Tudor Ambarus
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 16:45 ` Vignesh Raghavendra
2020-09-29 9:59 ` [RFC PATCH 3/3] mtd: spi-nor: Parse SFDP SCCR Map Tudor Ambarus
2020-09-29 9:59 ` Tudor Ambarus
2020-09-30 9:57 ` [PATCH v13 00/15] mtd: spi-nor: add xSPI Octal DTR support Tudor.Ambarus
2020-09-30 9:57 ` Tudor.Ambarus
2020-09-30 12:01 ` Pratyush Yadav
2020-09-30 12:01 ` Pratyush Yadav
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