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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: Joerg Roedel <joro@8bytes.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will@kernel.org>, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux-foundation.org, youlin.pei@mediatek.com,
	Nicolas Boichat <drinkcat@chromium.org>,
	anan.sun@mediatek.com, chao.hao@mediatek.com,
	ming-fan.chen@mediatek.com,
	Greg Kroah-Hartman <gregkh@google.com>,
	kernel-team@android.com
Subject: Re: [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU
Date: Fri, 2 Oct 2020 13:10:14 +0200	[thread overview]
Message-ID: <20201002111014.GE6888@pi3> (raw)
In-Reply-To: <20200930070647.10188-7-yong.wu@mediatek.com>

On Wed, Sep 30, 2020 at 03:06:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h

I see it depends on previous patches but does it have to be within one
commit? Is it not bisectable? The memory changes/bindings could go via
memory tree if this is split.

Best regards,
Krzysztof

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	kernel-team@android.com, Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Greg Kroah-Hartman <gregkh@google.com>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU
Date: Fri, 2 Oct 2020 13:10:14 +0200	[thread overview]
Message-ID: <20201002111014.GE6888@pi3> (raw)
In-Reply-To: <20200930070647.10188-7-yong.wu@mediatek.com>

On Wed, Sep 30, 2020 at 03:06:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h

I see it depends on previous patches but does it have to be within one
commit? Is it not bisectable? The memory changes/bindings could go via
memory tree if this is split.

Best regards,
Krzysztof
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	kernel-team@android.com, Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Greg Kroah-Hartman <gregkh@google.com>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU
Date: Fri, 2 Oct 2020 13:10:14 +0200	[thread overview]
Message-ID: <20201002111014.GE6888@pi3> (raw)
In-Reply-To: <20200930070647.10188-7-yong.wu@mediatek.com>

On Wed, Sep 30, 2020 at 03:06:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h

I see it depends on previous patches but does it have to be within one
commit? Is it not bisectable? The memory changes/bindings could go via
memory tree if this is split.

Best regards,
Krzysztof

_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
	kernel-team@android.com, Nicolas Boichat <drinkcat@chromium.org>,
	srv_heupstream@mediatek.com, chao.hao@mediatek.com,
	Robin Murphy <robin.murphy@arm.com>,
	Joerg Roedel <joro@8bytes.org>,
	Greg Kroah-Hartman <gregkh@google.com>,
	linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
	Tomasz Figa <tfiga@google.com>,
	iommu@lists.linux-foundation.org,
	Rob Herring <robh+dt@kernel.org>,
	linux-mediatek@lists.infradead.org,
	Matthias Brugger <matthias.bgg@gmail.com>,
	ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU
Date: Fri, 2 Oct 2020 13:10:14 +0200	[thread overview]
Message-ID: <20201002111014.GE6888@pi3> (raw)
In-Reply-To: <20200930070647.10188-7-yong.wu@mediatek.com>

On Wed, Sep 30, 2020 at 03:06:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
> 
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
> 
>                           EMI
>                            |
>                           M4U
>                            |
>                       ------------
>                        SMI Common
>                       ------------
>                            |
>   +-------+------+------+----------------------+-------+
>   |       |      |      |       ......         |       |
>   |       |      |      |                      |       |
> larb0   larb1  larb2  larb4     ......      larb19   larb20
> disp0   disp1   mdp    vdec                   IPE      IPE
> 
> All the connections are HW fixed, SW can NOT adjust it.
> 
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
> 
> domain-id  module     iova-range                  larbs
>    0       disp        0 ~ 4G                      larb0/1
>    1       vcodec      4G ~ 8G                     larb4/5/7
>    2       cam/mdp     8G ~ 12G             larb2/9/11/13/14/16/17/18/19/20
>    3       CCU0    0x4000_0000 ~ 0x43ff_ffff     larb13: port 9/10
>    4       CCU1    0x4400_0000 ~ 0x47ff_ffff     larb14: port 4/5
> 
> The iova range for CCU0/1(camera control unit) is HW requirement.
> 
> Signed-off-by: Yong Wu <yong.wu@mediatek.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---
>  .../bindings/iommu/mediatek,iommu.yaml        |   9 +-
>  .../mediatek,smi-common.yaml                  |   5 +-
>  .../memory-controllers/mediatek,smi-larb.yaml |   3 +-
>  include/dt-bindings/memory/mt8192-larb-port.h | 239 ++++++++++++++++++
>  4 files changed, 251 insertions(+), 5 deletions(-)
>  create mode 100644 include/dt-bindings/memory/mt8192-larb-port.h

I see it depends on previous patches but does it have to be within one
commit? Is it not bisectable? The memory changes/bindings could go via
memory tree if this is split.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-10-02 11:10 UTC|newest]

Thread overview: 213+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  7:06 [PATCH v3 00/24] MT8192 IOMMU support Yong Wu
2020-09-30  7:06 ` Yong Wu
2020-09-30  7:06 ` Yong Wu
2020-09-30  7:06 ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 01/24] dt-bindings: iommu: mediatek: Convert IOMMU to DT schema Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-02 10:58   ` Krzysztof Kozlowski
2020-10-02 10:58     ` Krzysztof Kozlowski
2020-10-02 10:58     ` Krzysztof Kozlowski
2020-10-02 10:58     ` Krzysztof Kozlowski
2020-10-30  9:47     ` Yong Wu
2020-10-02 11:07   ` Krzysztof Kozlowski
2020-10-02 11:07     ` Krzysztof Kozlowski
2020-10-02 11:07     ` Krzysztof Kozlowski
2020-10-02 11:07     ` Krzysztof Kozlowski
2020-10-06  4:26     ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-12 17:08       ` Krzysztof Kozlowski
2020-10-12 17:08         ` Krzysztof Kozlowski
2020-10-12 17:08         ` Krzysztof Kozlowski
2020-10-12 17:08         ` Krzysztof Kozlowski
2020-10-13  7:53         ` Yong Wu
2020-10-13  7:53           ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 02/24] dt-bindings: memory: mediatek: Convert SMI " Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-02 11:04   ` Krzysztof Kozlowski
2020-10-02 11:04     ` Krzysztof Kozlowski
2020-10-02 11:04     ` Krzysztof Kozlowski
2020-10-02 11:04     ` Krzysztof Kozlowski
2020-10-02 11:08   ` Krzysztof Kozlowski
2020-10-02 11:08     ` Krzysztof Kozlowski
2020-10-02 11:08     ` Krzysztof Kozlowski
2020-10-02 11:08     ` Krzysztof Kozlowski
2020-10-06  4:27     ` Yong Wu
2020-10-06  4:27       ` Yong Wu
2020-10-06  4:27       ` Yong Wu
2020-10-06  4:27       ` Yong Wu
2020-10-06  7:15       ` Krzysztof Kozlowski
2020-10-06  7:15         ` Krzysztof Kozlowski
2020-10-06  7:15         ` Krzysztof Kozlowski
2020-10-06  7:15         ` Krzysztof Kozlowski
2020-10-10  6:18         ` Yong Wu
2020-10-10  6:18           ` Yong Wu
2020-10-10  6:18           ` Yong Wu
2020-10-10  6:18           ` Yong Wu
2020-10-12  7:18           ` Krzysztof Kozlowski
2020-10-12  7:18             ` Krzysztof Kozlowski
2020-10-12  7:18             ` Krzysztof Kozlowski
2020-10-12  7:18             ` Krzysztof Kozlowski
2020-10-12 12:01             ` Yong Wu
2020-10-12 12:01               ` Yong Wu
2020-10-12 12:01               ` Yong Wu
2020-10-12 12:01               ` Yong Wu
2020-10-12 13:26               ` Krzysztof Kozlowski
2020-10-12 13:26                 ` Krzysztof Kozlowski
2020-10-12 13:26                 ` Krzysztof Kozlowski
2020-10-12 13:26                 ` Krzysztof Kozlowski
2020-10-13  7:53                 ` Yong Wu
2020-10-13  7:53                   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 03/24] dt-bindings: memory: mediatek: Add a common larb-port header file Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 04/24] dt-bindings: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 05/24] dt-bindings: memory: mediatek: Add domain definition Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 06/24] dt-bindings: mediatek: Add binding for mt8192 IOMMU Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-02 11:10   ` Krzysztof Kozlowski [this message]
2020-10-02 11:10     ` Krzysztof Kozlowski
2020-10-02 11:10     ` Krzysztof Kozlowski
2020-10-02 11:10     ` Krzysztof Kozlowski
2020-10-06  4:26     ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-06  4:26       ` Yong Wu
2020-10-06  7:19       ` Krzysztof Kozlowski
2020-10-06  7:19         ` Krzysztof Kozlowski
2020-10-06  7:19         ` Krzysztof Kozlowski
2020-10-06  7:19         ` Krzysztof Kozlowski
2020-09-30  7:06 ` [PATCH v3 07/24] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 08/24] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-23 11:17   ` Will Deacon
2020-10-23 11:17     ` Will Deacon
2020-10-23 11:17     ` Will Deacon
2020-10-23 11:17     ` Will Deacon
2020-10-26  7:49     ` Yong Wu
2020-10-26  7:49       ` Yong Wu
2020-10-26  7:49       ` Yong Wu
2020-10-26  7:49       ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 09/24] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-23 11:22   ` Will Deacon
2020-10-23 11:22     ` Will Deacon
2020-10-23 11:22     ` Will Deacon
2020-10-23 11:22     ` Will Deacon
2020-09-30  7:06 ` [PATCH v3 10/24] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-23 11:23   ` Will Deacon
2020-10-23 11:23     ` Will Deacon
2020-10-23 11:23     ` Will Deacon
2020-10-23 11:23     ` Will Deacon
2020-09-30  7:06 ` [PATCH v3 11/24] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-23 11:21   ` Will Deacon
2020-10-23 11:21     ` Will Deacon
2020-10-23 11:21     ` Will Deacon
2020-10-23 11:21     ` Will Deacon
2020-10-26  7:45     ` Yong Wu
2020-10-26  7:45       ` Yong Wu
2020-10-26  7:45       ` Yong Wu
2020-10-26  7:45       ` Yong Wu
2020-10-23 14:10   ` Robin Murphy
2020-10-23 14:10     ` Robin Murphy
2020-10-23 14:10     ` Robin Murphy
2020-10-23 14:10     ` Robin Murphy
2020-10-26  7:41     ` Yong Wu
2020-10-26  7:41       ` Yong Wu
2020-10-26  7:41       ` Yong Wu
2020-10-26  7:41       ` Yong Wu
2020-10-26 11:35       ` Robin Murphy
2020-10-26 11:35         ` Robin Murphy
2020-10-26 11:35         ` Robin Murphy
2020-10-26 11:35         ` Robin Murphy
2020-09-30  7:06 ` [PATCH v3 12/24] iommu/mediatek: Move hw_init into attach_device Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 13/24] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 14/24] iommu/mediatek: Add pm runtime callback Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 15/24] iommu/mediatek: Add power-domain operation Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 16/24] iommu/mediatek: Add iova reserved function Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 17/24] iommu/mediatek: Add single domain Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 18/24] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-06  7:18   ` Krzysztof Kozlowski
2020-10-06  7:18     ` Krzysztof Kozlowski
2020-10-06  7:18     ` Krzysztof Kozlowski
2020-10-06  7:18     ` Krzysztof Kozlowski
2020-09-30  7:06 ` [PATCH v3 19/24] iommu/mediatek: Support up to 34bit iova in tlb flush Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 20/24] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 21/24] iommu/mediatek: Add support for multi domain Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 22/24] iommu/mediatek: Adjust the structure Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 23/24] iommu/mediatek: Add mt8192 support Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06 ` [PATCH v3 24/24] memory: mtk-smi: " Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-09-30  7:06   ` Yong Wu
2020-10-02 11:15   ` Krzysztof Kozlowski
2020-10-02 11:15     ` Krzysztof Kozlowski
2020-10-02 11:15     ` Krzysztof Kozlowski
2020-10-02 11:15     ` Krzysztof Kozlowski
2020-10-26 20:08 ` [PATCH v3 00/24] MT8192 IOMMU support Krzysztof Kozlowski
2020-10-26 20:08   ` Krzysztof Kozlowski
2020-10-26 20:08   ` Krzysztof Kozlowski
2020-10-26 20:08   ` Krzysztof Kozlowski

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