All of lore.kernel.org
 help / color / mirror / Atom feed
From: Masayoshi Mizuma <msys.mizuma@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Sumit Garg <sumit.garg@linaro.org>,
	catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com,
	daniel.thompson@linaro.org, jason@lakedaemon.net,
	kgdb-bugreport@lists.sourceforge.net, dianders@chromium.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, jason.wessel@windriver.com,
	tglx@linutronix.de, julien.thierry.kdev@gmail.com
Subject: Re: [PATCH v4 1/5] arm64: Add framework to turn IPI as NMI
Date: Sat, 10 Oct 2020 11:13:07 -0400	[thread overview]
Message-ID: <20201010151307.vq74if4mndjn4nhm@gabell> (raw)
In-Reply-To: <877drypgqb.wl-maz@kernel.org>

On Sat, Oct 10, 2020 at 10:34:04AM +0100, Marc Zyngier wrote:
> On Sat, 10 Oct 2020 02:58:55 +0100,
> Masayoshi Mizuma <msys.mizuma@gmail.com> wrote:
> 
> [...]
> 
> > > +void ipi_nmi_setup(int cpu)
> > > +{
> > > +	if (!ipi_desc)
> > > +		return;
> > 
> > ipi_nmi_setup() may be called twice for CPU0:
> > 
> >   set_smp_ipi_range => set_smp_ipi_nmi => ipi_nmi_setup
> >                     => ipi_setup => ipi_nmi_setup
> > 
> > Actually, I got the following error message via the second ipi_nmi_setup():
> > 
> >   GICv3: Pseudo-NMIs enabled using relaxed ICC_PMR_EL1 synchronisation
> >   GICv3: Cannot set NMI property of enabled IRQ 8
> >   genirq: Failed to setup NMI delivery: irq 8
> > 
> > Why don't we have a check to prevent that? Like as:
> > 
> >        if (cpumask_test_cpu(cpu, ipi_desc->percpu_enabled))
> >                return;
> 
> That's definitely the wrong thing to do. prepare_nmi_setup() shouldn't
> be called twice, and papering over it isn't acceptable.

Got it. How about moving ipi_nmi_setup() from ipi_setup() to
secondary_start_kernel() ? so that CPU0 can call ipi_nmi_setup() only
from set_smp_ipi_nmi().

--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -245,6 +245,7 @@ asmlinkage notrace void secondary_start_kernel(void)
        notify_cpu_starting(cpu);
 
        ipi_setup(cpu);
+       ipi_nmi_setup(cpu);
 
        store_cpu_topology(cpu);
        numa_add_cpu(cpu);
@@ -966,8 +967,6 @@ static void ipi_setup(int cpu)
 
        for (i = 0; i < nr_ipi; i++)
                enable_percpu_irq(ipi_irq_base + i, 0);
-
-       ipi_nmi_setup(cpu);
 }
 
 #ifdef CONFIG_HOTPLUG_CPU

Thanks,
Masa

WARNING: multiple messages have this Message-ID (diff)
From: Masayoshi Mizuma <msys.mizuma@gmail.com>
To: Marc Zyngier <maz@kernel.org>
Cc: mark.rutland@arm.com, Sumit Garg <sumit.garg@linaro.org>,
	daniel.thompson@linaro.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, jason.wessel@windriver.com,
	dianders@chromium.org, linux-kernel@vger.kernel.org,
	julien.thierry.kdev@gmail.com,
	kgdb-bugreport@lists.sourceforge.net, tglx@linutronix.de,
	will@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 1/5] arm64: Add framework to turn IPI as NMI
Date: Sat, 10 Oct 2020 11:13:07 -0400	[thread overview]
Message-ID: <20201010151307.vq74if4mndjn4nhm@gabell> (raw)
In-Reply-To: <877drypgqb.wl-maz@kernel.org>

On Sat, Oct 10, 2020 at 10:34:04AM +0100, Marc Zyngier wrote:
> On Sat, 10 Oct 2020 02:58:55 +0100,
> Masayoshi Mizuma <msys.mizuma@gmail.com> wrote:
> 
> [...]
> 
> > > +void ipi_nmi_setup(int cpu)
> > > +{
> > > +	if (!ipi_desc)
> > > +		return;
> > 
> > ipi_nmi_setup() may be called twice for CPU0:
> > 
> >   set_smp_ipi_range => set_smp_ipi_nmi => ipi_nmi_setup
> >                     => ipi_setup => ipi_nmi_setup
> > 
> > Actually, I got the following error message via the second ipi_nmi_setup():
> > 
> >   GICv3: Pseudo-NMIs enabled using relaxed ICC_PMR_EL1 synchronisation
> >   GICv3: Cannot set NMI property of enabled IRQ 8
> >   genirq: Failed to setup NMI delivery: irq 8
> > 
> > Why don't we have a check to prevent that? Like as:
> > 
> >        if (cpumask_test_cpu(cpu, ipi_desc->percpu_enabled))
> >                return;
> 
> That's definitely the wrong thing to do. prepare_nmi_setup() shouldn't
> be called twice, and papering over it isn't acceptable.

Got it. How about moving ipi_nmi_setup() from ipi_setup() to
secondary_start_kernel() ? so that CPU0 can call ipi_nmi_setup() only
from set_smp_ipi_nmi().

--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -245,6 +245,7 @@ asmlinkage notrace void secondary_start_kernel(void)
        notify_cpu_starting(cpu);
 
        ipi_setup(cpu);
+       ipi_nmi_setup(cpu);
 
        store_cpu_topology(cpu);
        numa_add_cpu(cpu);
@@ -966,8 +967,6 @@ static void ipi_setup(int cpu)
 
        for (i = 0; i < nr_ipi; i++)
                enable_percpu_irq(ipi_irq_base + i, 0);
-
-       ipi_nmi_setup(cpu);
 }
 
 #ifdef CONFIG_HOTPLUG_CPU

Thanks,
Masa

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-10-10 23:10 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-11 13:28 [PATCH v4 0/5] arm64: Add framework to turn an IPI as NMI Sumit Garg
2020-09-11 13:28 ` Sumit Garg
2020-09-11 13:28 ` [PATCH v4 1/5] arm64: Add framework to turn " Sumit Garg
2020-09-11 13:28   ` Sumit Garg
2020-10-10  1:58   ` Masayoshi Mizuma
2020-10-10  1:58     ` Masayoshi Mizuma
2020-10-10  9:34     ` Marc Zyngier
2020-10-10  9:34       ` Marc Zyngier
2020-10-10 15:13       ` Masayoshi Mizuma [this message]
2020-10-10 15:13         ` Masayoshi Mizuma
2020-10-12 12:19         ` Sumit Garg
2020-10-12 12:19           ` Sumit Garg
2020-10-13  3:23           ` Masayoshi Mizuma
2020-10-13  3:23             ` Masayoshi Mizuma
2020-10-12 12:21     ` Sumit Garg
2020-10-12 12:21       ` Sumit Garg
2020-09-11 13:28 ` [PATCH v4 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs Sumit Garg
2020-09-11 13:28   ` Sumit Garg
2020-09-11 13:28 ` [PATCH v4 3/5] arm64: smp: Allocate and setup IPI as NMI Sumit Garg
2020-09-11 13:28   ` Sumit Garg
2020-09-11 13:28 ` [PATCH v4 4/5] arm64: kgdb: Round up cpus using " Sumit Garg
2020-09-11 13:28   ` Sumit Garg
2020-09-11 13:28 ` [PATCH v4 5/5] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg
2020-09-11 13:28   ` Sumit Garg

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201010151307.vq74if4mndjn4nhm@gabell \
    --to=msys.mizuma@gmail.com \
    --cc=catalin.marinas@arm.com \
    --cc=daniel.thompson@linaro.org \
    --cc=dianders@chromium.org \
    --cc=jason.wessel@windriver.com \
    --cc=jason@lakedaemon.net \
    --cc=julien.thierry.kdev@gmail.com \
    --cc=kgdb-bugreport@lists.sourceforge.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=sumit.garg@linaro.org \
    --cc=tglx@linutronix.de \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.