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From: Ira Weiny <ira.weiny@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Andy Lutomirski <luto@kernel.org>,
	Fenghua Yu <fenghua.yu@intel.com>,
	x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-nvdimm@lists.01.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org, linux-kselftest@vger.kernel.org
Subject: Re: [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch
Date: Fri, 16 Oct 2020 22:37:33 -0700	[thread overview]
Message-ID: <20201017053733.GA3702775@iweiny-DESK2.sc.intel.com> (raw)
In-Reply-To: <20201016110636.GL2611@hirez.programming.kicks-ass.net>

On Fri, Oct 16, 2020 at 01:06:36PM +0200, Peter Zijlstra wrote:
> On Fri, Oct 09, 2020 at 12:42:53PM -0700, ira.weiny@intel.com wrote:
> 
> > @@ -644,6 +663,8 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p)
> >  
> >  	if ((tifp ^ tifn) & _TIF_SLD)
> >  		switch_to_sld(tifn);
> > +
> > +	pks_sched_in();
> >  }
> >  
> 
> You seem to have lost the comment proposed here:
> 
>   https://lkml.kernel.org/r/20200717083140.GW10769@hirez.programming.kicks-ass.net
> 
> It is useful and important information that the wrmsr normally doesn't
> happen.

Added back in here.

> 
> > diff --git a/arch/x86/mm/pkeys.c b/arch/x86/mm/pkeys.c
> > index 3cf8f775f36d..30f65dd3d0c5 100644
> > --- a/arch/x86/mm/pkeys.c
> > +++ b/arch/x86/mm/pkeys.c
> > @@ -229,3 +229,31 @@ u32 update_pkey_val(u32 pk_reg, int pkey, unsigned int flags)
> >  
> >  	return pk_reg;
> >  }
> > +
> > +DEFINE_PER_CPU(u32, pkrs_cache);
> > +
> > +/**
> > + * It should also be noted that the underlying WRMSR(MSR_IA32_PKRS) is not
> > + * serializing but still maintains ordering properties similar to WRPKRU.
> > + * The current SDM section on PKRS needs updating but should be the same as
> > + * that of WRPKRU.  So to quote from the WRPKRU text:
> > + *
> > + * 	WRPKRU will never execute transiently. Memory accesses
> > + * 	affected by PKRU register will not execute (even transiently)
> > + * 	until all prior executions of WRPKRU have completed execution
> > + * 	and updated the PKRU register.
> 
> (whitespace damage; space followed by tabstop)

Fixed thanks.

> 
> > + */
> > +void write_pkrs(u32 new_pkrs)
> > +{
> > +	u32 *pkrs;
> > +
> > +	if (!static_cpu_has(X86_FEATURE_PKS))
> > +		return;
> > +
> > +	pkrs = get_cpu_ptr(&pkrs_cache);
> > +	if (*pkrs != new_pkrs) {
> > +		*pkrs = new_pkrs;
> > +		wrmsrl(MSR_IA32_PKRS, new_pkrs);
> > +	}
> > +	put_cpu_ptr(pkrs);
> > +}
> 
> looks familiar that... :-)

Added you as a co-developer if that is ok?

Ira
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WARNING: multiple messages have this Message-ID (diff)
From: Ira Weiny <ira.weiny@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	Andy Lutomirski <luto@kernel.org>,
	Fenghua Yu <fenghua.yu@intel.com>,
	x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Andrew Morton <akpm@linux-foundation.org>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-nvdimm@lists.01.org, linux-fsdevel@vger.kernel.org,
	linux-mm@kvack.org, linux-kselftest@vger.kernel.org
Subject: Re: [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch
Date: Fri, 16 Oct 2020 22:37:33 -0700	[thread overview]
Message-ID: <20201017053733.GA3702775@iweiny-DESK2.sc.intel.com> (raw)
In-Reply-To: <20201016110636.GL2611@hirez.programming.kicks-ass.net>

On Fri, Oct 16, 2020 at 01:06:36PM +0200, Peter Zijlstra wrote:
> On Fri, Oct 09, 2020 at 12:42:53PM -0700, ira.weiny@intel.com wrote:
> 
> > @@ -644,6 +663,8 @@ void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p)
> >  
> >  	if ((tifp ^ tifn) & _TIF_SLD)
> >  		switch_to_sld(tifn);
> > +
> > +	pks_sched_in();
> >  }
> >  
> 
> You seem to have lost the comment proposed here:
> 
>   https://lkml.kernel.org/r/20200717083140.GW10769@hirez.programming.kicks-ass.net
> 
> It is useful and important information that the wrmsr normally doesn't
> happen.

Added back in here.

> 
> > diff --git a/arch/x86/mm/pkeys.c b/arch/x86/mm/pkeys.c
> > index 3cf8f775f36d..30f65dd3d0c5 100644
> > --- a/arch/x86/mm/pkeys.c
> > +++ b/arch/x86/mm/pkeys.c
> > @@ -229,3 +229,31 @@ u32 update_pkey_val(u32 pk_reg, int pkey, unsigned int flags)
> >  
> >  	return pk_reg;
> >  }
> > +
> > +DEFINE_PER_CPU(u32, pkrs_cache);
> > +
> > +/**
> > + * It should also be noted that the underlying WRMSR(MSR_IA32_PKRS) is not
> > + * serializing but still maintains ordering properties similar to WRPKRU.
> > + * The current SDM section on PKRS needs updating but should be the same as
> > + * that of WRPKRU.  So to quote from the WRPKRU text:
> > + *
> > + * 	WRPKRU will never execute transiently. Memory accesses
> > + * 	affected by PKRU register will not execute (even transiently)
> > + * 	until all prior executions of WRPKRU have completed execution
> > + * 	and updated the PKRU register.
> 
> (whitespace damage; space followed by tabstop)

Fixed thanks.

> 
> > + */
> > +void write_pkrs(u32 new_pkrs)
> > +{
> > +	u32 *pkrs;
> > +
> > +	if (!static_cpu_has(X86_FEATURE_PKS))
> > +		return;
> > +
> > +	pkrs = get_cpu_ptr(&pkrs_cache);
> > +	if (*pkrs != new_pkrs) {
> > +		*pkrs = new_pkrs;
> > +		wrmsrl(MSR_IA32_PKRS, new_pkrs);
> > +	}
> > +	put_cpu_ptr(pkrs);
> > +}
> 
> looks familiar that... :-)

Added you as a co-developer if that is ok?

Ira

  reply	other threads:[~2020-10-17  5:37 UTC|newest]

Thread overview: 94+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-09 19:42 [PATCH RFC V3 0/9] PKS: Add Protection Keys Supervisor (PKS) support RFC v3 ira.weiny
2020-10-09 19:42 ` ira.weiny
2020-10-09 19:42 ` [PATCH RFC V3 1/9] x86/pkeys: Create pkeys_common.h ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 17:46   ` Dave Hansen
2020-10-13 17:46     ` Dave Hansen
2020-10-13 19:44     ` Ira Weiny
2020-10-13 19:44       ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 2/9] x86/fpu: Refactor arch_set_user_pkey_access() for PKS support ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 17:50   ` Dave Hansen
2020-10-13 17:50     ` Dave Hansen
2020-10-13 23:56     ` Ira Weiny
2020-10-13 23:56       ` Ira Weiny
2020-10-16 10:57   ` Peter Zijlstra
2020-10-16 10:57     ` Peter Zijlstra
2020-10-17  3:32     ` Ira Weiny
2020-10-17  3:32       ` Ira Weiny
2020-10-19  9:35       ` Peter Zijlstra
2020-10-19  9:35         ` Peter Zijlstra
2020-10-09 19:42 ` [PATCH RFC V3 3/9] x86/pks: Enable Protection Keys Supervisor (PKS) ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 18:23   ` Dave Hansen
2020-10-13 18:23     ` Dave Hansen
2020-10-14  2:08     ` Ira Weiny
2020-10-14  2:08       ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 4/9] x86/pks: Preserve the PKRS MSR on context switch ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 18:31   ` Dave Hansen
2020-10-13 18:31     ` Dave Hansen
2020-10-14 22:36     ` Ira Weiny
2020-10-14 22:36       ` Ira Weiny
2020-10-16 11:12     ` Peter Zijlstra
2020-10-16 11:12       ` Peter Zijlstra
2020-10-17  5:14       ` Ira Weiny
2020-10-17  5:14         ` Ira Weiny
2020-10-19  9:37         ` Peter Zijlstra
2020-10-19  9:37           ` Peter Zijlstra
2020-10-19 18:48           ` Ira Weiny
2020-10-19 18:48             ` Ira Weiny
2020-10-16 11:06   ` Peter Zijlstra
2020-10-16 11:06     ` Peter Zijlstra
2020-10-17  5:37     ` Ira Weiny [this message]
2020-10-17  5:37       ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 5/9] x86/pks: Add PKS kernel API ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 18:43   ` Dave Hansen
2020-10-13 18:43     ` Dave Hansen
2020-10-15  1:08     ` Ira Weiny
2020-10-15  1:08       ` Ira Weiny
2020-10-16 11:07   ` Peter Zijlstra
2020-10-16 11:07     ` Peter Zijlstra
2020-10-17  5:42     ` Ira Weiny
2020-10-17  5:42       ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 6/9] x86/entry: Pass irqentry_state_t by reference ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-16 11:45   ` Peter Zijlstra
2020-10-16 11:45     ` Peter Zijlstra
2020-10-16 12:55     ` Thomas Gleixner
2020-10-16 12:55       ` Thomas Gleixner
2020-10-19  5:37       ` Ira Weiny
2020-10-19  5:37         ` Ira Weiny
2020-10-19  9:32         ` Thomas Gleixner
2020-10-19  9:32           ` Thomas Gleixner
2020-10-19 20:26           ` Ira Weiny
2020-10-19 20:26             ` Ira Weiny
2020-10-19 21:12             ` Thomas Gleixner
2020-10-19 21:12               ` Thomas Gleixner
2020-10-20 14:10               ` Ira Weiny
2020-10-20 14:10                 ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 18:52   ` Dave Hansen
2020-10-13 18:52     ` Dave Hansen
2020-10-15  3:46     ` Ira Weiny
2020-10-15  3:46       ` Ira Weiny
2020-10-15  4:06       ` Dave Hansen
2020-10-15  4:06         ` Dave Hansen
2020-10-15  4:18         ` Ira Weiny
2020-10-15  4:18           ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 8/9] x86/fault: Report the PKRS state on fault ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 18:56   ` Dave Hansen
2020-10-13 18:56     ` Dave Hansen
2020-10-15  4:13     ` Ira Weiny
2020-10-15  4:13       ` Ira Weiny
2020-10-09 19:42 ` [PATCH RFC V3 9/9] x86/pks: Add PKS test code ira.weiny
2020-10-09 19:42   ` ira.weiny
2020-10-13 19:02   ` Dave Hansen
2020-10-13 19:02     ` Dave Hansen
2020-10-15  4:46     ` Ira Weiny
2020-10-15  4:46       ` Ira Weiny
2020-10-09 20:18 ` [PATCH RFC V3 0/9] PKS: Add Protection Keys Supervisor (PKS) support RFC v3 Ira Weiny
2020-10-09 20:18   ` Ira Weiny

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