From: David Woodhouse <dwmw2@infradead.org> To: x86@kernel.org Cc: kvm <kvm@vger.kernel.org>, iommu@lists.linux-foundation.org, joro@8bytes.org, Thomas Gleixner <tglx@linutronix.de>, Paolo Bonzini <pbonzini@redhat.com>, linux-kernel <linux-kernel@vger.kernel.org>, linux-hyperv@vger.kernel.org, maz@misterjones.org, Dexuan Cui <decui@microsoft.com> Subject: [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member Date: Sat, 24 Oct 2020 22:35:11 +0100 [thread overview] Message-ID: <20201024213535.443185-12-dwmw2@infradead.org> (raw) In-Reply-To: <20201024213535.443185-1-dwmw2@infradead.org> From: Thomas Gleixner <tglx@linutronix.de> Architectures like x86 have their MSI messages in various bits of the data, address_lo and address_hi field. Composing or decomposing these messages with bitmasks and shifts is possible, but unreadable gunk. Allow architectures to provide an architecture specific representation for each member of msi_msg. Provide empty defaults for each and stick them into an union. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> --- include/asm-generic/msi.h | 4 ++++ include/linux/msi.h | 46 +++++++++++++++++++++++++++++++++++---- 2 files changed, 46 insertions(+), 4 deletions(-) diff --git a/include/asm-generic/msi.h b/include/asm-generic/msi.h index e6795f088bdd..25344de0e8f9 100644 --- a/include/asm-generic/msi.h +++ b/include/asm-generic/msi.h @@ -4,6 +4,8 @@ #include <linux/types.h> +#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN + #ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS # define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2 #endif @@ -30,4 +32,6 @@ typedef struct msi_alloc_info { #define GENERIC_MSI_DOMAIN_OPS 1 +#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ + #endif diff --git a/include/linux/msi.h b/include/linux/msi.h index 6b584cc4757c..360a0a7e7341 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -4,11 +4,50 @@ #include <linux/kobject.h> #include <linux/list.h> +#include <asm/msi.h> + +/* Dummy shadow structures if an architecture does not define them */ +#ifndef arch_msi_msg_addr_lo +typedef struct arch_msi_msg_addr_lo { + u32 address_lo; +} __attribute__ ((packed)) arch_msi_msg_addr_lo_t; +#endif + +#ifndef arch_msi_msg_addr_hi +typedef struct arch_msi_msg_addr_hi { + u32 address_hi; +} __attribute__ ((packed)) arch_msi_msg_addr_hi_t; +#endif + +#ifndef arch_msi_msg_data +typedef struct arch_msi_msg_data { + u32 data; +} __attribute__ ((packed)) arch_msi_msg_data_t; +#endif +/** + * msi_msg - Representation of a MSI message + * @address_lo: Low 32 bits of msi message address + * @arch_addrlo: Architecture specific shadow of @address_lo + * @address_hi: High 32 bits of msi message address + * (only used when device supports it) + * @arch_addrhi: Architecture specific shadow of @address_hi + * @data: MSI message data (usually 16 bits) + * @arch_data: Architecture specific shadow of @data + */ struct msi_msg { - u32 address_lo; /* low 32 bits of msi message address */ - u32 address_hi; /* high 32 bits of msi message address */ - u32 data; /* 16 bits of msi message data */ + union { + u32 address_lo; + arch_msi_msg_addr_lo_t arch_addr_lo; + }; + union { + u32 address_hi; + arch_msi_msg_addr_hi_t arch_addr_hi; + }; + union { + u32 data; + arch_msi_msg_data_t arch_data; + }; }; extern int pci_msi_ignore_mask; @@ -243,7 +282,6 @@ struct msi_controller { #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #include <linux/irqhandler.h> -#include <asm/msi.h> struct irq_domain; struct irq_domain_ops; -- 2.26.2
WARNING: multiple messages have this Message-ID (diff)
From: David Woodhouse <dwmw2@infradead.org> To: x86@kernel.org Cc: linux-hyperv@vger.kernel.org, kvm <kvm@vger.kernel.org>, Dexuan Cui <decui@microsoft.com>, linux-kernel <linux-kernel@vger.kernel.org>, iommu@lists.linux-foundation.org, maz@misterjones.org, Paolo Bonzini <pbonzini@redhat.com>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member Date: Sat, 24 Oct 2020 22:35:11 +0100 [thread overview] Message-ID: <20201024213535.443185-12-dwmw2@infradead.org> (raw) In-Reply-To: <20201024213535.443185-1-dwmw2@infradead.org> From: Thomas Gleixner <tglx@linutronix.de> Architectures like x86 have their MSI messages in various bits of the data, address_lo and address_hi field. Composing or decomposing these messages with bitmasks and shifts is possible, but unreadable gunk. Allow architectures to provide an architecture specific representation for each member of msi_msg. Provide empty defaults for each and stick them into an union. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> --- include/asm-generic/msi.h | 4 ++++ include/linux/msi.h | 46 +++++++++++++++++++++++++++++++++++---- 2 files changed, 46 insertions(+), 4 deletions(-) diff --git a/include/asm-generic/msi.h b/include/asm-generic/msi.h index e6795f088bdd..25344de0e8f9 100644 --- a/include/asm-generic/msi.h +++ b/include/asm-generic/msi.h @@ -4,6 +4,8 @@ #include <linux/types.h> +#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN + #ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS # define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2 #endif @@ -30,4 +32,6 @@ typedef struct msi_alloc_info { #define GENERIC_MSI_DOMAIN_OPS 1 +#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ + #endif diff --git a/include/linux/msi.h b/include/linux/msi.h index 6b584cc4757c..360a0a7e7341 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -4,11 +4,50 @@ #include <linux/kobject.h> #include <linux/list.h> +#include <asm/msi.h> + +/* Dummy shadow structures if an architecture does not define them */ +#ifndef arch_msi_msg_addr_lo +typedef struct arch_msi_msg_addr_lo { + u32 address_lo; +} __attribute__ ((packed)) arch_msi_msg_addr_lo_t; +#endif + +#ifndef arch_msi_msg_addr_hi +typedef struct arch_msi_msg_addr_hi { + u32 address_hi; +} __attribute__ ((packed)) arch_msi_msg_addr_hi_t; +#endif + +#ifndef arch_msi_msg_data +typedef struct arch_msi_msg_data { + u32 data; +} __attribute__ ((packed)) arch_msi_msg_data_t; +#endif +/** + * msi_msg - Representation of a MSI message + * @address_lo: Low 32 bits of msi message address + * @arch_addrlo: Architecture specific shadow of @address_lo + * @address_hi: High 32 bits of msi message address + * (only used when device supports it) + * @arch_addrhi: Architecture specific shadow of @address_hi + * @data: MSI message data (usually 16 bits) + * @arch_data: Architecture specific shadow of @data + */ struct msi_msg { - u32 address_lo; /* low 32 bits of msi message address */ - u32 address_hi; /* high 32 bits of msi message address */ - u32 data; /* 16 bits of msi message data */ + union { + u32 address_lo; + arch_msi_msg_addr_lo_t arch_addr_lo; + }; + union { + u32 address_hi; + arch_msi_msg_addr_hi_t arch_addr_hi; + }; + union { + u32 data; + arch_msi_msg_data_t arch_data; + }; }; extern int pci_msi_ignore_mask; @@ -243,7 +282,6 @@ struct msi_controller { #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #include <linux/irqhandler.h> -#include <asm/msi.h> struct irq_domain; struct irq_domain_ops; -- 2.26.2 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2020-10-24 21:38 UTC|newest] Thread overview: 254+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-07 12:20 [PATCH 0/5] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse 2020-10-07 12:20 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-07 12:20 ` [PATCH 2/5] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-07 12:20 ` [PATCH 3/5] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-08 9:12 ` Peter Zijlstra 2020-10-08 17:05 ` David Woodhouse 2020-10-08 11:41 ` Thomas Gleixner 2020-10-07 12:20 ` [PATCH 4/5] x86/apic: Support 15 bits of APIC ID in IOAPIC/MSI where available David Woodhouse 2020-10-08 11:54 ` Thomas Gleixner 2020-10-08 12:02 ` Thomas Gleixner 2020-10-08 13:00 ` David Woodhouse 2020-10-07 12:20 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-08 12:05 ` Thomas Gleixner 2020-10-08 12:55 ` David Woodhouse 2020-10-08 16:08 ` David Woodhouse 2020-10-08 21:14 ` Thomas Gleixner 2020-10-08 21:39 ` David Woodhouse 2020-10-08 23:27 ` Thomas Gleixner 2020-10-09 6:07 ` David Woodhouse 2020-10-10 10:06 ` David Woodhouse 2020-10-10 11:44 ` Thomas Gleixner 2020-10-10 11:58 ` David Woodhouse 2020-10-11 17:12 ` Thomas Gleixner 2020-10-11 21:15 ` David Woodhouse 2020-10-12 9:33 ` Thomas Gleixner 2020-10-12 16:06 ` David Woodhouse 2020-10-12 18:38 ` Thomas Gleixner 2020-10-12 20:20 ` David Woodhouse 2020-10-12 22:13 ` Thomas Gleixner 2020-10-13 7:52 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 0/9] Remove irq_remapping_get_irq_domain() David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 1/9] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 2/9] x86/apic: Add select() method on vector irqdomain David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 3/9] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 4/9] iommu/vt-d: " David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 5/9] iommu/hyper-v: " David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 6/9] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 7/9] x86/ioapic: " David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 8/9] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 8:11 ` [PATCH 9/9] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse 2020-10-13 8:11 ` David Woodhouse 2020-10-13 9:28 ` [PATCH 5/5] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID Thomas Gleixner 2020-10-13 10:15 ` David Woodhouse 2020-10-13 10:46 ` Thomas Gleixner 2020-10-13 10:53 ` David Woodhouse 2020-10-13 11:51 ` David Woodhouse 2020-10-13 12:40 ` Thomas Gleixner 2020-10-08 11:46 ` [PATCH 1/5] x86/apic: Fix x2apic enablement without interrupt remapping Thomas Gleixner 2020-10-09 10:46 ` [PATCH v2 0/8] Fix x2apic enablement and allow up to 32768 CPUs without IR where supported David Woodhouse 2020-10-09 10:46 ` [PATCH v2 1/8] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-09 10:46 ` [PATCH v2 2/8] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-09 10:46 ` [PATCH v2 3/8] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse 2020-10-09 10:46 ` [PATCH v2 4/8] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-09 10:46 ` [PATCH v2 5/8] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse 2020-10-09 10:46 ` [PATCH v2 6/8] x86/kvm: Add KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-09 10:46 ` [PATCH v2 7/8] x86/hpet: Move MSI support into hpet.c David Woodhouse 2020-10-09 10:46 ` [PATCH v2 8/8] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse 2020-10-22 21:43 ` Thomas Gleixner 2020-10-22 22:10 ` Thomas Gleixner 2020-10-23 17:04 ` David Woodhouse 2020-10-23 10:10 ` David Woodhouse 2020-10-23 21:28 ` Thomas Gleixner 2020-10-24 8:26 ` David Woodhouse 2020-10-24 8:41 ` David Woodhouse 2020-10-24 9:13 ` Paolo Bonzini 2020-10-24 10:13 ` David Woodhouse 2020-10-24 12:44 ` David Woodhouse 2020-10-24 21:35 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-24 21:35 ` [PATCH v3 01/35] x86/apic: Fix x2apic enablement without interrupt remapping David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 02/35] x86/msi: Only use high bits of MSI address for DMAR unit David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 03/35] x86/apic/uv: Fix inconsistent destination mode David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 04/35] x86/devicetree: Fix the ioapic interrupt type table David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 05/35] x86/apic: Cleanup delivery mode defines David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 06/35] x86/apic: Replace pointless apic::dest_logical usage David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Replace pointless apic:: Dest_logical usage tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 07/35] x86/apic: Get rid of apic::dest_logical David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] x86/apic: Get rid of apic:: Dest_logical tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 08/35] x86/apic: Cleanup destination mode David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 09/35] x86/apic: Always provide irq_compose_msi_msg() method for vector domain David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 10/35] x86/hpet: Move MSI support into hpet.c David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` David Woodhouse [this message] 2020-10-24 21:35 ` [PATCH v3 11/35] genirq/msi: Allow shadow declarations of msi_msg::$member David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] genirq/msi: Allow shadow declarations of msi_msg:: $member tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2022-04-06 8:36 ` [PATCH v3 12/35] " Reto Buerki 2022-04-06 8:36 ` Reto Buerki 2022-04-06 8:36 ` [PATCH] x86/msi: Fix msi message data shadow struct Reto Buerki 2022-04-06 8:36 ` Reto Buerki 2022-04-06 22:11 ` Thomas Gleixner 2022-04-06 22:11 ` Thomas Gleixner 2022-04-07 11:06 ` Reto Buerki 2022-04-07 11:06 ` Reto Buerki 2022-04-07 13:24 ` [tip: x86/urgent] " tip-bot2 for Reto Buerki 2022-04-06 22:07 ` [PATCH v3 12/35] x86/msi: Provide msi message shadow structs Thomas Gleixner 2022-04-06 22:07 ` Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 13/35] iommu/intel: Use msi_msg " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 14/35] iommu/amd: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 15/35] PCI: vmd: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-28 20:49 ` Kees Cook 2020-10-28 20:49 ` Kees Cook 2020-10-28 21:13 ` Thomas Gleixner 2020-10-28 21:13 ` Thomas Gleixner 2020-10-28 23:22 ` Kees Cook 2020-10-28 23:22 ` Kees Cook 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 16/35] x86/kvm: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 17/35] x86/pci/xen: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-25 9:49 ` David Laight 2020-10-25 9:49 ` David Laight 2020-10-25 10:26 ` David Woodhouse 2020-10-25 10:26 ` David Woodhouse 2020-10-25 13:20 ` David Laight 2020-10-25 13:20 ` David Laight 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 18/35] x86/msi: Remove msidef.h David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-11-09 23:15 ` Tom Lendacky 2020-11-10 3:30 ` [EXTERNAL] " David Woodhouse 2020-11-10 6:10 ` Borislav Petkov 2020-11-10 14:34 ` Thomas Gleixner 2020-11-10 14:55 ` Tom Lendacky 2020-11-10 15:54 ` Thomas Gleixner 2020-11-10 16:01 ` [EXTERNAL] " David Woodhouse 2020-11-10 16:17 ` Tom Lendacky 2020-11-10 16:33 ` [EXTERNAL] " David Woodhouse 2020-11-10 17:04 ` Tom Lendacky 2020-11-10 17:50 ` Thomas Gleixner 2020-11-10 18:56 ` Thomas Gleixner 2020-11-10 19:21 ` David Woodhouse 2020-11-10 21:01 ` Thomas Gleixner 2020-11-10 21:30 ` David Woodhouse 2020-11-10 22:00 ` Tom Lendacky 2020-11-10 22:48 ` Thomas Gleixner 2020-11-10 23:05 ` Tom Lendacky 2020-11-11 8:16 ` David Woodhouse 2020-11-11 9:46 ` Thomas Gleixner 2020-11-11 10:36 ` David Woodhouse 2020-11-11 12:32 ` David Woodhouse 2020-11-11 20:30 ` Tom Lendacky 2020-11-11 21:19 ` David Woodhouse 2020-11-13 15:14 ` David Woodhouse 2020-11-16 18:02 ` David Woodhouse 2020-11-17 2:00 ` Suravee Suthikulpanit 2020-11-18 10:29 ` Suravee Suthikulpanit 2020-11-18 10:52 ` David Woodhouse 2020-11-18 14:06 ` Thomas Gleixner 2020-11-18 16:51 ` Suravee Suthikulpanit 2020-11-18 17:08 ` David Woodhouse 2020-11-18 20:16 ` [tip: x86/apic] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode tip-bot2 for David Woodhouse 2020-11-11 14:43 ` [PATCH 1/3] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled David Woodhouse 2020-11-11 14:43 ` [PATCH 2/3] iommu/amd: Fix union of bitfields in intcapxt support David Woodhouse 2020-11-11 22:06 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-11-11 14:43 ` [PATCH 3/3] iommu/amd: Fix IOMMU interrupt generation in X2APIC mode David Woodhouse 2020-11-11 22:06 ` [tip: x86/apic] iommu/amd: Don't register interrupt remapping irqdomain when IR is disabled tip-bot2 for David Woodhouse 2020-11-10 17:47 ` [tip: x86/apic] x86/ioapic: Correct the PCI/ISA trigger type selection tip-bot2 for Thomas Gleixner 2020-11-10 6:31 ` [PATCH v3 19/35] x86/io_apic: Cleanup trigger/polarity helpers Qian Cai 2020-11-10 6:31 ` Qian Cai 2020-11-10 8:59 ` David Woodhouse 2020-11-10 8:59 ` David Woodhouse 2020-11-10 16:26 ` Paolo Bonzini 2020-11-10 16:26 ` Paolo Bonzini 2020-10-24 21:35 ` [PATCH v3 20/35] x86/ioapic: Cleanup IO/APIC route entry structs David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for Thomas Gleixner 2020-10-24 21:35 ` [PATCH v3 21/35] x86/ioapic: Generate RTE directly from parent irqchip's MSI message David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 22/35] genirq/irqdomain: Implement get_name() method on irqchip fwnodes David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-25 9:41 ` Marc Zyngier 2020-10-25 9:41 ` Marc Zyngier 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 23/35] x86/apic: Add select() method on vector irqdomain David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 24/35] iommu/amd: Implement select() method on remapping irqdomain David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 25/35] iommu/vt-d: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 26/35] iommu/hyper-v: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 27/35] x86/hpet: Use irq_find_matching_fwspec() to find " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 28/35] x86/ioapic: " David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 29/35] x86: Kill all traces of irq_remapping_get_irq_domain() David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 30/35] iommu/vt-d: Simplify intel_irq_remapping_select() David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 31/35] x86/ioapic: Handle Extended Destination ID field in RTE David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 32/35] x86/apic: Support 15 bits of APIC ID in MSI where available David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 33/35] iommu/hyper-v: Disable IRQ pseudo-remapping if 15 bit APIC IDs are available David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-24 21:35 ` [PATCH v3 34/35] x86/kvm: Reserve KVM_FEATURE_MSI_EXT_DEST_ID David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-24 21:35 ` [PATCH v3 35/35] x86/kvm: Enable 15-bit extension when KVM_FEATURE_MSI_EXT_DEST_ID detected David Woodhouse 2020-10-24 21:35 ` David Woodhouse 2020-10-29 12:15 ` [tip: x86/apic] " tip-bot2 for David Woodhouse 2020-10-25 8:12 ` [PATCH v3 00/35] Fix x2apic enablement and allow more CPUs, clean up I/OAPIC and MSI bitfields David Woodhouse 2020-10-25 8:12 ` David Woodhouse
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