From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
Marc Zyngier <maz@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Peter Zijlstra <peterz@infradead.org>,
Morten Rasmussen <morten.rasmussen@arm.com>,
Qais Yousef <qais.yousef@arm.com>,
Suren Baghdasaryan <surenb@google.com>,
kernel-team@android.com
Subject: Re: [PATCH 5/6] arm64: Advertise CPUs capable of running 32-bit applcations in sysfs
Date: Wed, 28 Oct 2020 12:15:07 +0000 [thread overview]
Message-ID: <20201028121506.GG13345@gaia> (raw)
In-Reply-To: <20201027215118.27003-6-will@kernel.org>
On Tue, Oct 27, 2020 at 09:51:17PM +0000, Will Deacon wrote:
> diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
> index b555df825447..19893fb8e870 100644
> --- a/Documentation/ABI/testing/sysfs-devices-system-cpu
> +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
> @@ -472,6 +472,14 @@ Description: AArch64 CPU registers
> 'identification' directory exposes the CPU ID registers for
> identifying model and revision of the CPU.
>
> +What: /sys/devices/system/cpu/aarch32_el0
Nitpick: should we call this aarch32_el0_present? It's not exactly
present as we populate it as CPUs come online but it's closer to this
mask than to the online one.
> +Date: October 2020
> +Contact: Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
> +Description: Identifies the subset of CPUs in the system that can execute
> + AArch32 (32-bit ARM) applications. If absent, then all or none
> + of the CPUs can execute AArch32 applications and execve() will
> + behave accordingly.
What does "accordingly" mean? Normally, we'd get ENOEXEC but here the
execve() "succeeds" followed by a SIGKILL if it ends up on the wrong
CPU.
--
Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arch@vger.kernel.org, kernel-team@android.com,
Peter Zijlstra <peterz@infradead.org>,
Marc Zyngier <maz@kernel.org>, Qais Yousef <qais.yousef@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Suren Baghdasaryan <surenb@google.com>,
Morten Rasmussen <morten.rasmussen@arm.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 5/6] arm64: Advertise CPUs capable of running 32-bit applcations in sysfs
Date: Wed, 28 Oct 2020 12:15:07 +0000 [thread overview]
Message-ID: <20201028121506.GG13345@gaia> (raw)
In-Reply-To: <20201027215118.27003-6-will@kernel.org>
On Tue, Oct 27, 2020 at 09:51:17PM +0000, Will Deacon wrote:
> diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
> index b555df825447..19893fb8e870 100644
> --- a/Documentation/ABI/testing/sysfs-devices-system-cpu
> +++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
> @@ -472,6 +472,14 @@ Description: AArch64 CPU registers
> 'identification' directory exposes the CPU ID registers for
> identifying model and revision of the CPU.
>
> +What: /sys/devices/system/cpu/aarch32_el0
Nitpick: should we call this aarch32_el0_present? It's not exactly
present as we populate it as CPUs come online but it's closer to this
mask than to the online one.
> +Date: October 2020
> +Contact: Linux ARM Kernel Mailing list <linux-arm-kernel@lists.infradead.org>
> +Description: Identifies the subset of CPUs in the system that can execute
> + AArch32 (32-bit ARM) applications. If absent, then all or none
> + of the CPUs can execute AArch32 applications and execve() will
> + behave accordingly.
What does "accordingly" mean? Normally, we'd get ENOEXEC but here the
execve() "succeeds" followed by a SIGKILL if it ends up on the wrong
CPU.
--
Catalin
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-29 0:57 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-27 21:51 [PATCH 0/6] An alternative series for asymmetric AArch32 systems Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-27 21:51 ` [PATCH 1/6] KVM: arm64: Handle Asymmetric " Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-27 21:51 ` [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-28 11:12 ` Catalin Marinas
2020-10-28 11:12 ` Catalin Marinas
2020-10-28 11:17 ` Will Deacon
2020-10-28 11:17 ` Will Deacon
2020-10-28 11:22 ` Catalin Marinas
2020-10-28 11:22 ` Catalin Marinas
2020-10-28 11:23 ` Will Deacon
2020-10-28 11:23 ` Will Deacon
2020-10-28 11:49 ` Catalin Marinas
2020-10-28 11:49 ` Catalin Marinas
2020-10-28 12:40 ` Will Deacon
2020-10-28 12:40 ` Will Deacon
2020-10-28 18:56 ` Catalin Marinas
2020-10-28 18:56 ` Catalin Marinas
2020-10-29 22:20 ` Will Deacon
2020-10-29 22:20 ` Will Deacon
2020-10-30 11:18 ` Catalin Marinas
2020-10-30 11:18 ` Catalin Marinas
2020-10-30 16:13 ` Will Deacon
2020-10-30 16:13 ` Will Deacon
2020-11-02 11:44 ` Catalin Marinas
2020-11-02 11:44 ` Catalin Marinas
2020-11-05 21:38 ` Will Deacon
2020-11-05 21:38 ` Will Deacon
2020-11-06 12:54 ` Qais Yousef
2020-11-06 12:54 ` Qais Yousef
2020-11-06 13:00 ` Will Deacon
2020-11-06 13:00 ` Will Deacon
2020-11-06 14:48 ` Qais Yousef
2020-11-06 14:48 ` Qais Yousef
2020-11-09 13:52 ` Will Deacon
2020-11-09 13:52 ` Will Deacon
2020-11-11 16:27 ` Qais Yousef
2020-11-11 16:27 ` Qais Yousef
2020-11-12 10:24 ` Will Deacon
2020-11-12 10:24 ` Will Deacon
2020-11-12 11:55 ` Qais Yousef
2020-11-12 11:55 ` Qais Yousef
2020-11-12 16:49 ` Qais Yousef
2020-11-12 16:49 ` Qais Yousef
2020-11-12 17:06 ` Marc Zyngier
2020-11-12 17:06 ` Marc Zyngier
2020-11-12 17:36 ` Qais Yousef
2020-11-12 17:36 ` Qais Yousef
2020-11-12 17:44 ` Will Deacon
2020-11-12 17:44 ` Will Deacon
2020-11-12 17:36 ` Will Deacon
2020-11-12 17:36 ` Will Deacon
2020-11-13 10:45 ` Qais Yousef
2020-11-13 10:45 ` Qais Yousef
2020-11-06 14:30 ` Catalin Marinas
2020-11-06 14:30 ` Catalin Marinas
2020-10-28 11:18 ` Catalin Marinas
2020-10-28 11:18 ` Catalin Marinas
2020-10-28 11:21 ` Will Deacon
2020-10-28 11:21 ` Will Deacon
2020-10-27 21:51 ` [PATCH 3/6] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched " Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-27 21:51 ` [PATCH 4/6] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-28 12:10 ` Catalin Marinas
2020-10-28 12:10 ` Catalin Marinas
2020-10-28 12:36 ` Will Deacon
2020-10-28 12:36 ` Will Deacon
2020-10-27 21:51 ` [PATCH 5/6] arm64: Advertise CPUs capable of running 32-bit applcations in sysfs Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-28 8:37 ` Greg Kroah-Hartman
2020-10-28 8:37 ` Greg Kroah-Hartman
2020-10-28 9:51 ` Will Deacon
2020-10-28 9:51 ` Will Deacon
2020-10-28 12:15 ` Catalin Marinas [this message]
2020-10-28 12:15 ` Catalin Marinas
2020-10-28 12:27 ` Will Deacon
2020-10-28 12:27 ` Will Deacon
2020-10-28 15:14 ` Catalin Marinas
2020-10-28 15:14 ` Catalin Marinas
2020-10-28 15:35 ` Will Deacon
2020-10-28 15:35 ` Will Deacon
2020-10-27 21:51 ` [PATCH 6/6] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0 Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-29 18:42 ` [PATCH 0/6] An alternative series for asymmetric AArch32 systems Suren Baghdasaryan
2020-10-29 18:42 ` Suren Baghdasaryan
2020-10-29 22:17 ` Will Deacon
2020-10-29 22:17 ` Will Deacon
2020-10-30 16:16 ` Marc Zyngier
2020-10-30 16:16 ` Marc Zyngier
2020-10-30 16:24 ` Will Deacon
2020-10-30 16:24 ` Will Deacon
2020-10-30 17:04 ` Marc Zyngier
2020-10-30 17:04 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201028121506.GG13345@gaia \
--to=catalin.marinas@arm.com \
--cc=gregkh@linuxfoundation.org \
--cc=kernel-team@android.com \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=morten.rasmussen@arm.com \
--cc=peterz@infradead.org \
--cc=qais.yousef@arm.com \
--cc=surenb@google.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.