From: Lucas Stach <l.stach@pengutronix.de> To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: Fabio Estevam <festevam@gmail.com>, Marek Vasut <marex@denx.de>, Adam Ford <aford173@gmail.com>, Frieder Schrempf <frieder.schrempf@kontron.de>, NXP Linux Team <linux-imx@nxp.com>, kernel@pengutronix.de, patchwork-lst@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and power domains Date: Thu, 5 Nov 2020 18:44:33 +0100 [thread overview] Message-ID: <20201105174434.1817539-13-l.stach@pengutronix.de> (raw) In-Reply-To: <20201105174434.1817539-1-l.stach@pengutronix.de> This adds the DT nodes to describe the power domains available on the i.MX8MM. Things are a bit more complex compared to other GPCv2 power domain setups, as there is now a hierarchy of domains where complete subsystems (HSIO, GPU, DISPLAY) can be gated as a whole, but also fine granular gating within those subsystems is possible. Note that this is still incomplete, as both VPU and DISP domains are missing their reset clocks. Those aren't directly sourced from the CCM, but have another level of clock gating in the BLKCTL of those domains, which needs a separate driver. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 58 +++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index b83f400def8b..c21901a8aea9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -4,6 +4,8 @@ */ #include <dt-bindings/clock/imx8mm-clock.h> +#include <dt-bindings/power/imx8mm-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -547,6 +549,62 @@ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mm-gpc"; + reg = <0x303a0000 0x10000>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_hsiomix: power-domain@0 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_HSIOMIX>; + clocks = <&clk IMX8MM_CLK_USB_BUS>; + }; + + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_PCIE>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg1: power-domain@2 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_OTG1>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg2: power-domain@3 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_OTG2>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_gpumix: power-domain@4 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_GPUMIX>; + clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU_AHB>; + }; + + pgc_gpu: power-domain@5 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_GPU>; + clocks = <&clk IMX8MM_CLK_GPU_AHB>, + <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU2D_ROOT>, + <&clk IMX8MM_CLK_GPU3D_ROOT>; + resets = <&src IMX8MQ_RESET_GPU_RESET>; + power-domains = <&pgc_gpumix>; + }; + }; + }; }; aips2: bus@30400000 { -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Lucas Stach <l.stach@pengutronix.de> To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org> Cc: Marek Vasut <marex@denx.de>, devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>, Frieder Schrempf <frieder.schrempf@kontron.de>, patchwork-lst@pengutronix.de, NXP Linux Team <linux-imx@nxp.com>, kernel@pengutronix.de, Adam Ford <aford173@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and power domains Date: Thu, 5 Nov 2020 18:44:33 +0100 [thread overview] Message-ID: <20201105174434.1817539-13-l.stach@pengutronix.de> (raw) In-Reply-To: <20201105174434.1817539-1-l.stach@pengutronix.de> This adds the DT nodes to describe the power domains available on the i.MX8MM. Things are a bit more complex compared to other GPCv2 power domain setups, as there is now a hierarchy of domains where complete subsystems (HSIO, GPU, DISPLAY) can be gated as a whole, but also fine granular gating within those subsystems is possible. Note that this is still incomplete, as both VPU and DISP domains are missing their reset clocks. Those aren't directly sourced from the CCM, but have another level of clock gating in the BLKCTL of those domains, which needs a separate driver. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 58 +++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index b83f400def8b..c21901a8aea9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -4,6 +4,8 @@ */ #include <dt-bindings/clock/imx8mm-clock.h> +#include <dt-bindings/power/imx8mm-power.h> +#include <dt-bindings/reset/imx8mq-reset.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -547,6 +549,62 @@ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #reset-cells = <1>; }; + + gpc: gpc@303a0000 { + compatible = "fsl,imx8mm-gpc"; + reg = <0x303a0000 0x10000>; + interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; + + pgc { + #address-cells = <1>; + #size-cells = <0>; + + pgc_hsiomix: power-domain@0 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_HSIOMIX>; + clocks = <&clk IMX8MM_CLK_USB_BUS>; + }; + + pgc_pcie: power-domain@1 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_PCIE>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg1: power-domain@2 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_OTG1>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_otg2: power-domain@3 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_OTG2>; + power-domains = <&pgc_hsiomix>; + }; + + pgc_gpumix: power-domain@4 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_GPUMIX>; + clocks = <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU_AHB>; + }; + + pgc_gpu: power-domain@5 { + #power-domain-cells = <0>; + reg = <IMX8MM_POWER_DOMAIN_GPU>; + clocks = <&clk IMX8MM_CLK_GPU_AHB>, + <&clk IMX8MM_CLK_GPU_BUS_ROOT>, + <&clk IMX8MM_CLK_GPU2D_ROOT>, + <&clk IMX8MM_CLK_GPU3D_ROOT>; + resets = <&src IMX8MQ_RESET_GPU_RESET>; + power-domains = <&pgc_gpumix>; + }; + }; + }; }; aips2: bus@30400000 { -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-11-05 17:44 UTC|newest] Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-11-05 17:44 [PATCH v2 00/13] i.MX8MM power domain support Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 01/13] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-16 14:10 ` Adam Ford 2020-11-16 14:10 ` Adam Ford 2020-11-05 17:44 ` [PATCH v2 02/13] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 03/13] soc: imx: gpcv2: switch to clk_bulk_* API Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 04/13] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 05/13] soc: imx: gpcv2: wait for ADB400 handshake Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 06/13] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 07/13] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 08/13] dt-bindings: imx: gpcv2: add support for optional resets Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-09 20:15 ` Rob Herring 2020-11-09 20:15 ` Rob Herring 2020-11-17 14:11 ` Lucas Stach 2020-11-17 14:11 ` Lucas Stach 2020-11-30 9:57 ` Lucas Stach 2020-11-30 9:57 ` Lucas Stach 2021-02-10 14:35 ` Lucas Stach 2021-02-10 14:35 ` Lucas Stach 2021-02-10 14:42 ` Marek Vasut 2021-02-10 14:42 ` Marek Vasut 2021-04-26 9:24 ` Frieder Schrempf 2021-04-26 9:24 ` Frieder Schrempf 2021-04-29 14:38 ` Frieder Schrempf 2021-04-29 14:38 ` Frieder Schrempf 2021-03-22 18:19 ` Adam Ford 2021-03-22 18:19 ` Adam Ford 2020-11-05 17:44 ` [PATCH v2 09/13] soc: " Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` [PATCH v2 10/13] dt-bindings: add defines for i.MX8MM power domains Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-09 20:34 ` Rob Herring 2020-11-09 20:34 ` Rob Herring 2020-11-05 17:44 ` [PATCH v2 11/13] soc: imx: gpcv2: add support " Lucas Stach 2020-11-05 17:44 ` Lucas Stach 2020-11-05 17:44 ` Lucas Stach [this message] 2020-11-05 17:44 ` [PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and " Lucas Stach 2020-12-09 15:26 ` Frieder Schrempf 2020-12-09 15:26 ` Frieder Schrempf 2021-01-14 10:39 ` Frieder Schrempf 2021-02-18 12:54 ` Adam Ford 2021-02-18 15:19 ` Adam Ford 2021-03-02 15:01 ` Frieder Schrempf 2021-03-02 16:46 ` Adam Ford 2020-11-05 17:44 ` [PATCH v2 13/13] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach 2020-11-05 17:44 ` Lucas Stach
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