* [v6,0/3] introduce TI reset controller for MT8192 SoC
@ 2020-09-30 2:21 ` Crystal Guo
0 siblings, 0 replies; 42+ messages in thread
From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw)
To: p.zabel, robh+dt, matthias.bgg
Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel,
devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen,
fan.chen, yong.liang
v6:
fix the format error of mediatek-syscon-reset.yaml
v5:
1. revert ti-syscon-reset.txt, and add a new mediatek reset binding.
2. split the patch [v4, 3/4] with the change to force write and the
change to integrate assert and deassert together.
3. separate the dts patch from this patch sets
v4:
fix typos on v3 commit message.
v3:
1. revert v2 changes.
2. add 'reset-duration-us' property to declare a minimum delay,
which needs to be waited between assert and deassert.
3. add 'mediatek,infra-reset' to compatible.
v2 changes:
https://patchwork.kernel.org/patch/11697371/
1. add 'assert-deassert-together' property to introduce a new reset handler,
which allows device to do serialized assert and deassert operations in a single
step by 'reset' method.
2. add 'update-force' property to introduce force-update method, which forces
the write operation in case the read already happens to return the correct value.
3. add 'generic-reset' to compatible
v1 changes:
https://patchwork.kernel.org/patch/11690523/
https://patchwork.kernel.org/patch/11690527/
Crystal Guo (3):
dt-binding: reset-controller: mediatek: add YAML schemas
reset-controller: ti: introduce a new reset handler
reset-controller: ti: force the write operation when assert or
deassert
.../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++
drivers/reset/reset-ti-syscon.c | 44 ++++++++++++++--
2 files changed, 92 insertions(+), 3 deletions(-)
create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml
^ permalink raw reply [flat|nested] 42+ messages in thread* [v6,0/3] introduce TI reset controller for MT8192 SoC @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, linux-arm-kernel v6: fix the format error of mediatek-syscon-reset.yaml v5: 1. revert ti-syscon-reset.txt, and add a new mediatek reset binding. 2. split the patch [v4, 3/4] with the change to force write and the change to integrate assert and deassert together. 3. separate the dts patch from this patch sets v4: fix typos on v3 commit message. v3: 1. revert v2 changes. 2. add 'reset-duration-us' property to declare a minimum delay, which needs to be waited between assert and deassert. 3. add 'mediatek,infra-reset' to compatible. v2 changes: https://patchwork.kernel.org/patch/11697371/ 1. add 'assert-deassert-together' property to introduce a new reset handler, which allows device to do serialized assert and deassert operations in a single step by 'reset' method. 2. add 'update-force' property to introduce force-update method, which forces the write operation in case the read already happens to return the correct value. 3. add 'generic-reset' to compatible v1 changes: https://patchwork.kernel.org/patch/11690523/ https://patchwork.kernel.org/patch/11690527/ Crystal Guo (3): dt-binding: reset-controller: mediatek: add YAML schemas reset-controller: ti: introduce a new reset handler reset-controller: ti: force the write operation when assert or deassert .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ drivers/reset/reset-ti-syscon.c | 44 ++++++++++++++-- 2 files changed, 92 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* [v6,0/3] introduce TI reset controller for MT8192 SoC @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel v6: fix the format error of mediatek-syscon-reset.yaml v5: 1. revert ti-syscon-reset.txt, and add a new mediatek reset binding. 2. split the patch [v4, 3/4] with the change to force write and the change to integrate assert and deassert together. 3. separate the dts patch from this patch sets v4: fix typos on v3 commit message. v3: 1. revert v2 changes. 2. add 'reset-duration-us' property to declare a minimum delay, which needs to be waited between assert and deassert. 3. add 'mediatek,infra-reset' to compatible. v2 changes: https://patchwork.kernel.org/patch/11697371/ 1. add 'assert-deassert-together' property to introduce a new reset handler, which allows device to do serialized assert and deassert operations in a single step by 'reset' method. 2. add 'update-force' property to introduce force-update method, which forces the write operation in case the read already happens to return the correct value. 3. add 'generic-reset' to compatible v1 changes: https://patchwork.kernel.org/patch/11690523/ https://patchwork.kernel.org/patch/11690527/ Crystal Guo (3): dt-binding: reset-controller: mediatek: add YAML schemas reset-controller: ti: introduce a new reset handler reset-controller: ti: force the write operation when assert or deassert .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ drivers/reset/reset-ti-syscon.c | 44 ++++++++++++++-- 2 files changed, 92 insertions(+), 3 deletions(-) create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-09-30 2:21 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen, fan.chen, yong.liang, Crystal Guo Add a YAML documentation for Mediatek, which uses ti reset-controller driver directly. The TI reset controller provides a common reset management, and is suitable for Mediatek SoCs. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml new file mode 100644 index 000000000000..7871550c3c69 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Reset Controller + +maintainers: + - Crystal Guo <crystal.guo@mediatek.com> + +description: + The bindings describe the reset-controller for Mediatek SoCs, + which is based on TI reset controller. For more detail, please + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +properties: + compatible: + const: mediatek,syscon-reset + + '#reset-cells': + const: 1 + + mediatek,reset-bits: + description: > + Contains the reset control register information, please refer to + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +required: + - compatible + - '#reset-cells' + - mediatek,reset-bits + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/ti-syscon.h> + infracfg: infracfg@10001000 { + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; + reg = <0 0x10001000>; + #clock-cells = <1>; + + infracfg_rst: reset-controller { + compatible = "mediatek,syscon-reset"; + #reset-cells = <1>; + mediatek,reset-bits = < + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) + >; + }; + }; -- 2.18.0 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, linux-arm-kernel Add a YAML documentation for Mediatek, which uses ti reset-controller driver directly. The TI reset controller provides a common reset management, and is suitable for Mediatek SoCs. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml new file mode 100644 index 000000000000..7871550c3c69 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Reset Controller + +maintainers: + - Crystal Guo <crystal.guo@mediatek.com> + +description: + The bindings describe the reset-controller for Mediatek SoCs, + which is based on TI reset controller. For more detail, please + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +properties: + compatible: + const: mediatek,syscon-reset + + '#reset-cells': + const: 1 + + mediatek,reset-bits: + description: > + Contains the reset control register information, please refer to + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +required: + - compatible + - '#reset-cells' + - mediatek,reset-bits + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/ti-syscon.h> + infracfg: infracfg@10001000 { + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; + reg = <0 0x10001000>; + #clock-cells = <1>; + + infracfg_rst: reset-controller { + compatible = "mediatek,syscon-reset"; + #reset-cells = <1>; + mediatek,reset-bits = < + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) + >; + }; + }; -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel Add a YAML documentation for Mediatek, which uses ti reset-controller driver directly. The TI reset controller provides a common reset management, and is suitable for Mediatek SoCs. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml new file mode 100644 index 000000000000..7871550c3c69 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek Reset Controller + +maintainers: + - Crystal Guo <crystal.guo@mediatek.com> + +description: + The bindings describe the reset-controller for Mediatek SoCs, + which is based on TI reset controller. For more detail, please + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +properties: + compatible: + const: mediatek,syscon-reset + + '#reset-cells': + const: 1 + + mediatek,reset-bits: + description: > + Contains the reset control register information, please refer to + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. + +required: + - compatible + - '#reset-cells' + - mediatek,reset-bits + +additionalProperties: false + +examples: + - | + #include <dt-bindings/reset/ti-syscon.h> + infracfg: infracfg@10001000 { + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; + reg = <0 0x10001000>; + #clock-cells = <1>; + + infracfg_rst: reset-controller { + compatible = "mediatek,syscon-reset"; + #reset-cells = <1>; + mediatek,reset-bits = < + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) + >; + }; + }; -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-10-14 13:30 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-10-14 13:30 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, Seiya Wang (王迺君), Stanley Chu (朱原陞), Yingjoe Chen (陳英洲), Fan Chen (陳凡), Yong Liang (梁勇) Hi Maintainers, Gentle ping for this patch set. Many thanks Crystal On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +required: > + - compatible > + - '#reset-cells' > + - mediatek,reset-bits > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/reset/ti-syscon.h> > + infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > + reg = <0 0x10001000>; > + #clock-cells = <1>; > + > + infracfg_rst: reset-controller { > + compatible = "mediatek,syscon-reset"; > + #reset-cells = <1>; > + mediatek,reset-bits = < > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > + >; > + }; > + }; ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-10-14 13:30 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-10-14 13:30 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), linux-mediatek, Yingjoe Chen (陳英洲), linux-arm-kernel Hi Maintainers, Gentle ping for this patch set. Many thanks Crystal On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +required: > + - compatible > + - '#reset-cells' > + - mediatek,reset-bits > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/reset/ti-syscon.h> > + infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > + reg = <0 0x10001000>; > + #clock-cells = <1>; > + > + infracfg_rst: reset-controller { > + compatible = "mediatek,syscon-reset"; > + #reset-cells = <1>; > + mediatek,reset-bits = < > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > + >; > + }; > + }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-10-14 13:30 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-10-14 13:30 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), linux-mediatek, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel Hi Maintainers, Gentle ping for this patch set. Many thanks Crystal On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +required: > + - compatible > + - '#reset-cells' > + - mediatek,reset-bits > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/reset/ti-syscon.h> > + infracfg: infracfg@10001000 { > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > + reg = <0 0x10001000>; > + #clock-cells = <1>; > + > + infracfg_rst: reset-controller { > + compatible = "mediatek,syscon-reset"; > + #reset-cells = <1>; > + mediatek,reset-bits = < > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > + >; > + }; > + }; _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas 2020-10-14 13:30 ` Crystal Guo (?) @ 2020-11-11 8:28 ` Stanley Chu -1 siblings, 0 replies; 42+ messages in thread From: Stanley Chu @ 2020-11-11 8:28 UTC (permalink / raw) To: Crystal Guo, p.zabel, matthias.bgg, Suman Anna Cc: robh+dt, srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, Seiya Wang (王迺君), Yingjoe Chen (陳英洲), Fan Chen (陳凡), Yong Liang (梁勇) Hi Matthias, Philipp, Suman, Since almost one month pending with this patch series, just a gentle ping that would you have further suggestions on this series? We are looking for this series being merged soon. Thanks On Wed, 2020-10-14 at 21:30 +0800, Crystal Guo wrote: > Hi Maintainers, > > Gentle ping for this patch set. > > Many thanks > Crystal > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +required: > > + - compatible > > + - '#reset-cells' > > + - mediatek,reset-bits > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/reset/ti-syscon.h> > > + infracfg: infracfg@10001000 { > > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > > + reg = <0 0x10001000>; > > + #clock-cells = <1>; > > + > > + infracfg_rst: reset-controller { > > + compatible = "mediatek,syscon-reset"; > > + #reset-cells = <1>; > > + mediatek,reset-bits = < > > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > > + >; > > + }; > > + }; > > ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-11-11 8:28 ` Stanley Chu 0 siblings, 0 replies; 42+ messages in thread From: Stanley Chu @ 2020-11-11 8:28 UTC (permalink / raw) To: Crystal Guo, p.zabel, matthias.bgg, Suman Anna Cc: devicetree, Yong Liang (梁勇), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, Yingjoe Chen (陳英洲), linux-arm-kernel Hi Matthias, Philipp, Suman, Since almost one month pending with this patch series, just a gentle ping that would you have further suggestions on this series? We are looking for this series being merged soon. Thanks On Wed, 2020-10-14 at 21:30 +0800, Crystal Guo wrote: > Hi Maintainers, > > Gentle ping for this patch set. > > Many thanks > Crystal > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +required: > > + - compatible > > + - '#reset-cells' > > + - mediatek,reset-bits > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/reset/ti-syscon.h> > > + infracfg: infracfg@10001000 { > > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > > + reg = <0 0x10001000>; > > + #clock-cells = <1>; > > + > > + infracfg_rst: reset-controller { > > + compatible = "mediatek,syscon-reset"; > > + #reset-cells = <1>; > > + mediatek,reset-bits = < > > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > > + >; > > + }; > > + }; > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-11-11 8:28 ` Stanley Chu 0 siblings, 0 replies; 42+ messages in thread From: Stanley Chu @ 2020-11-11 8:28 UTC (permalink / raw) To: Crystal Guo, p.zabel, matthias.bgg, Suman Anna Cc: devicetree, Yong Liang (梁勇), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel Hi Matthias, Philipp, Suman, Since almost one month pending with this patch series, just a gentle ping that would you have further suggestions on this series? We are looking for this series being merged soon. Thanks On Wed, 2020-10-14 at 21:30 +0800, Crystal Guo wrote: > Hi Maintainers, > > Gentle ping for this patch set. > > Many thanks > Crystal > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +required: > > + - compatible > > + - '#reset-cells' > > + - mediatek,reset-bits > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/reset/ti-syscon.h> > > + infracfg: infracfg@10001000 { > > + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; > > + reg = <0 0x10001000>; > > + #clock-cells = <1>; > > + > > + infracfg_rst: reset-controller { > > + compatible = "mediatek,syscon-reset"; > > + #reset-cells = <1>; > > + mediatek,reset-bits = < > > + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) > > + >; > > + }; > > + }; > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-12-03 7:41 ` Philipp Zabel -1 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:41 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen, fan.chen, yong.liang Hi, On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. I would really like some input from Rob on this, in v4 he asked not to repeat 'ti,reset-bits'. regards Philipp ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-12-03 7:41 ` Philipp Zabel 0 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:41 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, linux-arm-kernel Hi, On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. I would really like some input from Rob on this, in v4 he asked not to repeat 'ti,reset-bits'. regards Philipp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-12-03 7:41 ` Philipp Zabel 0 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:41 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel Hi, On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Add a YAML documentation for Mediatek, which uses ti reset-controller > driver directly. The TI reset controller provides a common reset > management, and is suitable for Mediatek SoCs. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > 1 file changed, 51 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > new file mode 100644 > index 000000000000..7871550c3c69 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek Reset Controller > + > +maintainers: > + - Crystal Guo <crystal.guo@mediatek.com> > + > +description: > + The bindings describe the reset-controller for Mediatek SoCs, > + which is based on TI reset controller. For more detail, please > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > + > +properties: > + compatible: > + const: mediatek,syscon-reset > + > + '#reset-cells': > + const: 1 > + > + mediatek,reset-bits: > + description: > > + Contains the reset control register information, please refer to > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. I would really like some input from Rob on this, in v4 he asked not to repeat 'ti,reset-bits'. regards Philipp _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas 2020-12-03 7:41 ` Philipp Zabel (?) @ 2020-12-26 9:06 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-26 9:06 UTC (permalink / raw) To: Philipp Zabel, robh+dt, matthias.bgg Cc: robh+dt, matthias.bgg, srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, Seiya Wang (王迺君), Stanley Chu (朱原陞), Yingjoe Chen (陳英洲), Fan Chen (陳凡), Yong Liang (梁勇) On Thu, 2020-12-03 at 15:41 +0800, Philipp Zabel wrote: > Hi, > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > I would really like some input from Rob on this, in v4 he asked not to > repeat 'ti,reset-bits'. > > regards > Philipp Hi Rob, Can you give some suggestions on this document "mediatek-syscon-reset.yaml", many thanks~ regards Crystal Guo ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-12-26 9:06 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-26 9:06 UTC (permalink / raw) To: Philipp Zabel, robh+dt, matthias.bgg Cc: devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, matthias.bgg, Yingjoe Chen (陳英洲), linux-arm-kernel On Thu, 2020-12-03 at 15:41 +0800, Philipp Zabel wrote: > Hi, > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > I would really like some input from Rob on this, in v4 he asked not to > repeat 'ti,reset-bits'. > > regards > Philipp Hi Rob, Can you give some suggestions on this document "mediatek-syscon-reset.yaml", many thanks~ regards Crystal Guo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas @ 2020-12-26 9:06 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-26 9:06 UTC (permalink / raw) To: Philipp Zabel, robh+dt, matthias.bgg Cc: devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, matthias.bgg, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel On Thu, 2020-12-03 at 15:41 +0800, Philipp Zabel wrote: > Hi, > > On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > > Add a YAML documentation for Mediatek, which uses ti reset-controller > > driver directly. The TI reset controller provides a common reset > > management, and is suitable for Mediatek SoCs. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > .../bindings/reset/mediatek-syscon-reset.yaml | 51 +++++++++++++++++++ > > 1 file changed, 51 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > > > diff --git a/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > new file mode 100644 > > index 000000000000..7871550c3c69 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reset/mediatek-syscon-reset.yaml > > @@ -0,0 +1,51 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reset/mediatek-syscon-reset.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Mediatek Reset Controller > > + > > +maintainers: > > + - Crystal Guo <crystal.guo@mediatek.com> > > + > > +description: > > + The bindings describe the reset-controller for Mediatek SoCs, > > + which is based on TI reset controller. For more detail, please > > + visit Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > + > > +properties: > > + compatible: > > + const: mediatek,syscon-reset > > + > > + '#reset-cells': > > + const: 1 > > + > > + mediatek,reset-bits: > > + description: > > > + Contains the reset control register information, please refer to > > + Documentation/devicetree/bindings/reset/ti-syscon-reset.txt. > > I would really like some input from Rob on this, in v4 he asked not to > repeat 'ti,reset-bits'. > > regards > Philipp Hi Rob, Can you give some suggestions on this document "mediatek-syscon-reset.yaml", many thanks~ regards Crystal Guo _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* [v6,2/3] reset-controller: ti: introduce a new reset handler 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-09-30 2:21 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen, fan.chen, yong.liang, Crystal Guo Introduce ti_syscon_reset() to integrate assert and deassert together. If some modules need do serialized assert and deassert operations to reset itself, reset_control_reset can be called for convenience. Such as reset-qcom-aoss.c, it integrates assert and deassert together by 'reset' method. MTK Socs also need this method to perform reset. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index a2635c21db7f..5d1f8306cd4f 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -15,15 +15,22 @@ * GNU General Public License for more details. */ +#include <linux/delay.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/reset-controller.h> #include <dt-bindings/reset/ti-syscon.h> +struct mediatek_reset_data { + unsigned char *reset_bits; + unsigned int reset_duration_us; +}; + /** * struct ti_syscon_reset_control - reset control structure * @assert_offset: reset assert control register offset from syscon base @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { struct regmap *regmap; struct ti_syscon_reset_control *controls; unsigned int nr_controls; + const struct mediatek_reset_data *reset_data; }; #define to_ti_syscon_reset_data(rcdev) \ @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, !(control->flags & STATUS_SET); } +static int ti_syscon_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); + int ret; + + if (data->reset_data) { + ret = ti_syscon_reset_assert(rcdev, id); + if (ret) + return ret; + usleep_range(data->reset_data->reset_duration_us, + data->reset_data->reset_duration_us * 2); + + return ti_syscon_reset_deassert(rcdev, id); + } else { + return -ENOTSUPP; + } +} + static const struct reset_control_ops ti_syscon_reset_ops = { .assert = ti_syscon_reset_assert, .deassert = ti_syscon_reset_deassert, + .reset = ti_syscon_reset, .status = ti_syscon_reset_status, }; @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); - list = of_get_property(np, "ti,reset-bits", &size); + data->reset_data = of_device_get_match_data(&pdev->dev); + if (data->reset_data) + list = of_get_property(np, data->reset_data->reset_bits, &size); + else + list = of_get_property(np, "ti,reset-bits", &size); if (!list || (size / sizeof(*list)) % 7 != 0) { dev_err(dev, "invalid DT reset description\n"); return -EINVAL; @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) return devm_reset_controller_register(dev, &data->rcdev); } +static const struct mediatek_reset_data mtk_reset_data = { + .reset_bits = "mediatek,reset-bits", + .reset_duration_us = 10, +}; + static const struct of_device_id ti_syscon_reset_of_match[] = { { .compatible = "ti,syscon-reset", }, + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); -- 2.18.0 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, linux-arm-kernel Introduce ti_syscon_reset() to integrate assert and deassert together. If some modules need do serialized assert and deassert operations to reset itself, reset_control_reset can be called for convenience. Such as reset-qcom-aoss.c, it integrates assert and deassert together by 'reset' method. MTK Socs also need this method to perform reset. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index a2635c21db7f..5d1f8306cd4f 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -15,15 +15,22 @@ * GNU General Public License for more details. */ +#include <linux/delay.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/reset-controller.h> #include <dt-bindings/reset/ti-syscon.h> +struct mediatek_reset_data { + unsigned char *reset_bits; + unsigned int reset_duration_us; +}; + /** * struct ti_syscon_reset_control - reset control structure * @assert_offset: reset assert control register offset from syscon base @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { struct regmap *regmap; struct ti_syscon_reset_control *controls; unsigned int nr_controls; + const struct mediatek_reset_data *reset_data; }; #define to_ti_syscon_reset_data(rcdev) \ @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, !(control->flags & STATUS_SET); } +static int ti_syscon_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); + int ret; + + if (data->reset_data) { + ret = ti_syscon_reset_assert(rcdev, id); + if (ret) + return ret; + usleep_range(data->reset_data->reset_duration_us, + data->reset_data->reset_duration_us * 2); + + return ti_syscon_reset_deassert(rcdev, id); + } else { + return -ENOTSUPP; + } +} + static const struct reset_control_ops ti_syscon_reset_ops = { .assert = ti_syscon_reset_assert, .deassert = ti_syscon_reset_deassert, + .reset = ti_syscon_reset, .status = ti_syscon_reset_status, }; @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); - list = of_get_property(np, "ti,reset-bits", &size); + data->reset_data = of_device_get_match_data(&pdev->dev); + if (data->reset_data) + list = of_get_property(np, data->reset_data->reset_bits, &size); + else + list = of_get_property(np, "ti,reset-bits", &size); if (!list || (size / sizeof(*list)) % 7 != 0) { dev_err(dev, "invalid DT reset description\n"); return -EINVAL; @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) return devm_reset_controller_register(dev, &data->rcdev); } +static const struct mediatek_reset_data mtk_reset_data = { + .reset_bits = "mediatek,reset-bits", + .reset_duration_us = 10, +}; + static const struct of_device_id ti_syscon_reset_of_match[] = { { .compatible = "ti,syscon-reset", }, + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel Introduce ti_syscon_reset() to integrate assert and deassert together. If some modules need do serialized assert and deassert operations to reset itself, reset_control_reset can be called for convenience. Such as reset-qcom-aoss.c, it integrates assert and deassert together by 'reset' method. MTK Socs also need this method to perform reset. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index a2635c21db7f..5d1f8306cd4f 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -15,15 +15,22 @@ * GNU General Public License for more details. */ +#include <linux/delay.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/reset-controller.h> #include <dt-bindings/reset/ti-syscon.h> +struct mediatek_reset_data { + unsigned char *reset_bits; + unsigned int reset_duration_us; +}; + /** * struct ti_syscon_reset_control - reset control structure * @assert_offset: reset assert control register offset from syscon base @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { struct regmap *regmap; struct ti_syscon_reset_control *controls; unsigned int nr_controls; + const struct mediatek_reset_data *reset_data; }; #define to_ti_syscon_reset_data(rcdev) \ @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, !(control->flags & STATUS_SET); } +static int ti_syscon_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); + int ret; + + if (data->reset_data) { + ret = ti_syscon_reset_assert(rcdev, id); + if (ret) + return ret; + usleep_range(data->reset_data->reset_duration_us, + data->reset_data->reset_duration_us * 2); + + return ti_syscon_reset_deassert(rcdev, id); + } else { + return -ENOTSUPP; + } +} + static const struct reset_control_ops ti_syscon_reset_ops = { .assert = ti_syscon_reset_assert, .deassert = ti_syscon_reset_deassert, + .reset = ti_syscon_reset, .status = ti_syscon_reset_status, }; @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) if (IS_ERR(regmap)) return PTR_ERR(regmap); - list = of_get_property(np, "ti,reset-bits", &size); + data->reset_data = of_device_get_match_data(&pdev->dev); + if (data->reset_data) + list = of_get_property(np, data->reset_data->reset_bits, &size); + else + list = of_get_property(np, "ti,reset-bits", &size); if (!list || (size / sizeof(*list)) % 7 != 0) { dev_err(dev, "invalid DT reset description\n"); return -EINVAL; @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) return devm_reset_controller_register(dev, &data->rcdev); } +static const struct mediatek_reset_data mtk_reset_data = { + .reset_bits = "mediatek,reset-bits", + .reset_duration_us = 10, +}; + static const struct of_device_id ti_syscon_reset_of_match[] = { { .compatible = "ti,syscon-reset", }, + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-11-30 10:35 ` Ikjoon Jang -1 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 10:35 UTC (permalink / raw) To: Crystal Guo Cc: p.zabel, robh+dt, matthias.bgg, devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > Introduce ti_syscon_reset() to integrate assert and deassert together. > If some modules need do serialized assert and deassert operations > to reset itself, reset_control_reset can be called for convenience. > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > by 'reset' method. MTK Socs also need this method to perform reset. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > --- > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > 1 file changed, 39 insertions(+), 1 deletion(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index a2635c21db7f..5d1f8306cd4f 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -15,15 +15,22 @@ > * GNU General Public License for more details. > */ > > +#include <linux/delay.h> > #include <linux/mfd/syscon.h> > #include <linux/module.h> > #include <linux/of.h> > +#include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > #include <linux/reset-controller.h> > > #include <dt-bindings/reset/ti-syscon.h> > > +struct mediatek_reset_data { > + unsigned char *reset_bits; > + unsigned int reset_duration_us; > +}; > + > /** > * struct ti_syscon_reset_control - reset control structure > * @assert_offset: reset assert control register offset from syscon base > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > struct regmap *regmap; > struct ti_syscon_reset_control *controls; > unsigned int nr_controls; > + const struct mediatek_reset_data *reset_data; > }; > > #define to_ti_syscon_reset_data(rcdev) \ > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > !(control->flags & STATUS_SET); > } > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > + int ret; > + > + if (data->reset_data) { > + ret = ti_syscon_reset_assert(rcdev, id); > + if (ret) > + return ret; > + usleep_range(data->reset_data->reset_duration_us, > + data->reset_data->reset_duration_us * 2); > + There are many users using assert() and deassert() seperately without any delay between them. If there's a timing requirement between assertion and deassertion, shouldn't there be a same amount of delay in assert? > + return ti_syscon_reset_deassert(rcdev, id); > + } else { > + return -ENOTSUPP; > + } > +} > + > static const struct reset_control_ops ti_syscon_reset_ops = { > .assert = ti_syscon_reset_assert, > .deassert = ti_syscon_reset_deassert, > + .reset = ti_syscon_reset, > .status = ti_syscon_reset_status, > }; > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > if (IS_ERR(regmap)) > return PTR_ERR(regmap); > > - list = of_get_property(np, "ti,reset-bits", &size); > + data->reset_data = of_device_get_match_data(&pdev->dev); > + if (data->reset_data) > + list = of_get_property(np, data->reset_data->reset_bits, &size); > + else > + list = of_get_property(np, "ti,reset-bits", &size); > if (!list || (size / sizeof(*list)) % 7 != 0) { > dev_err(dev, "invalid DT reset description\n"); > return -EINVAL; > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > return devm_reset_controller_register(dev, &data->rcdev); > } > > +static const struct mediatek_reset_data mtk_reset_data = { > + .reset_bits = "mediatek,reset-bits", > + .reset_duration_us = 10, > +}; > + > static const struct of_device_id ti_syscon_reset_of_match[] = { > { .compatible = "ti,syscon-reset", }, > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > { /* sentinel */ }, > }; > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-11-30 10:35 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 10:35 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, yong.liang, srv_heupstream, seiya.wang, linux-kernel, fan.chen, robh+dt, linux-mediatek, p.zabel, matthias.bgg, yingjoe.chen, stanley.chu, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > Introduce ti_syscon_reset() to integrate assert and deassert together. > If some modules need do serialized assert and deassert operations > to reset itself, reset_control_reset can be called for convenience. > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > by 'reset' method. MTK Socs also need this method to perform reset. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > --- > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > 1 file changed, 39 insertions(+), 1 deletion(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index a2635c21db7f..5d1f8306cd4f 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -15,15 +15,22 @@ > * GNU General Public License for more details. > */ > > +#include <linux/delay.h> > #include <linux/mfd/syscon.h> > #include <linux/module.h> > #include <linux/of.h> > +#include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > #include <linux/reset-controller.h> > > #include <dt-bindings/reset/ti-syscon.h> > > +struct mediatek_reset_data { > + unsigned char *reset_bits; > + unsigned int reset_duration_us; > +}; > + > /** > * struct ti_syscon_reset_control - reset control structure > * @assert_offset: reset assert control register offset from syscon base > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > struct regmap *regmap; > struct ti_syscon_reset_control *controls; > unsigned int nr_controls; > + const struct mediatek_reset_data *reset_data; > }; > > #define to_ti_syscon_reset_data(rcdev) \ > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > !(control->flags & STATUS_SET); > } > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > + int ret; > + > + if (data->reset_data) { > + ret = ti_syscon_reset_assert(rcdev, id); > + if (ret) > + return ret; > + usleep_range(data->reset_data->reset_duration_us, > + data->reset_data->reset_duration_us * 2); > + There are many users using assert() and deassert() seperately without any delay between them. If there's a timing requirement between assertion and deassertion, shouldn't there be a same amount of delay in assert? > + return ti_syscon_reset_deassert(rcdev, id); > + } else { > + return -ENOTSUPP; > + } > +} > + > static const struct reset_control_ops ti_syscon_reset_ops = { > .assert = ti_syscon_reset_assert, > .deassert = ti_syscon_reset_deassert, > + .reset = ti_syscon_reset, > .status = ti_syscon_reset_status, > }; > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > if (IS_ERR(regmap)) > return PTR_ERR(regmap); > > - list = of_get_property(np, "ti,reset-bits", &size); > + data->reset_data = of_device_get_match_data(&pdev->dev); > + if (data->reset_data) > + list = of_get_property(np, data->reset_data->reset_bits, &size); > + else > + list = of_get_property(np, "ti,reset-bits", &size); > if (!list || (size / sizeof(*list)) % 7 != 0) { > dev_err(dev, "invalid DT reset description\n"); > return -EINVAL; > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > return devm_reset_controller_register(dev, &data->rcdev); > } > > +static const struct mediatek_reset_data mtk_reset_data = { > + .reset_bits = "mediatek,reset-bits", > + .reset_duration_us = 10, > +}; > + > static const struct of_device_id ti_syscon_reset_of_match[] = { > { .compatible = "ti,syscon-reset", }, > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > { /* sentinel */ }, > }; > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-11-30 10:35 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 10:35 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, yong.liang, s-anna, srv_heupstream, seiya.wang, linux-kernel, fan.chen, robh+dt, linux-mediatek, p.zabel, matthias.bgg, yingjoe.chen, stanley.chu, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > Introduce ti_syscon_reset() to integrate assert and deassert together. > If some modules need do serialized assert and deassert operations > to reset itself, reset_control_reset can be called for convenience. > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > by 'reset' method. MTK Socs also need this method to perform reset. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > --- > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > 1 file changed, 39 insertions(+), 1 deletion(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index a2635c21db7f..5d1f8306cd4f 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -15,15 +15,22 @@ > * GNU General Public License for more details. > */ > > +#include <linux/delay.h> > #include <linux/mfd/syscon.h> > #include <linux/module.h> > #include <linux/of.h> > +#include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > #include <linux/reset-controller.h> > > #include <dt-bindings/reset/ti-syscon.h> > > +struct mediatek_reset_data { > + unsigned char *reset_bits; > + unsigned int reset_duration_us; > +}; > + > /** > * struct ti_syscon_reset_control - reset control structure > * @assert_offset: reset assert control register offset from syscon base > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > struct regmap *regmap; > struct ti_syscon_reset_control *controls; > unsigned int nr_controls; > + const struct mediatek_reset_data *reset_data; > }; > > #define to_ti_syscon_reset_data(rcdev) \ > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > !(control->flags & STATUS_SET); > } > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > + int ret; > + > + if (data->reset_data) { > + ret = ti_syscon_reset_assert(rcdev, id); > + if (ret) > + return ret; > + usleep_range(data->reset_data->reset_duration_us, > + data->reset_data->reset_duration_us * 2); > + There are many users using assert() and deassert() seperately without any delay between them. If there's a timing requirement between assertion and deassertion, shouldn't there be a same amount of delay in assert? > + return ti_syscon_reset_deassert(rcdev, id); > + } else { > + return -ENOTSUPP; > + } > +} > + > static const struct reset_control_ops ti_syscon_reset_ops = { > .assert = ti_syscon_reset_assert, > .deassert = ti_syscon_reset_deassert, > + .reset = ti_syscon_reset, > .status = ti_syscon_reset_status, > }; > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > if (IS_ERR(regmap)) > return PTR_ERR(regmap); > > - list = of_get_property(np, "ti,reset-bits", &size); > + data->reset_data = of_device_get_match_data(&pdev->dev); > + if (data->reset_data) > + list = of_get_property(np, data->reset_data->reset_bits, &size); > + else > + list = of_get_property(np, "ti,reset-bits", &size); > if (!list || (size / sizeof(*list)) % 7 != 0) { > dev_err(dev, "invalid DT reset description\n"); > return -EINVAL; > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > return devm_reset_controller_register(dev, &data->rcdev); > } > > +static const struct mediatek_reset_data mtk_reset_data = { > + .reset_bits = "mediatek,reset-bits", > + .reset_duration_us = 10, > +}; > + > static const struct of_device_id ti_syscon_reset_of_match[] = { > { .compatible = "ti,syscon-reset", }, > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > { /* sentinel */ }, > }; > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler 2020-11-30 10:35 ` Ikjoon Jang (?) @ 2020-12-04 2:34 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-04 2:34 UTC (permalink / raw) To: Ikjoon Jang Cc: p.zabel, robh+dt, matthias.bgg, devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), linux-mediatek, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel On Mon, 2020-11-30 at 18:35 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > > Introduce ti_syscon_reset() to integrate assert and deassert together. > > If some modules need do serialized assert and deassert operations > > to reset itself, reset_control_reset can be called for convenience. > > > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > > by 'reset' method. MTK Socs also need this method to perform reset. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > > > --- > > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > > 1 file changed, 39 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index a2635c21db7f..5d1f8306cd4f 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -15,15 +15,22 @@ > > * GNU General Public License for more details. > > */ > > > > +#include <linux/delay.h> > > #include <linux/mfd/syscon.h> > > #include <linux/module.h> > > #include <linux/of.h> > > +#include <linux/of_device.h> > > #include <linux/platform_device.h> > > #include <linux/regmap.h> > > #include <linux/reset-controller.h> > > > > #include <dt-bindings/reset/ti-syscon.h> > > > > +struct mediatek_reset_data { > > + unsigned char *reset_bits; > > + unsigned int reset_duration_us; > > +}; > > + > > /** > > * struct ti_syscon_reset_control - reset control structure > > * @assert_offset: reset assert control register offset from syscon base > > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > > struct regmap *regmap; > > struct ti_syscon_reset_control *controls; > > unsigned int nr_controls; > > + const struct mediatek_reset_data *reset_data; > > }; > > > > #define to_ti_syscon_reset_data(rcdev) \ > > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > > !(control->flags & STATUS_SET); > > } > > > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > > + unsigned long id) > > +{ > > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > > + int ret; > > + > > + if (data->reset_data) { > > + ret = ti_syscon_reset_assert(rcdev, id); > > + if (ret) > > + return ret; > > + usleep_range(data->reset_data->reset_duration_us, > > + data->reset_data->reset_duration_us * 2); > > + > > There are many users using assert() and deassert() seperately > without any delay between them. > > If there's a timing requirement between assertion and deassertion, > shouldn't there be a same amount of delay in assert? The "reset_duration_us" is an optional configuration to make the reset operation more generic, which was added based on Philipp's comment in [v2,4/6]. Thanks, Crystal > > > + return ti_syscon_reset_deassert(rcdev, id); > > + } else { > > + return -ENOTSUPP; > > + } > > +} > > + > > static const struct reset_control_ops ti_syscon_reset_ops = { > > .assert = ti_syscon_reset_assert, > > .deassert = ti_syscon_reset_deassert, > > + .reset = ti_syscon_reset, > > .status = ti_syscon_reset_status, > > }; > > > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > if (IS_ERR(regmap)) > > return PTR_ERR(regmap); > > > > - list = of_get_property(np, "ti,reset-bits", &size); > > + data->reset_data = of_device_get_match_data(&pdev->dev); > > + if (data->reset_data) > > + list = of_get_property(np, data->reset_data->reset_bits, &size); > > + else > > + list = of_get_property(np, "ti,reset-bits", &size); > > if (!list || (size / sizeof(*list)) % 7 != 0) { > > dev_err(dev, "invalid DT reset description\n"); > > return -EINVAL; > > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > return devm_reset_controller_register(dev, &data->rcdev); > > } > > > > +static const struct mediatek_reset_data mtk_reset_data = { > > + .reset_bits = "mediatek,reset-bits", > > + .reset_duration_us = 10, > > +}; > > + > > static const struct of_device_id ti_syscon_reset_of_match[] = { > > { .compatible = "ti,syscon-reset", }, > > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > > { /* sentinel */ }, > > }; > > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-12-04 2:34 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-04 2:34 UTC (permalink / raw) To: Ikjoon Jang Cc: devicetree, Yong Liang (梁勇), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Mon, 2020-11-30 at 18:35 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > > Introduce ti_syscon_reset() to integrate assert and deassert together. > > If some modules need do serialized assert and deassert operations > > to reset itself, reset_control_reset can be called for convenience. > > > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > > by 'reset' method. MTK Socs also need this method to perform reset. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > > > --- > > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > > 1 file changed, 39 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index a2635c21db7f..5d1f8306cd4f 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -15,15 +15,22 @@ > > * GNU General Public License for more details. > > */ > > > > +#include <linux/delay.h> > > #include <linux/mfd/syscon.h> > > #include <linux/module.h> > > #include <linux/of.h> > > +#include <linux/of_device.h> > > #include <linux/platform_device.h> > > #include <linux/regmap.h> > > #include <linux/reset-controller.h> > > > > #include <dt-bindings/reset/ti-syscon.h> > > > > +struct mediatek_reset_data { > > + unsigned char *reset_bits; > > + unsigned int reset_duration_us; > > +}; > > + > > /** > > * struct ti_syscon_reset_control - reset control structure > > * @assert_offset: reset assert control register offset from syscon base > > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > > struct regmap *regmap; > > struct ti_syscon_reset_control *controls; > > unsigned int nr_controls; > > + const struct mediatek_reset_data *reset_data; > > }; > > > > #define to_ti_syscon_reset_data(rcdev) \ > > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > > !(control->flags & STATUS_SET); > > } > > > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > > + unsigned long id) > > +{ > > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > > + int ret; > > + > > + if (data->reset_data) { > > + ret = ti_syscon_reset_assert(rcdev, id); > > + if (ret) > > + return ret; > > + usleep_range(data->reset_data->reset_duration_us, > > + data->reset_data->reset_duration_us * 2); > > + > > There are many users using assert() and deassert() seperately > without any delay between them. > > If there's a timing requirement between assertion and deassertion, > shouldn't there be a same amount of delay in assert? The "reset_duration_us" is an optional configuration to make the reset operation more generic, which was added based on Philipp's comment in [v2,4/6]. Thanks, Crystal > > > + return ti_syscon_reset_deassert(rcdev, id); > > + } else { > > + return -ENOTSUPP; > > + } > > +} > > + > > static const struct reset_control_ops ti_syscon_reset_ops = { > > .assert = ti_syscon_reset_assert, > > .deassert = ti_syscon_reset_deassert, > > + .reset = ti_syscon_reset, > > .status = ti_syscon_reset_status, > > }; > > > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > if (IS_ERR(regmap)) > > return PTR_ERR(regmap); > > > > - list = of_get_property(np, "ti,reset-bits", &size); > > + data->reset_data = of_device_get_match_data(&pdev->dev); > > + if (data->reset_data) > > + list = of_get_property(np, data->reset_data->reset_bits, &size); > > + else > > + list = of_get_property(np, "ti,reset-bits", &size); > > if (!list || (size / sizeof(*list)) % 7 != 0) { > > dev_err(dev, "invalid DT reset description\n"); > > return -EINVAL; > > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > return devm_reset_controller_register(dev, &data->rcdev); > > } > > > > +static const struct mediatek_reset_data mtk_reset_data = { > > + .reset_bits = "mediatek,reset-bits", > > + .reset_duration_us = 10, > > +}; > > + > > static const struct of_device_id ti_syscon_reset_of_match[] = { > > { .compatible = "ti,syscon-reset", }, > > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > > { /* sentinel */ }, > > }; > > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,2/3] reset-controller: ti: introduce a new reset handler @ 2020-12-04 2:34 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-04 2:34 UTC (permalink / raw) To: Ikjoon Jang Cc: devicetree, Yong Liang (梁勇), s-anna, srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Mon, 2020-11-30 at 18:35 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:58AM +0800, Crystal Guo wrote: > > Introduce ti_syscon_reset() to integrate assert and deassert together. > > If some modules need do serialized assert and deassert operations > > to reset itself, reset_control_reset can be called for convenience. > > > > Such as reset-qcom-aoss.c, it integrates assert and deassert together > > by 'reset' method. MTK Socs also need this method to perform reset. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > Reviewed-by: Ikjoon Jang <ikjn@chromium.org> > > > --- > > drivers/reset/reset-ti-syscon.c | 40 ++++++++++++++++++++++++++++++++- > > 1 file changed, 39 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index a2635c21db7f..5d1f8306cd4f 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -15,15 +15,22 @@ > > * GNU General Public License for more details. > > */ > > > > +#include <linux/delay.h> > > #include <linux/mfd/syscon.h> > > #include <linux/module.h> > > #include <linux/of.h> > > +#include <linux/of_device.h> > > #include <linux/platform_device.h> > > #include <linux/regmap.h> > > #include <linux/reset-controller.h> > > > > #include <dt-bindings/reset/ti-syscon.h> > > > > +struct mediatek_reset_data { > > + unsigned char *reset_bits; > > + unsigned int reset_duration_us; > > +}; > > + > > /** > > * struct ti_syscon_reset_control - reset control structure > > * @assert_offset: reset assert control register offset from syscon base > > @@ -56,6 +63,7 @@ struct ti_syscon_reset_data { > > struct regmap *regmap; > > struct ti_syscon_reset_control *controls; > > unsigned int nr_controls; > > + const struct mediatek_reset_data *reset_data; > > }; > > > > #define to_ti_syscon_reset_data(rcdev) \ > > @@ -158,9 +166,29 @@ static int ti_syscon_reset_status(struct reset_controller_dev *rcdev, > > !(control->flags & STATUS_SET); > > } > > > > +static int ti_syscon_reset(struct reset_controller_dev *rcdev, > > + unsigned long id) > > +{ > > + struct ti_syscon_reset_data *data = to_ti_syscon_reset_data(rcdev); > > + int ret; > > + > > + if (data->reset_data) { > > + ret = ti_syscon_reset_assert(rcdev, id); > > + if (ret) > > + return ret; > > + usleep_range(data->reset_data->reset_duration_us, > > + data->reset_data->reset_duration_us * 2); > > + > > There are many users using assert() and deassert() seperately > without any delay between them. > > If there's a timing requirement between assertion and deassertion, > shouldn't there be a same amount of delay in assert? The "reset_duration_us" is an optional configuration to make the reset operation more generic, which was added based on Philipp's comment in [v2,4/6]. Thanks, Crystal > > > + return ti_syscon_reset_deassert(rcdev, id); > > + } else { > > + return -ENOTSUPP; > > + } > > +} > > + > > static const struct reset_control_ops ti_syscon_reset_ops = { > > .assert = ti_syscon_reset_assert, > > .deassert = ti_syscon_reset_deassert, > > + .reset = ti_syscon_reset, > > .status = ti_syscon_reset_status, > > }; > > > > @@ -182,7 +210,11 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > if (IS_ERR(regmap)) > > return PTR_ERR(regmap); > > > > - list = of_get_property(np, "ti,reset-bits", &size); > > + data->reset_data = of_device_get_match_data(&pdev->dev); > > + if (data->reset_data) > > + list = of_get_property(np, data->reset_data->reset_bits, &size); > > + else > > + list = of_get_property(np, "ti,reset-bits", &size); > > if (!list || (size / sizeof(*list)) % 7 != 0) { > > dev_err(dev, "invalid DT reset description\n"); > > return -EINVAL; > > @@ -217,8 +249,14 @@ static int ti_syscon_reset_probe(struct platform_device *pdev) > > return devm_reset_controller_register(dev, &data->rcdev); > > } > > > > +static const struct mediatek_reset_data mtk_reset_data = { > > + .reset_bits = "mediatek,reset-bits", > > + .reset_duration_us = 10, > > +}; > > + > > static const struct of_device_id ti_syscon_reset_of_match[] = { > > { .compatible = "ti,syscon-reset", }, > > + { .compatible = "mediatek,syscon-reset", .data = &mtk_reset_data}, > > { /* sentinel */ }, > > }; > > MODULE_DEVICE_TABLE(of, ti_syscon_reset_of_match); _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* [v6,3/3] reset-controller: ti: force the write operation when assert or deassert 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-09-30 2:21 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen, fan.chen, yong.liang, Crystal Guo Force the write operation in case the read already happens to return the correct value. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index 5d1f8306cd4f..c34394f1e9e2 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, mask = BIT(control->assert_bit); value = (control->flags & ASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); } /** @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, mask = BIT(control->deassert_bit); value = (control->flags & DEASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); } /** -- 2.18.0 ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, linux-arm-kernel Force the write operation in case the read already happens to return the correct value. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index 5d1f8306cd4f..c34394f1e9e2 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, mask = BIT(control->assert_bit); value = (control->flags & ASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); } /** @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, mask = BIT(control->deassert_bit); value = (control->flags & DEASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); } /** -- 2.18.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 42+ messages in thread
* [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-09-30 2:21 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-09-30 2:21 UTC (permalink / raw) To: p.zabel, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, Crystal Guo, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel Force the write operation in case the read already happens to return the correct value. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> --- drivers/reset/reset-ti-syscon.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c index 5d1f8306cd4f..c34394f1e9e2 100644 --- a/drivers/reset/reset-ti-syscon.c +++ b/drivers/reset/reset-ti-syscon.c @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, mask = BIT(control->assert_bit); value = (control->flags & ASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); } /** @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, mask = BIT(control->deassert_bit); value = (control->flags & DEASSERT_SET) ? mask : 0x0; - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); } /** -- 2.18.0 _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply related [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-11-30 11:13 ` Ikjoon Jang -1 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 11:13 UTC (permalink / raw) To: Crystal Guo Cc: p.zabel, robh+dt, matthias.bgg, devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } I don't think there are no reset controllers with cached regmap, thus I don't think this is needed. Are there any specific reasons behind this, what I've missed here? We need to be sure that all other devices using this driver should have no side effects on write. I can think of a weird controller doing unwanted things internally on every write disregarding the current state. (or is this overly paranoid?) > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-11-30 11:13 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 11:13 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, yong.liang, srv_heupstream, seiya.wang, linux-kernel, fan.chen, robh+dt, linux-mediatek, p.zabel, matthias.bgg, yingjoe.chen, stanley.chu, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } I don't think there are no reset controllers with cached regmap, thus I don't think this is needed. Are there any specific reasons behind this, what I've missed here? We need to be sure that all other devices using this driver should have no side effects on write. I can think of a weird controller doing unwanted things internally on every write disregarding the current state. (or is this overly paranoid?) > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-11-30 11:13 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-11-30 11:13 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, yong.liang, s-anna, srv_heupstream, seiya.wang, linux-kernel, fan.chen, robh+dt, linux-mediatek, p.zabel, matthias.bgg, yingjoe.chen, stanley.chu, linux-arm-kernel On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } I don't think there are no reset controllers with cached regmap, thus I don't think this is needed. Are there any specific reasons behind this, what I've missed here? We need to be sure that all other devices using this driver should have no side effects on write. I can think of a weird controller doing unwanted things internally on every write disregarding the current state. (or is this overly paranoid?) > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert 2020-11-30 11:13 ` Ikjoon Jang (?) @ 2020-12-02 11:06 ` Crystal Guo -1 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-02 11:06 UTC (permalink / raw) To: Ikjoon Jang Cc: p.zabel, robh+dt, matthias.bgg, devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), linux-mediatek, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > Force the write operation in case the read already happens > > to return the correct value. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > mask = BIT(control->assert_bit); > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > } > > I don't think there are no reset controllers with cached regmap, > thus I don't think this is needed. > Are there any specific reasons behind this, what I've missed here? > > We need to be sure that all other devices using this driver > should have no side effects on write. > > I can think of a weird controller doing unwanted things internally > on every write disregarding the current state. (or is this overly > paranoid?) > The specific reason is that, the clear bit may keep the same value with the set bit, but the clear operation can be only be completed by writing 1 to the clear bit, not just with the current fake state "1". > > > > /** > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > mask = BIT(control->deassert_bit); > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > } > > > > /** ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-02 11:06 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-02 11:06 UTC (permalink / raw) To: Ikjoon Jang Cc: devicetree, Yong Liang (梁勇), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > Force the write operation in case the read already happens > > to return the correct value. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > mask = BIT(control->assert_bit); > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > } > > I don't think there are no reset controllers with cached regmap, > thus I don't think this is needed. > Are there any specific reasons behind this, what I've missed here? > > We need to be sure that all other devices using this driver > should have no side effects on write. > > I can think of a weird controller doing unwanted things internally > on every write disregarding the current state. (or is this overly > paranoid?) > The specific reason is that, the clear bit may keep the same value with the set bit, but the clear operation can be only be completed by writing 1 to the clear bit, not just with the current fake state "1". > > > > /** > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > mask = BIT(control->deassert_bit); > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > } > > > > /** _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-02 11:06 ` Crystal Guo 0 siblings, 0 replies; 42+ messages in thread From: Crystal Guo @ 2020-12-02 11:06 UTC (permalink / raw) To: Ikjoon Jang Cc: devicetree, Yong Liang (梁勇), s-anna, srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > Force the write operation in case the read already happens > > to return the correct value. > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > --- > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > --- a/drivers/reset/reset-ti-syscon.c > > +++ b/drivers/reset/reset-ti-syscon.c > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > mask = BIT(control->assert_bit); > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > } > > I don't think there are no reset controllers with cached regmap, > thus I don't think this is needed. > Are there any specific reasons behind this, what I've missed here? > > We need to be sure that all other devices using this driver > should have no side effects on write. > > I can think of a weird controller doing unwanted things internally > on every write disregarding the current state. (or is this overly > paranoid?) > The specific reason is that, the clear bit may keep the same value with the set bit, but the clear operation can be only be completed by writing 1 to the clear bit, not just with the current fake state "1". > > > > /** > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > mask = BIT(control->deassert_bit); > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > } > > > > /** _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert 2020-12-02 11:06 ` Crystal Guo (?) @ 2020-12-03 3:30 ` Ikjoon Jang -1 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-12-03 3:30 UTC (permalink / raw) To: Crystal Guo Cc: p.zabel, robh+dt, matthias.bgg, devicetree, Yong Liang (梁勇), Stanley Chu (朱原陞), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), linux-mediatek, Yingjoe Chen (陳英洲), s-anna, linux-arm-kernel On Wed, Dec 2, 2020 at 7:07 PM Crystal Guo <crystal.guo@mediatek.com> wrote: > > On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > > Force the write operation in case the read already happens > > > to return the correct value. > > > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > > --- > > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > > --- a/drivers/reset/reset-ti-syscon.c > > > +++ b/drivers/reset/reset-ti-syscon.c > > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->assert_bit); > > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > > } > > > > I don't think there are no reset controllers with cached regmap, > > thus I don't think this is needed. > > Are there any specific reasons behind this, what I've missed here? > > > > We need to be sure that all other devices using this driver > > should have no side effects on write. > > > > I can think of a weird controller doing unwanted things internally > > on every write disregarding the current state. (or is this overly > > paranoid?) > > > The specific reason is that, the clear bit may keep the same value with > the set bit, but the clear operation can be only be completed by writing > 1 to the clear bit, not just with the current fake state "1". > sorry. I didn't think of that case, then I think this patch must be applied. 8-) I've thought that the bit automatically flipped to the current reset state after the internal operation is done. > > > > > > /** > > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->deassert_bit); > > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > > } > > > > > > /** > ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-03 3:30 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-12-03 3:30 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, Yong Liang (梁勇), srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Wed, Dec 2, 2020 at 7:07 PM Crystal Guo <crystal.guo@mediatek.com> wrote: > > On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > > Force the write operation in case the read already happens > > > to return the correct value. > > > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > > --- > > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > > --- a/drivers/reset/reset-ti-syscon.c > > > +++ b/drivers/reset/reset-ti-syscon.c > > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->assert_bit); > > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > > } > > > > I don't think there are no reset controllers with cached regmap, > > thus I don't think this is needed. > > Are there any specific reasons behind this, what I've missed here? > > > > We need to be sure that all other devices using this driver > > should have no side effects on write. > > > > I can think of a weird controller doing unwanted things internally > > on every write disregarding the current state. (or is this overly > > paranoid?) > > > The specific reason is that, the clear bit may keep the same value with > the set bit, but the clear operation can be only be completed by writing > 1 to the clear bit, not just with the current fake state "1". > sorry. I didn't think of that case, then I think this patch must be applied. 8-) I've thought that the bit automatically flipped to the current reset state after the internal operation is done. > > > > > > /** > > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->deassert_bit); > > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > > } > > > > > > /** > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6, 3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-03 3:30 ` Ikjoon Jang 0 siblings, 0 replies; 42+ messages in thread From: Ikjoon Jang @ 2020-12-03 3:30 UTC (permalink / raw) To: Crystal Guo Cc: devicetree, Yong Liang (梁勇), s-anna, srv_heupstream, Seiya Wang (王迺君), linux-kernel, Fan Chen (陳凡), robh+dt, linux-mediatek, p.zabel, matthias.bgg, Yingjoe Chen (陳英洲), Stanley Chu (朱原陞), linux-arm-kernel On Wed, Dec 2, 2020 at 7:07 PM Crystal Guo <crystal.guo@mediatek.com> wrote: > > On Mon, 2020-11-30 at 19:13 +0800, Ikjoon Jang wrote: > > On Wed, Sep 30, 2020 at 10:21:59AM +0800, Crystal Guo wrote: > > > Force the write operation in case the read already happens > > > to return the correct value. > > > > > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > > > --- > > > drivers/reset/reset-ti-syscon.c | 4 ++-- > > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > > > index 5d1f8306cd4f..c34394f1e9e2 100644 > > > --- a/drivers/reset/reset-ti-syscon.c > > > +++ b/drivers/reset/reset-ti-syscon.c > > > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->assert_bit); > > > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > > > } > > > > I don't think there are no reset controllers with cached regmap, > > thus I don't think this is needed. > > Are there any specific reasons behind this, what I've missed here? > > > > We need to be sure that all other devices using this driver > > should have no side effects on write. > > > > I can think of a weird controller doing unwanted things internally > > on every write disregarding the current state. (or is this overly > > paranoid?) > > > The specific reason is that, the clear bit may keep the same value with > the set bit, but the clear operation can be only be completed by writing > 1 to the clear bit, not just with the current fake state "1". > sorry. I didn't think of that case, then I think this patch must be applied. 8-) I've thought that the bit automatically flipped to the current reset state after the internal operation is done. > > > > > > /** > > > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > > > mask = BIT(control->deassert_bit); > > > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > > > > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > > > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > > > } > > > > > > /** > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,3/3] reset-controller: ti: force the write operation when assert or deassert 2020-09-30 2:21 ` Crystal Guo (?) @ 2020-12-03 7:45 ` Philipp Zabel -1 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:45 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: srv_heupstream, linux-mediatek, linux-arm-kernel, linux-kernel, devicetree, s-anna, seiya.wang, stanley.chu, yingjoe.chen, fan.chen, yong.liang On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** > -- > 2.18.0 Thank you. Since Suman tested v4, this should be safe. Applied to reset/next. regards Philipp ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-03 7:45 ` Philipp Zabel 0 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:45 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, linux-arm-kernel On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** > -- > 2.18.0 Thank you. Since Suman tested v4, this should be safe. Applied to reset/next. regards Philipp _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 42+ messages in thread
* Re: [v6,3/3] reset-controller: ti: force the write operation when assert or deassert @ 2020-12-03 7:45 ` Philipp Zabel 0 siblings, 0 replies; 42+ messages in thread From: Philipp Zabel @ 2020-12-03 7:45 UTC (permalink / raw) To: Crystal Guo, robh+dt, matthias.bgg Cc: devicetree, yong.liang, stanley.chu, srv_heupstream, seiya.wang, linux-kernel, fan.chen, linux-mediatek, yingjoe.chen, s-anna, linux-arm-kernel On Wed, 2020-09-30 at 10:21 +0800, Crystal Guo wrote: > Force the write operation in case the read already happens > to return the correct value. > > Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> > --- > drivers/reset/reset-ti-syscon.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/reset/reset-ti-syscon.c b/drivers/reset/reset-ti-syscon.c > index 5d1f8306cd4f..c34394f1e9e2 100644 > --- a/drivers/reset/reset-ti-syscon.c > +++ b/drivers/reset/reset-ti-syscon.c > @@ -97,7 +97,7 @@ static int ti_syscon_reset_assert(struct reset_controller_dev *rcdev, > mask = BIT(control->assert_bit); > value = (control->flags & ASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->assert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->assert_offset, mask, value); > } > > /** > @@ -128,7 +128,7 @@ static int ti_syscon_reset_deassert(struct reset_controller_dev *rcdev, > mask = BIT(control->deassert_bit); > value = (control->flags & DEASSERT_SET) ? mask : 0x0; > > - return regmap_update_bits(data->regmap, control->deassert_offset, mask, value); > + return regmap_write_bits(data->regmap, control->deassert_offset, mask, value); > } > > /** > -- > 2.18.0 Thank you. Since Suman tested v4, this should be safe. Applied to reset/next. regards Philipp _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek ^ permalink raw reply [flat|nested] 42+ messages in thread
end of thread, other threads:[~2020-12-26 9:08 UTC | newest] Thread overview: 42+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-09-30 2:21 [v6,0/3] introduce TI reset controller for MT8192 SoC Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-09-30 2:21 ` [v6,1/3] dt-binding: reset-controller: mediatek: add YAML schemas Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-10-14 13:30 ` Crystal Guo 2020-10-14 13:30 ` Crystal Guo 2020-10-14 13:30 ` Crystal Guo 2020-11-11 8:28 ` Stanley Chu 2020-11-11 8:28 ` Stanley Chu 2020-11-11 8:28 ` Stanley Chu 2020-12-03 7:41 ` Philipp Zabel 2020-12-03 7:41 ` Philipp Zabel 2020-12-03 7:41 ` Philipp Zabel 2020-12-26 9:06 ` Crystal Guo 2020-12-26 9:06 ` Crystal Guo 2020-12-26 9:06 ` Crystal Guo 2020-09-30 2:21 ` [v6,2/3] reset-controller: ti: introduce a new reset handler Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-11-30 10:35 ` Ikjoon Jang 2020-11-30 10:35 ` Ikjoon Jang 2020-11-30 10:35 ` Ikjoon Jang 2020-12-04 2:34 ` Crystal Guo 2020-12-04 2:34 ` Crystal Guo 2020-12-04 2:34 ` Crystal Guo 2020-09-30 2:21 ` [v6,3/3] reset-controller: ti: force the write operation when assert or deassert Crystal Guo 2020-09-30 2:21 ` [v6, 3/3] " Crystal Guo 2020-09-30 2:21 ` Crystal Guo 2020-11-30 11:13 ` Ikjoon Jang 2020-11-30 11:13 ` Ikjoon Jang 2020-11-30 11:13 ` Ikjoon Jang 2020-12-02 11:06 ` Crystal Guo 2020-12-02 11:06 ` Crystal Guo 2020-12-02 11:06 ` Crystal Guo 2020-12-03 3:30 ` Ikjoon Jang 2020-12-03 3:30 ` Ikjoon Jang 2020-12-03 3:30 ` Ikjoon Jang 2020-12-03 7:45 ` [v6,3/3] " Philipp Zabel 2020-12-03 7:45 ` Philipp Zabel 2020-12-03 7:45 ` Philipp Zabel
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