From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Steen Hegelund <steen.hegelund@microchip.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Lars Povlsen <lars.povlsen@microchip.com>,
Bjarni Jonasson <bjarni.jonasson@microchip.com>,
Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 3/4] phy: Add Sparx5 ethernet serdes PHY driver
Date: Fri, 4 Dec 2020 13:55:33 +0000 [thread overview]
Message-ID: <20201204135532.GK1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20201204134826.lnkdtj5nrygsngm2@mchp-dev-shegelun>
On Fri, Dec 04, 2020 at 02:48:26PM +0100, Steen Hegelund wrote:
> On 03.12.2020 22:52, Andrew Lunn wrote:
> > What i have not yet seen is how this code plugs together with
> > phylink_pcs_ops?
> >
> > Can this hardware also be used for SATA, USB? As far as i understand,
> > the Marvell Comphy is multi-purpose, it is used for networking, USB,
> > and SATA, etc. Making it a generic PHY then makes sense, because
> > different subsystems need to use it.
> >
> > But it looks like this is for networking only? So i'm wondering if it
> > belongs in driver/net/pcs and it should be accessed using
> > phylink_pcs_ops?
> >
> > Andrew
>
> This is a PHY that communicates on a SerDes link to an ethernet PHY or a
> SFP. So I took the lead from earlier work: the Microsemi Ocelot SerDes driver,
> and added the Sparx5 SerDes PHY driver here since it is very similar in intent.
> It is not an ethernet PHY as such.
Okay, that is the normal situation in real hardware:
MAC <---> PCS PHY <---> SerDes PHY <---> SerDes lanes
where the PCS PHY handles the protocol level, and the SerDes PHY handles
the clocking and electrical characteristics of the SerDes lanes.
Maybe we should ask for a diagram of the setups when new support is
submitted to make the process of understanding the hardware easier?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Steen Hegelund <steen.hegelund@microchip.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Bjarni Jonasson <bjarni.jonasson@microchip.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>,
linux-arm-kernel@lists.infradead.org,
Microchip UNG Driver List <UNGLinuxDriver@microchip.com>,
Lars Povlsen <lars.povlsen@microchip.com>
Subject: Re: [PATCH v8 3/4] phy: Add Sparx5 ethernet serdes PHY driver
Date: Fri, 4 Dec 2020 13:55:33 +0000 [thread overview]
Message-ID: <20201204135532.GK1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20201204134826.lnkdtj5nrygsngm2@mchp-dev-shegelun>
On Fri, Dec 04, 2020 at 02:48:26PM +0100, Steen Hegelund wrote:
> On 03.12.2020 22:52, Andrew Lunn wrote:
> > What i have not yet seen is how this code plugs together with
> > phylink_pcs_ops?
> >
> > Can this hardware also be used for SATA, USB? As far as i understand,
> > the Marvell Comphy is multi-purpose, it is used for networking, USB,
> > and SATA, etc. Making it a generic PHY then makes sense, because
> > different subsystems need to use it.
> >
> > But it looks like this is for networking only? So i'm wondering if it
> > belongs in driver/net/pcs and it should be accessed using
> > phylink_pcs_ops?
> >
> > Andrew
>
> This is a PHY that communicates on a SerDes link to an ethernet PHY or a
> SFP. So I took the lead from earlier work: the Microsemi Ocelot SerDes driver,
> and added the Sparx5 SerDes PHY driver here since it is very similar in intent.
> It is not an ethernet PHY as such.
Okay, that is the normal situation in real hardware:
MAC <---> PCS PHY <---> SerDes PHY <---> SerDes lanes
where the PCS PHY handles the protocol level, and the SerDes PHY handles
the clocking and electrical characteristics of the SerDes lanes.
Maybe we should ask for a diagram of the setups when new support is
submitted to make the process of understanding the hardware easier?
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-12-04 13:56 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-03 10:30 [PATCH v8 0/4] Adding the Sparx5 Serdes driver Steen Hegelund
2020-12-03 10:30 ` [PATCH v8 1/4] dt-bindings: phy: Add sparx5-serdes bindings Steen Hegelund
2020-12-03 10:30 ` [PATCH v8 2/4] phy: Add ethernet serdes configuration option Steen Hegelund
2020-12-03 10:30 ` [PATCH v8 3/4] phy: Add Sparx5 ethernet serdes PHY driver Steen Hegelund
2020-12-03 21:52 ` Andrew Lunn
2020-12-03 21:52 ` Andrew Lunn
2020-12-03 22:52 ` Russell King - ARM Linux admin
2020-12-03 22:52 ` Russell King - ARM Linux admin
2020-12-04 7:56 ` Alexandre Belloni
2020-12-04 7:56 ` Alexandre Belloni
2020-12-04 10:20 ` Russell King - ARM Linux admin
2020-12-04 10:20 ` Russell King - ARM Linux admin
2020-12-04 13:51 ` Steen Hegelund
2020-12-04 13:51 ` Steen Hegelund
2020-12-04 13:48 ` Steen Hegelund
2020-12-04 13:48 ` Steen Hegelund
2020-12-04 13:55 ` Russell King - ARM Linux admin [this message]
2020-12-04 13:55 ` Russell King - ARM Linux admin
2020-12-04 14:16 ` Alexandre Belloni
2020-12-04 14:16 ` Alexandre Belloni
2020-12-07 8:13 ` Steen Hegelund
2020-12-07 8:13 ` Steen Hegelund
2020-12-03 10:30 ` [PATCH v8 4/4] arm64: dts: sparx5: Add Sparx5 serdes driver node Steen Hegelund
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201204135532.GK1551@shell.armlinux.org.uk \
--to=linux@armlinux.org.uk \
--cc=UNGLinuxDriver@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=andrew@lunn.ch \
--cc=bjarni.jonasson@microchip.com \
--cc=kishon@ti.com \
--cc=lars.povlsen@microchip.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=steen.hegelund@microchip.com \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.