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* [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b
@ 2020-12-15 21:06 Chris Wilson
  2020-12-15 21:06   ` [igt-dev] " Chris Wilson
                   ` (3 more replies)
  0 siblings, 4 replies; 10+ messages in thread
From: Chris Wilson @ 2020-12-15 21:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev, Chris Wilson

Without opting into 48B addressing, objects are strictly limited to
being placed only the first (4G - 4K). This is to avoid an issue with
stateless 32b addressing being unable to access the last 32b page.
Assert that we do indeed fail to fit in a 4G object without setting the
EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag.

Reported-by: CQ Tang <cq.tang@intel.com>
References:: 48ea1e32c39d ("drm/i915/gen9: Set PIN_ZONE_4G end to 4GB - 1 page")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: CQ Tang <cq.tang@intel.com>
---
 tests/i915/gem_exec_params.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index c405f4eb7..e679c512a 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -340,7 +340,13 @@ static void test_larger_than_life_batch(int fd)
        for_each_engine(e, fd) {
 	       /* Keep the batch_len implicit [0] */
 	       execbuf.flags = eb_ring(e);
-	       gem_execbuf(fd, &execbuf);
+
+	       /* non-48b objects are limited to the low (4G - 4K) */
+	       igt_assert_eq(__gem_execbuf(fd, &execbuf), -ENOSPC);
+
+	       exec.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	       igt_assert_eq(__gem_execbuf(fd, &execbuf), 0);
+	       exec.flags = 0;
        }
 
        gem_sync(fd, exec.handle);
-- 
2.29.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread
* [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b
@ 2020-12-15 21:05 Chris Wilson
  0 siblings, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2020-12-15 21:05 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev, Chris Wilson

Without opting into 48B addressing, objects are strictly limited to
being placed only the first (4G - 4K). This is to avoid an issue with
stateless 32b addressing being unable to access the last 32b page.
Assert that we do indeed fail to fit in a 4G object without setting the
EXEC_OBJECT_SUPPORTS_48B_ADDRESS flag.

Reported-by: CQ Tang <cq.tang@intel.com>
References:: 48ea1e32c39d ("drm/i915/gen9: Set PIN_ZONE_4G end to 4GB - 1 page")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: CQ Tang <cq.tang@intel.com>
---
 tests/i915/gem_exec_params.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/tests/i915/gem_exec_params.c b/tests/i915/gem_exec_params.c
index c405f4eb7..e679c512a 100644
--- a/tests/i915/gem_exec_params.c
+++ b/tests/i915/gem_exec_params.c
@@ -340,7 +340,13 @@ static void test_larger_than_life_batch(int fd)
        for_each_engine(e, fd) {
 	       /* Keep the batch_len implicit [0] */
 	       execbuf.flags = eb_ring(e);
-	       gem_execbuf(fd, &execbuf);
+
+	       /* non-48b objects are limited to the low (4G - 4K) */
+	       igt_assert_eq(__gem_execbuf(fd, &execbuf), -ENOSPC);
+
+	       exec.flags = EXEC_OBJECT_SUPPORTS_48B_ADDRESS;
+	       igt_assert_eq(__gem_execbuf(fd, &execbuf), 0);
+	       exec.flags = 0;
        }
 
        gem_sync(fd, exec.handle);
-- 
2.29.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2020-12-16  9:36 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-15 21:06 [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b Chris Wilson
2020-12-15 21:06 ` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_softpin: Check full placement control under full-ppgtt Chris Wilson
2020-12-15 21:06   ` [igt-dev] " Chris Wilson
2020-12-15 21:53   ` [Intel-gfx] [PATCH i-g-t v2] " Chris Wilson
2020-12-16  9:31   ` [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] " Matthew Auld
2020-12-16  9:36     ` Chris Wilson
2020-12-15 21:47 ` [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b Tang, CQ
2020-12-16  3:11 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/2] " Patchwork
2020-12-16  4:52 ` [igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-12-15 21:05 [Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_params: Assert a 4G object does _not_ fit without 48b Chris Wilson

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