From: Alexandru Elisei <alexandru.elisei@arm.com> To: drjones@redhat.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Cc: andre.przywara@arm.com, eric.auger@redhat.com, yuzenghui@huawei.com Subject: [kvm-unit-tests PATCH v2 03/12] arm/arm64: gic: Remove SMP synchronization from ipi_clear_active_handler() Date: Thu, 17 Dec 2020 14:13:51 +0000 [thread overview] Message-ID: <20201217141400.106137-4-alexandru.elisei@arm.com> (raw) In-Reply-To: <20201217141400.106137-1-alexandru.elisei@arm.com> The gicv{2,3}-active test sends an IPI from the boot CPU to itself, then checks that the interrupt has been received as expected. There is no need to use inter-processor memory synchronization primitives on code that runs on the same CPU, so remove the unneeded memory barriers. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arm/gic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index ca61dba2986c..1c9f4a01b6e4 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -364,6 +364,7 @@ static struct gic gicv3 = { }, }; +/* Runs on the same CPU as the sender, no need for memory synchronization */ static void ipi_clear_active_handler(struct pt_regs *regs __unused) { u32 irqstat = gic_read_iar(); @@ -380,13 +381,10 @@ static void ipi_clear_active_handler(struct pt_regs *regs __unused) writel(val, base + GICD_ICACTIVER); - smp_rmb(); /* pairs with wmb in stats_reset */ ++acked[smp_processor_id()]; check_irqnr(irqnr); - smp_wmb(); /* pairs with rmb in check_acked */ } else { ++spurious[smp_processor_id()]; - smp_wmb(); } } -- 2.29.2
WARNING: multiple messages have this Message-ID (diff)
From: Alexandru Elisei <alexandru.elisei@arm.com> To: drjones@redhat.com, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu Cc: andre.przywara@arm.com Subject: [kvm-unit-tests PATCH v2 03/12] arm/arm64: gic: Remove SMP synchronization from ipi_clear_active_handler() Date: Thu, 17 Dec 2020 14:13:51 +0000 [thread overview] Message-ID: <20201217141400.106137-4-alexandru.elisei@arm.com> (raw) In-Reply-To: <20201217141400.106137-1-alexandru.elisei@arm.com> The gicv{2,3}-active test sends an IPI from the boot CPU to itself, then checks that the interrupt has been received as expected. There is no need to use inter-processor memory synchronization primitives on code that runs on the same CPU, so remove the unneeded memory barriers. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- arm/gic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index ca61dba2986c..1c9f4a01b6e4 100644 --- a/arm/gic.c +++ b/arm/gic.c @@ -364,6 +364,7 @@ static struct gic gicv3 = { }, }; +/* Runs on the same CPU as the sender, no need for memory synchronization */ static void ipi_clear_active_handler(struct pt_regs *regs __unused) { u32 irqstat = gic_read_iar(); @@ -380,13 +381,10 @@ static void ipi_clear_active_handler(struct pt_regs *regs __unused) writel(val, base + GICD_ICACTIVER); - smp_rmb(); /* pairs with wmb in stats_reset */ ++acked[smp_processor_id()]; check_irqnr(irqnr); - smp_wmb(); /* pairs with rmb in check_acked */ } else { ++spurious[smp_processor_id()]; - smp_wmb(); } } -- 2.29.2 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2020-12-17 14:15 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-17 14:13 [kvm-unit-tests PATCH v2 00/12] GIC fixes and improvements Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 01/12] lib: arm/arm64: gicv3: Add missing barrier when sending IPIs Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 12:03 ` André Przywara 2020-12-18 12:03 ` André Przywara 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 02/12] lib: arm/arm64: gicv2: " Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei [this message] 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 03/12] arm/arm64: gic: Remove SMP synchronization from ipi_clear_active_handler() Alexandru Elisei 2020-12-18 12:04 ` André Przywara 2020-12-18 12:04 ` André Przywara 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 04/12] arm/arm64: gic: Remove unnecessary synchronization with stats_reset() Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 05/12] arm/arm64: gic: Use correct memory ordering for the IPI test Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 12:04 ` André Przywara 2020-12-18 12:04 ` André Przywara 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 06/12] arm/arm64: gic: Check spurious and bad_sender in the active test Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 07/12] arm/arm64: gic: Wait for writes to acked or spurious to complete Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 08/12] arm/arm64: gic: Split check_acked() into two functions Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 15:52 ` André Przywara 2020-12-18 15:52 ` André Przywara 2021-01-25 17:27 ` Alexandru Elisei 2021-01-25 17:27 ` Alexandru Elisei 2021-01-27 15:10 ` Andre Przywara 2021-01-27 15:10 ` Andre Przywara 2021-01-27 16:00 ` Alexandru Elisei 2021-01-27 16:00 ` Alexandru Elisei 2021-02-16 18:04 ` Andre Przywara 2021-02-16 18:04 ` Andre Przywara 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 09/12] arm/arm64: gic: Make check_acked() more generic Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 15:52 ` André Przywara 2020-12-18 15:52 ` André Przywara 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 10/12] arm64: gic: its-trigger: Don't trigger the LPI while it is pending Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 18:15 ` André Przywara 2020-12-18 18:15 ` André Przywara 2021-01-25 16:57 ` Alexandru Elisei 2021-01-25 16:57 ` Alexandru Elisei 2020-12-17 14:13 ` [kvm-unit-tests PATCH v2 11/12] lib: arm64: gic-v3-its: Add wmb() barrier before INT command Alexandru Elisei 2020-12-17 14:13 ` Alexandru Elisei 2020-12-18 18:36 ` André Przywara 2020-12-18 18:36 ` André Przywara 2021-01-25 15:16 ` Alexandru Elisei 2021-01-25 15:16 ` Alexandru Elisei 2020-12-17 14:14 ` [kvm-unit-tests PATCH v2 12/12] arm64: gic: Use IPI test checking for the LPI tests Alexandru Elisei 2020-12-17 14:14 ` Alexandru Elisei
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20201217141400.106137-4-alexandru.elisei@arm.com \ --to=alexandru.elisei@arm.com \ --cc=andre.przywara@arm.com \ --cc=drjones@redhat.com \ --cc=eric.auger@redhat.com \ --cc=kvm@vger.kernel.org \ --cc=kvmarm@lists.cs.columbia.edu \ --cc=yuzenghui@huawei.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.