[PATCH net-next 0/3] dpaa2: add 1000base-X support

[PATCH net-next 0/3] dpaa2: add 1000base-X support

[Russell King - ARM Linux admin]

Hi,

This patch series adds 1000base-X support to pcs-lynx and DPAA2,
allowing runtime switching between SGMII and 1000base-X. This is
a pre-requisit for SFP module support on the SolidRun ComExpress 7.

 drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 25 ++++++++++++----
 drivers/net/pcs/pcs-lynx.c                       | 36 ++++++++++++++++++++++++
 2 files changed, 56 insertions(+), 5 deletions(-)

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

[PATCH net-next 1/3] net: pcs: add pcs-lynx 1000BASE-X support

[Russell King]

Add support for 1000BASE-X to pcs-lynx for the LX2160A.

This commit prepares the ground work for allowing 1G fiber connections
to be used with DPAA2 on the SolidRun CEX7 platforms.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 drivers/net/pcs/pcs-lynx.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/net/pcs/pcs-lynx.c b/drivers/net/pcs/pcs-lynx.c
index 62bb9272dcb2..af36cd647bf5 100644
--- a/drivers/net/pcs/pcs-lynx.c
+++ b/drivers/net/pcs/pcs-lynx.c
@@ -11,6 +11,7 @@
 #define LINK_TIMER_VAL(ns)		((u32)((ns) / SGMII_CLOCK_PERIOD_NS))
 
 #define SGMII_AN_LINK_TIMER_NS		1600000 /* defined by SGMII spec */
+#define IEEE8023_LINK_TIMER_NS		10000000
 
 #define LINK_TIMER_LO			0x12
 #define LINK_TIMER_HI			0x13
@@ -83,6 +84,7 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs,
 	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
 
 	switch (state->interface) {
+	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 		phylink_mii_c22_pcs_get_state(lynx->mdio, state);
@@ -108,6 +110,30 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs,
 		state->link, state->an_enabled, state->an_complete);
 }
 
+static int lynx_pcs_config_1000basex(struct mdio_device *pcs,
+				     unsigned int mode,
+				     const unsigned long *advertising)
+{
+	struct mii_bus *bus = pcs->bus;
+	int addr = pcs->addr;
+	u32 link_timer;
+	int err;
+
+	link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS);
+	mdiobus_write(bus, addr, LINK_TIMER_LO, link_timer & 0xffff);
+	mdiobus_write(bus, addr, LINK_TIMER_HI, link_timer >> 16);
+
+	err = mdiobus_modify(bus, addr, IF_MODE,
+			     IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN,
+			     0);
+	if (err)
+		return err;
+
+	return phylink_mii_c22_pcs_config(pcs, mode,
+					  PHY_INTERFACE_MODE_1000BASEX,
+					  advertising);
+}
+
 static int lynx_pcs_config_sgmii(struct mdio_device *pcs, unsigned int mode,
 				 const unsigned long *advertising)
 {
@@ -163,6 +189,8 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
 
 	switch (ifmode) {
+	case PHY_INTERFACE_MODE_1000BASEX:
+		return lynx_pcs_config_1000basex(lynx->mdio, mode, advertising);
 	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 		return lynx_pcs_config_sgmii(lynx->mdio, mode, advertising);
@@ -185,6 +213,13 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
 	return 0;
 }
 
+static void lynx_pcs_an_restart(struct phylink_pcs *pcs)
+{
+	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
+
+	phylink_mii_c22_pcs_an_restart(lynx->mdio);
+}
+
 static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode,
 				   int speed, int duplex)
 {
@@ -290,6 +325,7 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
 static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
 	.pcs_get_state = lynx_pcs_get_state,
 	.pcs_config = lynx_pcs_config,
+	.pcs_an_restart = lynx_pcs_an_restart,
 	.pcs_link_up = lynx_pcs_link_up,
 };
 
-- 
2.20.1

[PATCH net-next 2/3] net: dpaa2-mac: add 1000BASE-X support

[Russell King]

Now that pcs-lynx supports 1000BASE-X, add support for this interface
mode to dpaa2-mac. pcs-lynx can be switched at runtime between SGMII
and 1000BASE-X mode, so allow dpaa2-mac to switch between these as
well.

This commit prepares the ground work for allowing 1G fiber connections
to be used with DPAA2 on the SolidRun CEX7 platforms.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 .../net/ethernet/freescale/dpaa2/dpaa2-mac.c  | 20 ++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index 69ad869446cf..3ddfb40eb5e4 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -79,10 +79,20 @@ static bool dpaa2_mac_phy_mode_mismatch(struct dpaa2_mac *mac,
 					phy_interface_t interface)
 {
 	switch (interface) {
+	/* We can switch between SGMII and 1000BASE-X at runtime with
+	 * pcs-lynx
+	 */
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_1000BASEX:
+		if (mac->pcs &&
+		    (mac->if_mode == PHY_INTERFACE_MODE_SGMII ||
+		     mac->if_mode == PHY_INTERFACE_MODE_1000BASEX))
+			return false;
+		return interface != mac->if_mode;
+
 	case PHY_INTERFACE_MODE_10GBASER:
 	case PHY_INTERFACE_MODE_USXGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
-	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII_RXID:
@@ -122,13 +132,17 @@ static void dpaa2_mac_validate(struct phylink_config *config,
 		fallthrough;
 	case PHY_INTERFACE_MODE_SGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
+	case PHY_INTERFACE_MODE_1000BASEX:
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_TXID:
-		phylink_set(mask, 10baseT_Full);
-		phylink_set(mask, 100baseT_Full);
+		phylink_set(mask, 1000baseX_Full);
 		phylink_set(mask, 1000baseT_Full);
+		if (state->interface == PHY_INTERFACE_MODE_1000BASEX)
+			break;
+		phylink_set(mask, 100baseT_Full);
+		phylink_set(mask, 10baseT_Full);
 		break;
 	default:
 		goto empty_set;
-- 
2.20.1

[PATCH net-next 3/3] net: dpaa2-mac: add backplane link mode support

[Russell King]

Add support for backplane link mode, which is, according to discussions
with NXP earlier in the year, is a mode where the OS (Linux) is able to
manage the PCS and Serdes itself.

This commit prepares the ground work for allowing 1G fiber connections
to be used with DPAA2 on the SolidRun CEX7 platforms.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
 drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
index 3ddfb40eb5e4..ccaf7e35abeb 100644
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -315,8 +315,9 @@ int dpaa2_mac_connect(struct dpaa2_mac *mac)
 		goto err_put_node;
 	}
 
-	if (mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&
-	    mac->attr.eth_if != DPMAC_ETH_IF_RGMII) {
+	if ((mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&
+	     mac->attr.eth_if != DPMAC_ETH_IF_RGMII) ||
+	    mac->attr.link_type == DPMAC_LINK_TYPE_BACKPLANE) {
 		err = dpaa2_pcs_create(mac, dpmac_node, mac->attr.id);
 		if (err)
 			goto err_put_node;
-- 
2.20.1

Re: [PATCH net-next 1/3] net: pcs: add pcs-lynx 1000BASE-X support

[Ioana Ciornei]

On Tue, Jan 19, 2021 at 03:35:58PM +0000, Russell King wrote:
> Add support for 1000BASE-X to pcs-lynx for the LX2160A.
> 
> This commit prepares the ground work for allowing 1G fiber connections
> to be used with DPAA2 on the SolidRun CEX7 platforms.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>

Also tested 1000BASEX on a HoneyComb board with a 1G fiber connection.

Thanks!

> ---
>  drivers/net/pcs/pcs-lynx.c | 36 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 36 insertions(+)
> 
> diff --git a/drivers/net/pcs/pcs-lynx.c b/drivers/net/pcs/pcs-lynx.c
> index 62bb9272dcb2..af36cd647bf5 100644
> --- a/drivers/net/pcs/pcs-lynx.c
> +++ b/drivers/net/pcs/pcs-lynx.c
> @@ -11,6 +11,7 @@
>  #define LINK_TIMER_VAL(ns)		((u32)((ns) / SGMII_CLOCK_PERIOD_NS))
>  
>  #define SGMII_AN_LINK_TIMER_NS		1600000 /* defined by SGMII spec */
> +#define IEEE8023_LINK_TIMER_NS		10000000
>  
>  #define LINK_TIMER_LO			0x12
>  #define LINK_TIMER_HI			0x13
> @@ -83,6 +84,7 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs,
>  	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
>  
>  	switch (state->interface) {
> +	case PHY_INTERFACE_MODE_1000BASEX:
>  	case PHY_INTERFACE_MODE_SGMII:
>  	case PHY_INTERFACE_MODE_QSGMII:
>  		phylink_mii_c22_pcs_get_state(lynx->mdio, state);
> @@ -108,6 +110,30 @@ static void lynx_pcs_get_state(struct phylink_pcs *pcs,
>  		state->link, state->an_enabled, state->an_complete);
>  }
>  
> +static int lynx_pcs_config_1000basex(struct mdio_device *pcs,
> +				     unsigned int mode,
> +				     const unsigned long *advertising)
> +{
> +	struct mii_bus *bus = pcs->bus;
> +	int addr = pcs->addr;
> +	u32 link_timer;
> +	int err;
> +
> +	link_timer = LINK_TIMER_VAL(IEEE8023_LINK_TIMER_NS);
> +	mdiobus_write(bus, addr, LINK_TIMER_LO, link_timer & 0xffff);
> +	mdiobus_write(bus, addr, LINK_TIMER_HI, link_timer >> 16);
> +
> +	err = mdiobus_modify(bus, addr, IF_MODE,
> +			     IF_MODE_SGMII_EN | IF_MODE_USE_SGMII_AN,
> +			     0);
> +	if (err)
> +		return err;
> +
> +	return phylink_mii_c22_pcs_config(pcs, mode,
> +					  PHY_INTERFACE_MODE_1000BASEX,
> +					  advertising);
> +}
> +
>  static int lynx_pcs_config_sgmii(struct mdio_device *pcs, unsigned int mode,
>  				 const unsigned long *advertising)
>  {
> @@ -163,6 +189,8 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
>  	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
>  
>  	switch (ifmode) {
> +	case PHY_INTERFACE_MODE_1000BASEX:
> +		return lynx_pcs_config_1000basex(lynx->mdio, mode, advertising);
>  	case PHY_INTERFACE_MODE_SGMII:
>  	case PHY_INTERFACE_MODE_QSGMII:
>  		return lynx_pcs_config_sgmii(lynx->mdio, mode, advertising);
> @@ -185,6 +213,13 @@ static int lynx_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
>  	return 0;
>  }
>  
> +static void lynx_pcs_an_restart(struct phylink_pcs *pcs)
> +{
> +	struct lynx_pcs *lynx = phylink_pcs_to_lynx(pcs);
> +
> +	phylink_mii_c22_pcs_an_restart(lynx->mdio);
> +}
> +
>  static void lynx_pcs_link_up_sgmii(struct mdio_device *pcs, unsigned int mode,
>  				   int speed, int duplex)
>  {
> @@ -290,6 +325,7 @@ static void lynx_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
>  static const struct phylink_pcs_ops lynx_pcs_phylink_ops = {
>  	.pcs_get_state = lynx_pcs_get_state,
>  	.pcs_config = lynx_pcs_config,
> +	.pcs_an_restart = lynx_pcs_an_restart,
>  	.pcs_link_up = lynx_pcs_link_up,
>  };
>  
> -- 
> 2.20.1
> 

Re: [PATCH net-next 3/3] net: dpaa2-mac: add backplane link mode support

[Ioana Ciornei]

On Tue, Jan 19, 2021 at 03:36:09PM +0000, Russell King wrote:
> Add support for backplane link mode, which is, according to discussions
> with NXP earlier in the year, is a mode where the OS (Linux) is able to
> manage the PCS and Serdes itself.

Indeed, DPMACs in TYPE_BACKPLANE can have both their PCS and SerDes managed
by Linux (since the firmware is not touching these).
That being said, DPMACs in TYPE_PHY (the type that is already supported
in dpaa2-mac) can also have their PCS managed by Linux (no interraction
from the firmware's part with the PCS, just the SerDes).

All in all, this patch is not needed for this particular usecase, where
the switch between 1000Base-X and SGMII is done by just a minor
reconfiguration in the PCS, without the need for SerDes changes.

Also, with just the changes from this patch, a interface connected to a
DPMAC in TYPE_BACKPLANE is not even creating a phylink instance. It's
mainly because of this check from dpaa2-eth:

	if (dpaa2_eth_is_type_phy(priv)) {
		err = dpaa2_mac_connect(mac);


I would suggest just dropping this patch.

Ioana

> 
> This commit prepares the ground work for allowing 1G fiber connections
> to be used with DPAA2 on the SolidRun CEX7 platforms.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
> ---
>  drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> index 3ddfb40eb5e4..ccaf7e35abeb 100644
> --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> @@ -315,8 +315,9 @@ int dpaa2_mac_connect(struct dpaa2_mac *mac)
>  		goto err_put_node;
>  	}
>  
> -	if (mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&
> -	    mac->attr.eth_if != DPMAC_ETH_IF_RGMII) {
> +	if ((mac->attr.link_type == DPMAC_LINK_TYPE_PHY &&
> +	     mac->attr.eth_if != DPMAC_ETH_IF_RGMII) ||
> +	    mac->attr.link_type == DPMAC_LINK_TYPE_BACKPLANE) {
>  		err = dpaa2_pcs_create(mac, dpmac_node, mac->attr.id);
>  		if (err)
>  			goto err_put_node;
> -- 
> 2.20.1
> 

Re: [PATCH net-next 2/3] net: dpaa2-mac: add 1000BASE-X support

[Ioana Ciornei]

On Tue, Jan 19, 2021 at 03:36:03PM +0000, Russell King wrote:
> Now that pcs-lynx supports 1000BASE-X, add support for this interface
> mode to dpaa2-mac. pcs-lynx can be switched at runtime between SGMII
> and 1000BASE-X mode, so allow dpaa2-mac to switch between these as
> well.
> 
> This commit prepares the ground work for allowing 1G fiber connections
> to be used with DPAA2 on the SolidRun CEX7 platforms.
> 
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>


> ---
>  .../net/ethernet/freescale/dpaa2/dpaa2-mac.c  | 20 ++++++++++++++++---
>  1 file changed, 17 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> index 69ad869446cf..3ddfb40eb5e4 100644
> --- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> +++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
> @@ -79,10 +79,20 @@ static bool dpaa2_mac_phy_mode_mismatch(struct dpaa2_mac *mac,
>  					phy_interface_t interface)
>  {
>  	switch (interface) {
> +	/* We can switch between SGMII and 1000BASE-X at runtime with
> +	 * pcs-lynx
> +	 */
> +	case PHY_INTERFACE_MODE_SGMII:
> +	case PHY_INTERFACE_MODE_1000BASEX:
> +		if (mac->pcs &&
> +		    (mac->if_mode == PHY_INTERFACE_MODE_SGMII ||
> +		     mac->if_mode == PHY_INTERFACE_MODE_1000BASEX))
> +			return false;
> +		return interface != mac->if_mode;
> +
>  	case PHY_INTERFACE_MODE_10GBASER:
>  	case PHY_INTERFACE_MODE_USXGMII:
>  	case PHY_INTERFACE_MODE_QSGMII:
> -	case PHY_INTERFACE_MODE_SGMII:
>  	case PHY_INTERFACE_MODE_RGMII:
>  	case PHY_INTERFACE_MODE_RGMII_ID:
>  	case PHY_INTERFACE_MODE_RGMII_RXID:
> @@ -122,13 +132,17 @@ static void dpaa2_mac_validate(struct phylink_config *config,
>  		fallthrough;
>  	case PHY_INTERFACE_MODE_SGMII:
>  	case PHY_INTERFACE_MODE_QSGMII:
> +	case PHY_INTERFACE_MODE_1000BASEX:
>  	case PHY_INTERFACE_MODE_RGMII:
>  	case PHY_INTERFACE_MODE_RGMII_ID:
>  	case PHY_INTERFACE_MODE_RGMII_RXID:
>  	case PHY_INTERFACE_MODE_RGMII_TXID:
> -		phylink_set(mask, 10baseT_Full);
> -		phylink_set(mask, 100baseT_Full);
> +		phylink_set(mask, 1000baseX_Full);
>  		phylink_set(mask, 1000baseT_Full);
> +		if (state->interface == PHY_INTERFACE_MODE_1000BASEX)
> +			break;
> +		phylink_set(mask, 100baseT_Full);
> +		phylink_set(mask, 10baseT_Full);
>  		break;
>  	default:
>  		goto empty_set;
> -- 
> 2.20.1
> 

Re: [PATCH net-next 3/3] net: dpaa2-mac: add backplane link mode support

[Russell King - ARM Linux admin]

On Wed, Jan 20, 2021 at 10:19:01PM +0000, Ioana Ciornei wrote:
> On Tue, Jan 19, 2021 at 03:36:09PM +0000, Russell King wrote:
> > Add support for backplane link mode, which is, according to discussions
> > with NXP earlier in the year, is a mode where the OS (Linux) is able to
> > manage the PCS and Serdes itself.
> 
> Indeed, DPMACs in TYPE_BACKPLANE can have both their PCS and SerDes managed
> by Linux (since the firmware is not touching these).
> That being said, DPMACs in TYPE_PHY (the type that is already supported
> in dpaa2-mac) can also have their PCS managed by Linux (no interraction
> from the firmware's part with the PCS, just the SerDes).

This is not what was discussed last year. It clearly shows in the
slides that Bogdan sent in April 2020 "PCS Representation in Linux.pptx"
page 4 that the firmware manages the PCS in TYPE_PHY and TYPE_FIXED
mode.

It was explained during the call that Linux must not access the internal
MDIO nor touch the PCS _except_ when using TYPE_BACKPLANE mode. Touching
the internal MDIO was stated as unsupported in other modes as the MC
firmware will be performing MDIO accesses.

> Also, with just the changes from this patch, a interface connected to a
> DPMAC in TYPE_BACKPLANE is not even creating a phylink instance. It's
> mainly because of this check from dpaa2-eth:
> 
> 	if (dpaa2_eth_is_type_phy(priv)) {
> 		err = dpaa2_mac_connect(mac);
> 
> 
> I would suggest just dropping this patch.

That is a recent change in net-next, but is not in my tree...

In any case, if NXP have changed it such that, when in TYPE_PHY, the
MC firmware no longer accesses the PCS and it is now safe to perform
MDIO accesses, then we _still_ need this patch for older firmwares.

In short, what you've put in your email does not tie up with the
position that was discussed last year, and seems to me to be a total
U-turn over what was being said.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

Re: [PATCH net-next 3/3] net: dpaa2-mac: add backplane link mode support

[Russell King - ARM Linux admin]

On Wed, Jan 20, 2021 at 10:19:01PM +0000, Ioana Ciornei wrote:
> On Tue, Jan 19, 2021 at 03:36:09PM +0000, Russell King wrote:
> > Add support for backplane link mode, which is, according to discussions
> > with NXP earlier in the year, is a mode where the OS (Linux) is able to
> > manage the PCS and Serdes itself.
> 
> Indeed, DPMACs in TYPE_BACKPLANE can have both their PCS and SerDes managed
> by Linux (since the firmware is not touching these).
> That being said, DPMACs in TYPE_PHY (the type that is already supported
> in dpaa2-mac) can also have their PCS managed by Linux (no interraction
> from the firmware's part with the PCS, just the SerDes).
> 
> All in all, this patch is not needed for this particular usecase, where
> the switch between 1000Base-X and SGMII is done by just a minor
> reconfiguration in the PCS, without the need for SerDes changes.
> 
> Also, with just the changes from this patch, a interface connected to a
> DPMAC in TYPE_BACKPLANE is not even creating a phylink instance. It's
> mainly because of this check from dpaa2-eth:
> 
> 	if (dpaa2_eth_is_type_phy(priv)) {
> 		err = dpaa2_mac_connect(mac);
> 
> 
> I would suggest just dropping this patch.

Hi Ioana,

So what is happening with this series given our discussions off-list?

Do I resend it as-is?

Thanks.

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Re: [PATCH net-next 3/3] net: dpaa2-mac: add backplane link mode support

[Ioana Ciornei]

On Thu, Feb 04, 2021 at 02:51:24PM +0000, Russell King - ARM Linux admin wrote:
> On Wed, Jan 20, 2021 at 10:19:01PM +0000, Ioana Ciornei wrote:
> > On Tue, Jan 19, 2021 at 03:36:09PM +0000, Russell King wrote:
> > > Add support for backplane link mode, which is, according to discussions
> > > with NXP earlier in the year, is a mode where the OS (Linux) is able to
> > > manage the PCS and Serdes itself.
> > 
> > Indeed, DPMACs in TYPE_BACKPLANE can have both their PCS and SerDes managed
> > by Linux (since the firmware is not touching these).
> > That being said, DPMACs in TYPE_PHY (the type that is already supported
> > in dpaa2-mac) can also have their PCS managed by Linux (no interraction
> > from the firmware's part with the PCS, just the SerDes).
> > 
> > All in all, this patch is not needed for this particular usecase, where
> > the switch between 1000Base-X and SGMII is done by just a minor
> > reconfiguration in the PCS, without the need for SerDes changes.
> > 
> > Also, with just the changes from this patch, a interface connected to a
> > DPMAC in TYPE_BACKPLANE is not even creating a phylink instance. It's
> > mainly because of this check from dpaa2-eth:
> > 
> > 	if (dpaa2_eth_is_type_phy(priv)) {
> > 		err = dpaa2_mac_connect(mac);
> > 
> > 
> > I would suggest just dropping this patch.
> 
> Hi Ioana,
> 
> So what is happening with this series given our discussions off-list?
> 

Let's also accept TYPE_BACKPLANE as you suggested.

> Do I resend it as-is?
> 

For the net-next, you would also need the following diff on top of your changes in patch 3/3:

--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h
@@ -695,7 +695,9 @@ static inline unsigned int dpaa2_eth_rx_head_room(struct dpaa2_eth_priv *priv)

 static inline bool dpaa2_eth_is_type_phy(struct dpaa2_eth_priv *priv)
 {
-       if (priv->mac && priv->mac->attr.link_type == DPMAC_LINK_TYPE_PHY)
+       if (priv->mac &&
+           (priv->mac->attr.link_type == DPMAC_LINK_TYPE_PHY ||
+            priv->mac->attr.link_type == DPMAC_LINK_TYPE_BACKPLANE))
                return true;

        return false;

Would you mind amending your commit with this and resending the series?

Thanks,
Ioana