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From: Leif Lindholm <leif@nuviainc.com>
To: qemu-arm@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Shashi Mallela <shashi.mallela@linaro.org>,
	qemu-devel@nongnu.org
Subject: [RFC PATCH 2/4] hw/intc: add helper function to determine gicv3 redistributor size
Date: Sun, 24 Jan 2021 02:53:04 +0000	[thread overview]
Message-ID: <20210124025306.3949-3-leif@nuviainc.com> (raw)
In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com>

GICv3 sets aside 128K for each redistributor block, whereas GICv4 sets
aside 256K. To enable use of the gicv3 model for gicv4, abstract this
away as the helper function gicv3_redist_size() and replace the current
hardcoded locations with calls to this function.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
---
 hw/intc/arm_gicv3_common.c         |  2 +-
 hw/intc/arm_gicv3_redist.c         | 13 +++++++++----
 include/hw/intc/arm_gicv3_common.h |  3 +++
 3 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 7365d24873..a8510b39a1 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -299,7 +299,7 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler,
 
         memory_region_init_io(&s->iomem_redist[i], OBJECT(s),
                               ops ? &ops[1] : NULL, s, name,
-                              s->redist_region_count[i] * GICV3_REDIST_SIZE);
+                              s->redist_region_count[i] * gicv3_redist_size(s));
         sysbus_init_mmio(sbd, &s->iomem_redist[i]);
         g_free(name);
     }
diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c
index 8645220d61..544f4d82ff 100644
--- a/hw/intc/arm_gicv3_redist.c
+++ b/hw/intc/arm_gicv3_redist.c
@@ -14,6 +14,11 @@
 #include "trace.h"
 #include "gicv3_internal.h"
 
+int gicv3_redist_size(GICv3State *s)
+{
+    return (s->revision == 3 ? GICV3_REDIST_SIZE : GICV4_REDIST_SIZE);
+}
+
 static uint32_t mask_group(GICv3CPUState *cs, MemTxAttrs attrs)
 {
     /* Return a 32-bit mask which should be applied for this set of 32
@@ -429,8 +434,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data,
      * want to allow splitting of redistributor pages into several
      * blocks so we can support more CPUs.
      */
-    cpuidx = offset / 0x20000;
-    offset %= 0x20000;
+    cpuidx = offset / gicv3_redist_size(s);
+    offset %= gicv3_redist_size(s);
     assert(cpuidx < s->num_cpu);
 
     cs = &s->cpu[cpuidx];
@@ -486,8 +491,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data,
      * want to allow splitting of redistributor pages into several
      * blocks so we can support more CPUs.
      */
-    cpuidx = offset / 0x20000;
-    offset %= 0x20000;
+    cpuidx = offset / gicv3_redist_size(s);
+    offset %= gicv3_redist_size(s);
     assert(cpuidx < s->num_cpu);
 
     cs = &s->cpu[cpuidx];
diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h
index 91491a2f66..ab88d14867 100644
--- a/include/hw/intc/arm_gicv3_common.h
+++ b/include/hw/intc/arm_gicv3_common.h
@@ -37,6 +37,7 @@
 #define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL)
 
 #define GICV3_REDIST_SIZE 0x20000
+#define GICV4_REDIST_SIZE (GICV3_REDIST_SIZE + 0x20000)
 
 /* Number of SGI target-list bits */
 #define GICV3_TARGETLIST_BITS 16
@@ -295,4 +296,6 @@ struct ARMGICv3CommonClass {
 void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler,
                               const MemoryRegionOps *ops, Error **errp);
 
+int gicv3_redist_size(GICv3State *s);
+
 #endif
-- 
2.20.1



  parent reply	other threads:[~2021-01-24  2:57 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-24  2:53 [RFC PATCH 0/4] hw/intc: enable GICv4 memory layout for GICv3 driver Leif Lindholm
2021-01-24  2:53 ` [RFC PATCH 1/4] hw/intc: don't bail out gicv3 model init for revision 4 Leif Lindholm
2021-02-02 10:34   ` Peter Maydell
2021-01-24  2:53 ` Leif Lindholm [this message]
2021-02-02 10:27   ` [RFC PATCH 2/4] hw/intc: add helper function to determine gicv3 redistributor size Peter Maydell
2021-01-24  2:53 ` [RFC PATCH 3/4] hw/intc: set GICD_TYPER.DVIS for GICv4 Leif Lindholm
2021-02-02 10:34   ` Peter Maydell
2021-01-24  2:53 ` [RFC PATCH 4/4] hw/intc: make gicv3_idreg() distinguish between gicv3/gicv4 Leif Lindholm
2021-02-02 10:31   ` Peter Maydell
2021-02-03 11:36     ` Leif Lindholm
2021-01-24  3:00 ` [RFC PATCH 0/4] hw/intc: enable GICv4 memory layout for GICv3 driver no-reply
2021-02-02 10:39 ` Peter Maydell
2021-02-03 12:26   ` Leif Lindholm

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