[RFC PATCH 3/4] hw/intc: set GICD_TYPER.DVIS for GICv4

From: Leif Lindholm <leif@nuviainc.com>
To: qemu-arm@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Shashi Mallela <shashi.mallela@linaro.org>,
	qemu-devel@nongnu.org
Subject: [RFC PATCH 3/4] hw/intc: set GICD_TYPER.DVIS for GICv4
Date: Sun, 24 Jan 2021 02:53:05 +0000	[thread overview]
Message-ID: <20210124025306.3949-4-leif@nuviainc.com> (raw)
In-Reply-To: <20210124025306.3949-1-leif@nuviainc.com>

The VLPI frames are what make the redistributor size change, so ensure
we state in GICD_TYPER that we have them.

Signed-off-by: Leif Lindholm <leif@nuviainc.com>
---
 hw/intc/arm_gicv3_dist.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c
index b65f56f903..833deb0a74 100644
--- a/hw/intc/arm_gicv3_dist.c
+++ b/hw/intc/arm_gicv3_dist.c
@@ -387,6 +387,9 @@ static MemTxResult gicd_readl(GICv3State *s, hwaddr offset,
 
         *data = (1 << 25) | (1 << 24) | (sec_extn << 10) |
             (0xf << 19) | itlinesnumber;
+        if (s->revision == 4) {
+            *data |= (1 << 18);;
+        }
         return MEMTX_OK;
     }
     case GICD_IIDR:
-- 
2.20.1


