* [PATCH 1/3] advsync: Fix duplicate bibliography reference
@ 2021-02-07 15:22 Akira Yokosawa
2021-02-07 15:24 ` [PATCH 2/3] bib: Update missing/broken links in RCU.bib and hw.bib Akira Yokosawa
2021-02-07 15:27 ` [PATCH 3/3] memorder: Substitute MIPS memory model reference Akira Yokosawa
0 siblings, 2 replies; 4+ messages in thread
From: Akira Yokosawa @ 2021-02-07 15:22 UTC (permalink / raw)
To: Paul E. McKenney; +Cc: perfbook, Akira Yokosawa
Herlihy90 and MauriceHerlihy90a are the same paper.
Use the latter to avoid duplicate entries in Bibliography.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
advsync/advsync.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/advsync/advsync.tex b/advsync/advsync.tex
index bfd3737d..6f0dbe35 100644
--- a/advsync/advsync.tex
+++ b/advsync/advsync.tex
@@ -86,7 +86,7 @@ which is described in the following section.
it's supposed to do.}
{\emph{Robert A. Heinlein}}
-The term \emph{non-blocking synchronization} (NBS)~\cite{Herlihy90}
+The term \emph{non-blocking synchronization} (NBS)~\cite{MauriceHerlihy90a}
describes seven classes of linearizable algorithms with differing
\emph{forward-progress guarantees}~\cite{DanAlitarh2013PracticalProgress},
which are as follows:
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/3] bib: Update missing/broken links in RCU.bib and hw.bib
2021-02-07 15:22 [PATCH 1/3] advsync: Fix duplicate bibliography reference Akira Yokosawa
@ 2021-02-07 15:24 ` Akira Yokosawa
2021-02-07 15:27 ` [PATCH 3/3] memorder: Substitute MIPS memory model reference Akira Yokosawa
1 sibling, 0 replies; 4+ messages in thread
From: Akira Yokosawa @ 2021-02-07 15:24 UTC (permalink / raw)
To: Paul E. McKenney; +Cc: perfbook, Akira Yokosawa
Add "doi" info to AlexeyGotsman2013ESOPRCU in RCU.bib.
URL of Intelx86MemoryOrdering2007 is now broken.
URLs of imgtec.com in MIPSvII-A-20xx are now broken.
Add MIPSvII-A-2016 with the link to www.mips.com's landing page.
Actual PDF is now on an AWS site.
Annotate a couple of broken URLs with \nolinkurl{}.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
bib/RCU.bib | 6 ++++--
bib/hw.bib | 22 ++++++++++++++++------
2 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/bib/RCU.bib b/bib/RCU.bib
index 13c1fcdc..8005f2bd 100644
--- a/bib/RCU.bib
+++ b/bib/RCU.bib
@@ -2087,8 +2087,10 @@ lot of {Linux} into your technology!!!",
booktitle = {ESOP'13: European Symposium on Programming},
year = {2013},
pages = {249--269},
- publisher = {Springer},
- address = {Rome, Italy},
+ doi = {10.1007/978-3-642-37036-6_15},
+ publisher = {Springer-Verlag},
+ address = {Berlin, Heidelberg},
+ location = {Rome, Italy},
}
@unpublished{PaulEMcKenney2013NoTinyPreempt,
diff --git a/bib/hw.bib b/bib/hw.bib
index 297e1e51..a1833cf9 100644
--- a/bib/hw.bib
+++ b/bib/hw.bib
@@ -502,7 +502,17 @@ Set Reference Manual",
organization="{Imagination Technologies, LTD.}",
year="2015",
number="MD00087 Rev. 6.04",
- note={\url{https://imgtec.com/?do-download=4302}},
+ note={URL: \nolinkurl{https://imgtec.com/?do-download=4302} [Broken: January 2021]},
+}
+
+@manual{MIPSvII-A-2016,
+ title="{MIPS}\textregistered Architecture For Programmers
+Volume II-A: The {MIPS64}\textregistered Instruction
+Set Reference Manual",
+ organization="{Wave Computing, Inc.}",
+ year="2016",
+ number="MD00087 Rev. 6.06",
+ note={URL: \url{https://www.mips.com/downloads/the-mips64-instruction-set-v6-06/}},
}
@manual{MIPSvII-A-2017,
@@ -512,7 +522,7 @@ Set Reference Manual",
organization="{Imagination Technologies, LTD.}",
year="2017",
number="MD00087 Rev. 6.05",
- note={\url{https://imgtec.com/?do-download=4302}},
+ note={URL: \nolinkurl{https://imgtec.com/?do-download=4302} [Broken: January 2021]},
}
@unpublished{LinusTorvalds2006LockingPatchQuality,
@@ -529,9 +539,9 @@ Set Reference Manual",
organization="{Intel Corporation}",
year="2007",
number="318147-001",
- note="Available:
-\url{http://developer.intel.com/products/processor/manuals/318147.pdf}
-[Viewed: September 7, 2007]",
+ note="URL:
+\nolinkurl{http://developer.intel.com/products/processor/manuals/318147.pdf}
+[Broken: January 2021]",
}
@manual{Intel64IA32v3A2009,
@@ -787,7 +797,7 @@ on Computer Architecture",
Volume="52",
Number="6",
note="URL:
-\url{http://www.research.ibm.com/journal/rd52-6.html}
+\nolinkurl{http://www.research.ibm.com/journal/rd52-6.html}
[Link to each article is broken as of November 2016; Available via
\url{http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=5388557}]",
lastchecked="November 13, 2016",
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 3/3] memorder: Substitute MIPS memory model reference
2021-02-07 15:22 [PATCH 1/3] advsync: Fix duplicate bibliography reference Akira Yokosawa
2021-02-07 15:24 ` [PATCH 2/3] bib: Update missing/broken links in RCU.bib and hw.bib Akira Yokosawa
@ 2021-02-07 15:27 ` Akira Yokosawa
2021-02-07 23:14 ` Paul E. McKenney
1 sibling, 1 reply; 4+ messages in thread
From: Akira Yokosawa @ 2021-02-07 15:27 UTC (permalink / raw)
To: Paul E. McKenney; +Cc: perfbook, Akira Yokosawa
Use an bib entry with live URL.
Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
---
memorder/memorder.tex | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/memorder/memorder.tex b/memorder/memorder.tex
index c9c35b5b..362bff16 100644
--- a/memorder/memorder.tex
+++ b/memorder/memorder.tex
@@ -4452,7 +4452,7 @@ CPU, including those to the same variable.
\subsection{MIPS}
-The MIPS memory model~\cite[page~479]{MIPSvII-A-2017}
+The MIPS memory model~\cite[page~479]{MIPSvII-A-2016}
appears to resemble that of \ARM, Itanium, and \Power{},
being weakly ordered by default, but respecting dependencies.
MIPS has a wide variety of memory-barrier instructions, but ties them
--
2.17.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 3/3] memorder: Substitute MIPS memory model reference
2021-02-07 15:27 ` [PATCH 3/3] memorder: Substitute MIPS memory model reference Akira Yokosawa
@ 2021-02-07 23:14 ` Paul E. McKenney
0 siblings, 0 replies; 4+ messages in thread
From: Paul E. McKenney @ 2021-02-07 23:14 UTC (permalink / raw)
To: Akira Yokosawa; +Cc: perfbook
On Mon, Feb 08, 2021 at 12:27:09AM +0900, Akira Yokosawa wrote:
> Use an bib entry with live URL.
>
> Signed-off-by: Akira Yokosawa <akiyks@gmail.com>
Applied all three, good eyes, thank you!
Thanx, Paul
> ---
> memorder/memorder.tex | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/memorder/memorder.tex b/memorder/memorder.tex
> index c9c35b5b..362bff16 100644
> --- a/memorder/memorder.tex
> +++ b/memorder/memorder.tex
> @@ -4452,7 +4452,7 @@ CPU, including those to the same variable.
>
> \subsection{MIPS}
>
> -The MIPS memory model~\cite[page~479]{MIPSvII-A-2017}
> +The MIPS memory model~\cite[page~479]{MIPSvII-A-2016}
> appears to resemble that of \ARM, Itanium, and \Power{},
> being weakly ordered by default, but respecting dependencies.
> MIPS has a wide variety of memory-barrier instructions, but ties them
> --
> 2.17.1
>
>
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2021-02-07 15:22 [PATCH 1/3] advsync: Fix duplicate bibliography reference Akira Yokosawa
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2021-02-07 15:27 ` [PATCH 3/3] memorder: Substitute MIPS memory model reference Akira Yokosawa
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