* [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver
@ 2021-03-04 6:05 Shawn Guo
2021-03-04 6:05 ` [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Shawn Guo
` (2 more replies)
0 siblings, 3 replies; 11+ messages in thread
From: Shawn Guo @ 2021-03-04 6:05 UTC (permalink / raw)
To: Linus Walleij
Cc: Bjorn Andersson, Andy Shevchenko, linux-gpio, linux-arm-msm, Shawn Guo
This is a couple of patches that enable ACPI probe for SC8180X pinctrl
driver. It takes pinctrl-sdm845 driver as the example to remove the
use of tiles, so that we can align memory resource description between
DT and ACPI, and simpfy the driver code.
Changes for v3:
- Remove the use of tiles.
- Drop unneed include of <linux/acpi.h>.
Changes for v2:
- Pass soc_data pointer via .driver_data.
- Drop use of CONFIG_ACPI and ACPI_PTR().
- Add comment for sc8180x_acpi_reserved_gpios[] terminator.
- Add comments for tiles handling.
Shawn Guo (2):
pinctrl: qcom: sc8180x: drop the use of tiles
pinctrl: qcom: sc8180x: add ACPI probe support
drivers/pinctrl/qcom/Kconfig | 2 +-
drivers/pinctrl/qcom/pinctrl-sc8180x.c | 80 ++++++++++++++++----------
2 files changed, 52 insertions(+), 30 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles 2021-03-04 6:05 [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Shawn Guo @ 2021-03-04 6:05 ` Shawn Guo 2021-03-09 1:08 ` Bjorn Andersson 2021-03-04 6:05 ` [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support Shawn Guo 2021-03-04 12:44 ` [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Andy Shevchenko 2 siblings, 1 reply; 11+ messages in thread From: Shawn Guo @ 2021-03-04 6:05 UTC (permalink / raw) To: Linus Walleij Cc: Bjorn Andersson, Andy Shevchenko, linux-gpio, linux-arm-msm, Shawn Guo To support both ACPI and DT, it makes more sense to not use tiles for pinctrl-sc8180x driver, as ACPI table describes TLMM block with one single memory resource. Since DTS of SC8180X hasn't landed, there is still chance to align DT description with ACPI. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- drivers/pinctrl/qcom/pinctrl-sc8180x.c | 41 +++++++++----------------- 1 file changed, 14 insertions(+), 27 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c index b765bf667574..66f76ed22200 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c +++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c @@ -11,17 +11,9 @@ #include "pinctrl-msm.h" -static const char * const sc8180x_tiles[] = { - "south", - "east", - "west" -}; - -enum { - SOUTH, - EAST, - WEST -}; +#define WEST 0x00100000 +#define EAST 0x00500000 +#define SOUTH 0x00d00000 #define FUNCTION(fname) \ [msm_mux_##fname] = { \ @@ -31,7 +23,7 @@ enum { } #define REG_SIZE 0x1000 -#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ +#define PINGROUP_OFFSET(id, base, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ { \ .name = "gpio" #id, \ .pins = gpio##id##_pins, \ @@ -49,12 +41,11 @@ enum { msm_mux_##f9 \ }, \ .nfuncs = 10, \ - .ctl_reg = REG_SIZE * id + offset, \ - .io_reg = REG_SIZE * id + 0x4 + offset, \ - .intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \ - .intr_status_reg = REG_SIZE * id + 0xc + offset,\ - .intr_target_reg = REG_SIZE * id + 0x8 + offset,\ - .tile = _tile, \ + .ctl_reg = base + REG_SIZE * id + offset, \ + .io_reg = base + REG_SIZE * id + 0x4 + offset, \ + .intr_cfg_reg = base + REG_SIZE * id + 0x8 + offset, \ + .intr_status_reg = base + REG_SIZE * id + 0xc + offset, \ + .intr_target_reg = base + REG_SIZE * id + 0x8 + offset, \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ @@ -71,20 +62,19 @@ enum { .intr_detection_width = 2, \ } -#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ - PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9) +#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ + PINGROUP_OFFSET(id, base, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9) #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ { \ .name = #pg_name, \ .pins = pg_name##_pins, \ .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ - .ctl_reg = ctl, \ + .ctl_reg = EAST + ctl, \ .io_reg = 0, \ .intr_cfg_reg = 0, \ .intr_status_reg = 0, \ .intr_target_reg = 0, \ - .tile = EAST, \ .mux_bit = -1, \ .pull_bit = pull, \ .drv_bit = drv, \ @@ -105,12 +95,11 @@ enum { .name = #pg_name, \ .pins = pg_name##_pins, \ .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ - .ctl_reg = 0xb6000, \ - .io_reg = 0xb6004, \ + .ctl_reg = SOUTH + 0xb6000, \ + .io_reg = SOUTH + 0xb6004, \ .intr_cfg_reg = 0, \ .intr_status_reg = 0, \ .intr_target_reg = 0, \ - .tile = SOUTH, \ .mux_bit = -1, \ .pull_bit = 3, \ .drv_bit = 0, \ @@ -1575,8 +1564,6 @@ static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = { }; static struct msm_pinctrl_soc_data sc8180x_pinctrl = { - .tiles = sc8180x_tiles, - .ntiles = ARRAY_SIZE(sc8180x_tiles), .pins = sc8180x_pins, .npins = ARRAY_SIZE(sc8180x_pins), .functions = sc8180x_functions, -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles 2021-03-04 6:05 ` [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Shawn Guo @ 2021-03-09 1:08 ` Bjorn Andersson 2021-03-09 2:56 ` Shawn Guo 0 siblings, 1 reply; 11+ messages in thread From: Bjorn Andersson @ 2021-03-09 1:08 UTC (permalink / raw) To: Shawn Guo; +Cc: Linus Walleij, Andy Shevchenko, linux-gpio, linux-arm-msm On Thu 04 Mar 00:05 CST 2021, Shawn Guo wrote: > To support both ACPI and DT, it makes more sense to not use tiles for > pinctrl-sc8180x driver, as ACPI table describes TLMM block with one > single memory resource. Since DTS of SC8180X hasn't landed, there is > still chance to align DT description with ACPI. > I don't like the idea that we make up addresses to put in the DT to fit what was put in the DSDT. It is 3 different memory regions, with things in-between that Linux shouldn't touch. Isn't it possible to during ACPI probe take reg 0 and register the 3 named regions instead? Regards, Bjorn > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > --- > drivers/pinctrl/qcom/pinctrl-sc8180x.c | 41 +++++++++----------------- > 1 file changed, 14 insertions(+), 27 deletions(-) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c > index b765bf667574..66f76ed22200 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c > @@ -11,17 +11,9 @@ > > #include "pinctrl-msm.h" > > -static const char * const sc8180x_tiles[] = { > - "south", > - "east", > - "west" > -}; > - > -enum { > - SOUTH, > - EAST, > - WEST > -}; > +#define WEST 0x00100000 > +#define EAST 0x00500000 > +#define SOUTH 0x00d00000 > > #define FUNCTION(fname) \ > [msm_mux_##fname] = { \ > @@ -31,7 +23,7 @@ enum { > } > > #define REG_SIZE 0x1000 > -#define PINGROUP_OFFSET(id, _tile, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ > +#define PINGROUP_OFFSET(id, base, offset, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ > { \ > .name = "gpio" #id, \ > .pins = gpio##id##_pins, \ > @@ -49,12 +41,11 @@ enum { > msm_mux_##f9 \ > }, \ > .nfuncs = 10, \ > - .ctl_reg = REG_SIZE * id + offset, \ > - .io_reg = REG_SIZE * id + 0x4 + offset, \ > - .intr_cfg_reg = REG_SIZE * id + 0x8 + offset, \ > - .intr_status_reg = REG_SIZE * id + 0xc + offset,\ > - .intr_target_reg = REG_SIZE * id + 0x8 + offset,\ > - .tile = _tile, \ > + .ctl_reg = base + REG_SIZE * id + offset, \ > + .io_reg = base + REG_SIZE * id + 0x4 + offset, \ > + .intr_cfg_reg = base + REG_SIZE * id + 0x8 + offset, \ > + .intr_status_reg = base + REG_SIZE * id + 0xc + offset, \ > + .intr_target_reg = base + REG_SIZE * id + 0x8 + offset, \ > .mux_bit = 2, \ > .pull_bit = 0, \ > .drv_bit = 6, \ > @@ -71,20 +62,19 @@ enum { > .intr_detection_width = 2, \ > } > > -#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ > - PINGROUP_OFFSET(id, _tile, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9) > +#define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ > + PINGROUP_OFFSET(id, base, 0x0, f1, f2, f3, f4, f5, f6, f7, f8, f9) > > #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ > { \ > .name = #pg_name, \ > .pins = pg_name##_pins, \ > .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ > - .ctl_reg = ctl, \ > + .ctl_reg = EAST + ctl, \ > .io_reg = 0, \ > .intr_cfg_reg = 0, \ > .intr_status_reg = 0, \ > .intr_target_reg = 0, \ > - .tile = EAST, \ > .mux_bit = -1, \ > .pull_bit = pull, \ > .drv_bit = drv, \ > @@ -105,12 +95,11 @@ enum { > .name = #pg_name, \ > .pins = pg_name##_pins, \ > .npins = (unsigned int)ARRAY_SIZE(pg_name##_pins), \ > - .ctl_reg = 0xb6000, \ > - .io_reg = 0xb6004, \ > + .ctl_reg = SOUTH + 0xb6000, \ > + .io_reg = SOUTH + 0xb6004, \ > .intr_cfg_reg = 0, \ > .intr_status_reg = 0, \ > .intr_target_reg = 0, \ > - .tile = SOUTH, \ > .mux_bit = -1, \ > .pull_bit = 3, \ > .drv_bit = 0, \ > @@ -1575,8 +1564,6 @@ static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = { > }; > > static struct msm_pinctrl_soc_data sc8180x_pinctrl = { > - .tiles = sc8180x_tiles, > - .ntiles = ARRAY_SIZE(sc8180x_tiles), > .pins = sc8180x_pins, > .npins = ARRAY_SIZE(sc8180x_pins), > .functions = sc8180x_functions, > -- > 2.17.1 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles 2021-03-09 1:08 ` Bjorn Andersson @ 2021-03-09 2:56 ` Shawn Guo 2021-03-09 3:42 ` Bjorn Andersson 0 siblings, 1 reply; 11+ messages in thread From: Shawn Guo @ 2021-03-09 2:56 UTC (permalink / raw) To: Bjorn Andersson; +Cc: Linus Walleij, Andy Shevchenko, linux-gpio, linux-arm-msm On Mon, Mar 08, 2021 at 07:08:00PM -0600, Bjorn Andersson wrote: > On Thu 04 Mar 00:05 CST 2021, Shawn Guo wrote: > > > To support both ACPI and DT, it makes more sense to not use tiles for > > pinctrl-sc8180x driver, as ACPI table describes TLMM block with one > > single memory resource. Since DTS of SC8180X hasn't landed, there is > > still chance to align DT description with ACPI. > > > > I don't like the idea that we make up addresses to put in the DT to fit > what was put in the DSDT. It is 3 different memory regions, with things > in-between that Linux shouldn't touch. This is not a new idea but something pinctrl-sdm845 has been doing for years. And IMHO, it's not a bad idea but a reasonable compromise. > Isn't it possible to during ACPI probe take reg 0 and register the 3 > named regions instead? It is possible. But let's see what it takes. We will need to have some quirk handling in the ACPI core to detect TLMM device on Flex 5G machine, and then override the memory resource registration for that device. Myself is not even convinced this is a good solution, not mentioning whether ACPI maintainers will accept it. Shawn ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles 2021-03-09 2:56 ` Shawn Guo @ 2021-03-09 3:42 ` Bjorn Andersson 2021-03-10 10:37 ` Shawn Guo 0 siblings, 1 reply; 11+ messages in thread From: Bjorn Andersson @ 2021-03-09 3:42 UTC (permalink / raw) To: Shawn Guo; +Cc: Linus Walleij, Andy Shevchenko, linux-gpio, linux-arm-msm On Mon 08 Mar 20:56 CST 2021, Shawn Guo wrote: > On Mon, Mar 08, 2021 at 07:08:00PM -0600, Bjorn Andersson wrote: > > On Thu 04 Mar 00:05 CST 2021, Shawn Guo wrote: > > > > > To support both ACPI and DT, it makes more sense to not use tiles for > > > pinctrl-sc8180x driver, as ACPI table describes TLMM block with one > > > single memory resource. Since DTS of SC8180X hasn't landed, there is > > > still chance to align DT description with ACPI. > > > > > > > I don't like the idea that we make up addresses to put in the DT to fit > > what was put in the DSDT. It is 3 different memory regions, with things > > in-between that Linux shouldn't touch. > > This is not a new idea but something pinctrl-sdm845 has been doing for > years. And IMHO, it's not a bad idea but a reasonable compromise. > SDM845 was the first platform where the previous contiguous TLMM block was split up in tiles, at the time we didn't see a need to split it up. But then we hit QCS404 (iirc) where one of the tiles was way off and concluded that we needed the DT binding to actually represent the hardware - so the tiles concept was introduced. Unfortunately introducing the tiles back into sdm845 would cause issues with existing DT, so that has not happened. > > Isn't it possible to during ACPI probe take reg 0 and register the 3 > > named regions instead? > > It is possible. But let's see what it takes. We will need to have some > quirk handling in the ACPI core to detect TLMM device on Flex 5G > machine, and then override the memory resource registration for that > device. Myself is not even convinced this is a good solution, not > mentioning whether ACPI maintainers will accept it. > I don't think this quirk should belong in the core. Can't you massage the resources once you're in the probe function in pinctrl-sc8180x.c? Or the platform resources can't be modified when we reach that point? Regards, Bjorn ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles 2021-03-09 3:42 ` Bjorn Andersson @ 2021-03-10 10:37 ` Shawn Guo 0 siblings, 0 replies; 11+ messages in thread From: Shawn Guo @ 2021-03-10 10:37 UTC (permalink / raw) To: Bjorn Andersson; +Cc: Linus Walleij, Andy Shevchenko, linux-gpio, linux-arm-msm On Mon, Mar 08, 2021 at 09:42:43PM -0600, Bjorn Andersson wrote: > On Mon 08 Mar 20:56 CST 2021, Shawn Guo wrote: > > > On Mon, Mar 08, 2021 at 07:08:00PM -0600, Bjorn Andersson wrote: > > > On Thu 04 Mar 00:05 CST 2021, Shawn Guo wrote: > > > > > > > To support both ACPI and DT, it makes more sense to not use tiles for > > > > pinctrl-sc8180x driver, as ACPI table describes TLMM block with one > > > > single memory resource. Since DTS of SC8180X hasn't landed, there is > > > > still chance to align DT description with ACPI. > > > > > > > > > > I don't like the idea that we make up addresses to put in the DT to fit > > > what was put in the DSDT. It is 3 different memory regions, with things > > > in-between that Linux shouldn't touch. > > > > This is not a new idea but something pinctrl-sdm845 has been doing for > > years. And IMHO, it's not a bad idea but a reasonable compromise. > > > > SDM845 was the first platform where the previous contiguous TLMM block > was split up in tiles, at the time we didn't see a need to split it up. > > But then we hit QCS404 (iirc) where one of the tiles was way off and > concluded that we needed the DT binding to actually represent the > hardware - so the tiles concept was introduced. > > Unfortunately introducing the tiles back into sdm845 would cause issues > with existing DT, so that has not happened. > > > > Isn't it possible to during ACPI probe take reg 0 and register the 3 > > > named regions instead? > > > > It is possible. But let's see what it takes. We will need to have some > > quirk handling in the ACPI core to detect TLMM device on Flex 5G > > machine, and then override the memory resource registration for that > > device. Myself is not even convinced this is a good solution, not > > mentioning whether ACPI maintainers will accept it. > > > > I don't think this quirk should belong in the core. Can't you massage > the resources once you're in the probe function in pinctrl-sc8180x.c? Or > the platform resources can't be modified when we reach that point? Okay, I misread your comment. Yes, we can massage the resources, but it's a bit tricky. It took me hours get it right. Anyway, I will send it out for review. Hopefully we can agree on one solution out of three I have worked out. Shawn ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support 2021-03-04 6:05 [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Shawn Guo 2021-03-04 6:05 ` [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Shawn Guo @ 2021-03-04 6:05 ` Shawn Guo 2021-03-04 12:44 ` Andy Shevchenko 2021-03-07 11:54 ` Konrad Dybcio 2021-03-04 12:44 ` [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Andy Shevchenko 2 siblings, 2 replies; 11+ messages in thread From: Shawn Guo @ 2021-03-04 6:05 UTC (permalink / raw) To: Linus Walleij Cc: Bjorn Andersson, Andy Shevchenko, linux-gpio, linux-arm-msm, Shawn Guo It adds ACPI probe support for pinctrl-sc8180x driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> --- drivers/pinctrl/qcom/Kconfig | 2 +- drivers/pinctrl/qcom/pinctrl-sc8180x.c | 39 ++++++++++++++++++++++++-- 2 files changed, 38 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 6853a896c476..9f0218c4f9b3 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -222,7 +222,7 @@ config PINCTRL_SC7280 config PINCTRL_SC8180X tristate "Qualcomm Technologies Inc SC8180x pin controller driver" - depends on GPIOLIB && OF + depends on GPIOLIB && (OF || ACPI) select PINCTRL_MSM help This is the pinctrl, pinmux, pinconf and gpiolib driver for the diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c index 66f76ed22200..45ecb4a022ca 100644 --- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c +++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c @@ -1546,6 +1546,13 @@ static const struct msm_pingroup sc8180x_groups[] = { [193] = SDC_QDSD_PINGROUP(sdc2_data, 0x4b2000, 9, 0), }; +static const int sc8180x_acpi_reserved_gpios[] = { + 0, 1, 2, 3, + 47, 48, 49, 50, + 126, 127, 128, 129, + -1 /* terminator */ +}; + static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = { { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 }, { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 }, @@ -1575,13 +1582,40 @@ static struct msm_pinctrl_soc_data sc8180x_pinctrl = { .nwakeirq_map = ARRAY_SIZE(sc8180x_pdc_map), }; +static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = { + .pins = sc8180x_pins, + .npins = ARRAY_SIZE(sc8180x_pins), + .groups = sc8180x_groups, + .ngroups = ARRAY_SIZE(sc8180x_groups), + .reserved_gpios = sc8180x_acpi_reserved_gpios, + .ngpios = 191, +}; + static int sc8180x_pinctrl_probe(struct platform_device *pdev) { - return msm_pinctrl_probe(pdev, &sc8180x_pinctrl); + const struct msm_pinctrl_soc_data *soc_data; + + soc_data = device_get_match_data(&pdev->dev); + if (!soc_data) + return -EINVAL; + + return msm_pinctrl_probe(pdev, soc_data); } +static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] = { + { + .id = "QCOM040D", + .driver_data = (kernel_ulong_t) &sc8180x_acpi_pinctrl, + }, + { } +}; +MODULE_DEVICE_TABLE(acpi, sc8180x_pinctrl_acpi_match); + static const struct of_device_id sc8180x_pinctrl_of_match[] = { - { .compatible = "qcom,sc8180x-tlmm", }, + { + .compatible = "qcom,sc8180x-tlmm", + .data = &sc8180x_pinctrl, + }, { }, }; MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match); @@ -1590,6 +1624,7 @@ static struct platform_driver sc8180x_pinctrl_driver = { .driver = { .name = "sc8180x-pinctrl", .of_match_table = sc8180x_pinctrl_of_match, + .acpi_match_table = sc8180x_pinctrl_acpi_match, }, .probe = sc8180x_pinctrl_probe, .remove = msm_pinctrl_remove, -- 2.17.1 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support 2021-03-04 6:05 ` [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support Shawn Guo @ 2021-03-04 12:44 ` Andy Shevchenko 2021-03-07 11:54 ` Konrad Dybcio 1 sibling, 0 replies; 11+ messages in thread From: Andy Shevchenko @ 2021-03-04 12:44 UTC (permalink / raw) To: Shawn Guo; +Cc: Linus Walleij, Bjorn Andersson, linux-gpio, linux-arm-msm On Thu, Mar 04, 2021 at 02:05:20PM +0800, Shawn Guo wrote: > It adds ACPI probe support for pinctrl-sc8180x driver. > > Signed-off-by: Shawn Guo <shawn.guo@linaro.org> > --- > drivers/pinctrl/qcom/Kconfig | 2 +- > drivers/pinctrl/qcom/pinctrl-sc8180x.c | 39 ++++++++++++++++++++++++-- > 2 files changed, 38 insertions(+), 3 deletions(-) > > diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig > index 6853a896c476..9f0218c4f9b3 100644 > --- a/drivers/pinctrl/qcom/Kconfig > +++ b/drivers/pinctrl/qcom/Kconfig > @@ -222,7 +222,7 @@ config PINCTRL_SC7280 > > config PINCTRL_SC8180X > tristate "Qualcomm Technologies Inc SC8180x pin controller driver" > - depends on GPIOLIB && OF > + depends on GPIOLIB && (OF || ACPI) > select PINCTRL_MSM > help > This is the pinctrl, pinmux, pinconf and gpiolib driver for the > diff --git a/drivers/pinctrl/qcom/pinctrl-sc8180x.c b/drivers/pinctrl/qcom/pinctrl-sc8180x.c > index 66f76ed22200..45ecb4a022ca 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sc8180x.c > +++ b/drivers/pinctrl/qcom/pinctrl-sc8180x.c > @@ -1546,6 +1546,13 @@ static const struct msm_pingroup sc8180x_groups[] = { > [193] = SDC_QDSD_PINGROUP(sdc2_data, 0x4b2000, 9, 0), > }; > > +static const int sc8180x_acpi_reserved_gpios[] = { > + 0, 1, 2, 3, > + 47, 48, 49, 50, > + 126, 127, 128, 129, > + -1 /* terminator */ > +}; Wondering if this is converted to valid_mask at some point? > static const struct msm_gpio_wakeirq_map sc8180x_pdc_map[] = { > { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, { 12, 104 }, > { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, { 30, 39 }, { 36, 43 }, > @@ -1575,13 +1582,40 @@ static struct msm_pinctrl_soc_data sc8180x_pinctrl = { > .nwakeirq_map = ARRAY_SIZE(sc8180x_pdc_map), > }; > > +static const struct msm_pinctrl_soc_data sc8180x_acpi_pinctrl = { > + .pins = sc8180x_pins, > + .npins = ARRAY_SIZE(sc8180x_pins), > + .groups = sc8180x_groups, > + .ngroups = ARRAY_SIZE(sc8180x_groups), > + .reserved_gpios = sc8180x_acpi_reserved_gpios, > + .ngpios = 191, > +}; > + > static int sc8180x_pinctrl_probe(struct platform_device *pdev) > { > - return msm_pinctrl_probe(pdev, &sc8180x_pinctrl); > + const struct msm_pinctrl_soc_data *soc_data; > + > + soc_data = device_get_match_data(&pdev->dev); #include <linux/property.h> > + if (!soc_data) > + return -EINVAL; > + > + return msm_pinctrl_probe(pdev, soc_data); > } > > +static const struct acpi_device_id sc8180x_pinctrl_acpi_match[] = { #include <linux/mod_devicetable.h> > + { > + .id = "QCOM040D", > + .driver_data = (kernel_ulong_t) &sc8180x_acpi_pinctrl, > + }, > + { } > +}; > +MODULE_DEVICE_TABLE(acpi, sc8180x_pinctrl_acpi_match); > + > static const struct of_device_id sc8180x_pinctrl_of_match[] = { > - { .compatible = "qcom,sc8180x-tlmm", }, > + { > + .compatible = "qcom,sc8180x-tlmm", > + .data = &sc8180x_pinctrl, > + }, > { }, > }; > MODULE_DEVICE_TABLE(of, sc8180x_pinctrl_of_match); > @@ -1590,6 +1624,7 @@ static struct platform_driver sc8180x_pinctrl_driver = { > .driver = { > .name = "sc8180x-pinctrl", > .of_match_table = sc8180x_pinctrl_of_match, > + .acpi_match_table = sc8180x_pinctrl_acpi_match, > }, > .probe = sc8180x_pinctrl_probe, > .remove = msm_pinctrl_remove, > -- > 2.17.1 > -- With Best Regards, Andy Shevchenko ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support 2021-03-04 6:05 ` [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support Shawn Guo 2021-03-04 12:44 ` Andy Shevchenko @ 2021-03-07 11:54 ` Konrad Dybcio 2021-03-08 23:42 ` Bjorn Andersson 1 sibling, 1 reply; 11+ messages in thread From: Konrad Dybcio @ 2021-03-07 11:54 UTC (permalink / raw) To: Shawn Guo, Linus Walleij Cc: Bjorn Andersson, Andy Shevchenko, linux-gpio, linux-arm-msm Hi, > > +static const int sc8180x_acpi_reserved_gpios[] = { > + 0, 1, 2, 3, > + 47, 48, 49, 50, > + 126, 127, 128, 129, > + -1 /* terminator */ > +}; > + These can vary per device (unless Qualcomm is enforcing something on the SC platform), so I don't think hardcoding is a good option.. Isn't there any data being passed on which ones should not be touched? Konrad ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support 2021-03-07 11:54 ` Konrad Dybcio @ 2021-03-08 23:42 ` Bjorn Andersson 0 siblings, 0 replies; 11+ messages in thread From: Bjorn Andersson @ 2021-03-08 23:42 UTC (permalink / raw) To: Konrad Dybcio Cc: Shawn Guo, Linus Walleij, Andy Shevchenko, linux-gpio, linux-arm-msm On Sun 07 Mar 05:54 CST 2021, Konrad Dybcio wrote: > Hi, > > > > > +static const int sc8180x_acpi_reserved_gpios[] = { > > + 0, 1, 2, 3, > > + 47, 48, 49, 50, > > + 126, 127, 128, 129, > > + -1 /* terminator */ > > +}; > > + > These can vary per device (unless Qualcomm is enforcing something on > the SC platform), so I don't think hardcoding is a good option.. Isn't > there any data being passed on which ones should not be touched? > You're right, this is both ugly and error prone. But we looked at the same when we added support for the 845 laptops but where not able to find anything useful. On qdx2xxx the solution was to pass a list of GPIOs that should be exposed by the driver, and only those are made available, but nothing like this exist on the WoS devices. Regards, Bjorn ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver 2021-03-04 6:05 [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Shawn Guo 2021-03-04 6:05 ` [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Shawn Guo 2021-03-04 6:05 ` [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support Shawn Guo @ 2021-03-04 12:44 ` Andy Shevchenko 2 siblings, 0 replies; 11+ messages in thread From: Andy Shevchenko @ 2021-03-04 12:44 UTC (permalink / raw) To: Shawn Guo; +Cc: Linus Walleij, Bjorn Andersson, linux-gpio, linux-arm-msm On Thu, Mar 04, 2021 at 02:05:18PM +0800, Shawn Guo wrote: > This is a couple of patches that enable ACPI probe for SC8180X pinctrl > driver. It takes pinctrl-sdm845 driver as the example to remove the > use of tiles, so that we can align memory resource description between > DT and ACPI, and simpfy the driver code. Some minor comments, in any case, FWIW, Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Thanks! > Changes for v3: > - Remove the use of tiles. > - Drop unneed include of <linux/acpi.h>. > > Changes for v2: > - Pass soc_data pointer via .driver_data. > - Drop use of CONFIG_ACPI and ACPI_PTR(). > - Add comment for sc8180x_acpi_reserved_gpios[] terminator. > - Add comments for tiles handling. > > Shawn Guo (2): > pinctrl: qcom: sc8180x: drop the use of tiles > pinctrl: qcom: sc8180x: add ACPI probe support > > drivers/pinctrl/qcom/Kconfig | 2 +- > drivers/pinctrl/qcom/pinctrl-sc8180x.c | 80 ++++++++++++++++---------- > 2 files changed, 52 insertions(+), 30 deletions(-) > > -- > 2.17.1 > -- With Best Regards, Andy Shevchenko ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2021-03-10 10:38 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-03-04 6:05 [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Shawn Guo 2021-03-04 6:05 ` [PATCH v3 1/2] pinctrl: qcom: sc8180x: drop the use of tiles Shawn Guo 2021-03-09 1:08 ` Bjorn Andersson 2021-03-09 2:56 ` Shawn Guo 2021-03-09 3:42 ` Bjorn Andersson 2021-03-10 10:37 ` Shawn Guo 2021-03-04 6:05 ` [PATCH v3 2/2] pinctrl: qcom: sc8180x: add ACPI probe support Shawn Guo 2021-03-04 12:44 ` Andy Shevchenko 2021-03-07 11:54 ` Konrad Dybcio 2021-03-08 23:42 ` Bjorn Andersson 2021-03-04 12:44 ` [PATCH v3 0/2] Add ACPI support for SC8180X pinctrl driver Andy Shevchenko
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