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From: Emil Velikov <emil.l.velikov@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: emil.l.velikov@gmail.com
Subject: [PATCH v2 01/10] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
Date: Thu, 11 Mar 2021 15:40:46 +0000	[thread overview]
Message-ID: <20210311154055.3496076-2-emil.l.velikov@gmail.com> (raw)
In-Reply-To: <20210311154055.3496076-1-emil.l.velikov@gmail.com>

From: Emil Velikov <emil.velikov@collabora.com>

Use the register directly over the existing SWREG().

Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
 #include <media/v4l2-mem2mem.h>
 #include "hantro.h"
 #include "hantro_hw.h"
+#include "hantro_g1_regs.h"
 
 #define G1_SWREG(nr)			((nr) * 4)
 
@@ -20,7 +21,6 @@
 #define G1_REG_REFER2_BASE		G1_SWREG(16)
 #define G1_REG_REFER3_BASE		G1_SWREG(17)
 #define G1_REG_QTABLE_BASE		G1_SWREG(40)
-#define G1_REG_DEC_E(v)			((v) ? BIT(0) : 0)
 
 #define G1_REG_DEC_AXI_RD_ID(v)		(((v) << 24) & GENMASK(31, 24))
 #define G1_REG_DEC_TIMEOUT_E(v)		((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
 
 	hantro_end_prepare_run(ctx);
 
-	reg = G1_REG_DEC_E(1);
-	vdpu_write(vpu, reg, G1_SWREG(1));
+	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }
-- 
2.30.1


WARNING: multiple messages have this Message-ID (diff)
From: Emil Velikov <emil.l.velikov@gmail.com>
To: Ezequiel Garcia <ezequiel@collabora.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org,
	Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: emil.l.velikov@gmail.com
Subject: [PATCH v2 01/10] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2
Date: Thu, 11 Mar 2021 15:40:46 +0000	[thread overview]
Message-ID: <20210311154055.3496076-2-emil.l.velikov@gmail.com> (raw)
In-Reply-To: <20210311154055.3496076-1-emil.l.velikov@gmail.com>

From: Emil Velikov <emil.velikov@collabora.com>

Use the register directly over the existing SWREG().

Ideally we'll port the driver away from the local registers, but for
now this is enough. For context - I was reading through the IRQ register
handling across the variants.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
 drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
index 6386a3989bfe..0fd306806f16 100644
--- a/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
+++ b/drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c
@@ -10,6 +10,7 @@
 #include <media/v4l2-mem2mem.h>
 #include "hantro.h"
 #include "hantro_hw.h"
+#include "hantro_g1_regs.h"
 
 #define G1_SWREG(nr)			((nr) * 4)
 
@@ -20,7 +21,6 @@
 #define G1_REG_REFER2_BASE		G1_SWREG(16)
 #define G1_REG_REFER3_BASE		G1_SWREG(17)
 #define G1_REG_QTABLE_BASE		G1_SWREG(40)
-#define G1_REG_DEC_E(v)			((v) ? BIT(0) : 0)
 
 #define G1_REG_DEC_AXI_RD_ID(v)		(((v) << 24) & GENMASK(31, 24))
 #define G1_REG_DEC_TIMEOUT_E(v)		((v) ? BIT(23) : 0)
@@ -246,6 +246,5 @@ void hantro_g1_mpeg2_dec_run(struct hantro_ctx *ctx)
 
 	hantro_end_prepare_run(ctx);
 
-	reg = G1_REG_DEC_E(1);
-	vdpu_write(vpu, reg, G1_SWREG(1));
+	vdpu_write(vpu, G1_REG_INTERRUPT_DEC_E, G1_REG_INTERRUPT);
 }
-- 
2.30.1


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  reply	other threads:[~2021-03-11 15:41 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-11 15:40 [PATCH v2 00/10] Microship SAMA5D4 VPU support et al Emil Velikov
2021-03-11 15:40 ` Emil Velikov
2021-03-11 15:40 ` Emil Velikov [this message]
2021-03-11 15:40   ` [PATCH v2 01/10] media: hantro: use G1_REG_INTERRUPT directly for the mpeg2 Emil Velikov
2021-03-11 15:40 ` [PATCH v2 02/10] media: hantro: imx: reuse MB_DIM define Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 03/10] media: hantro: imx: remove duplicate dec_base init Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 04/10] media: hantro: imx: remove unused include Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 05/10] media: hantro: introduce hantro_g1.c for common API Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 06/10] media: dt-bindings: Document SAMA5D4 VDEC bindings Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-24 15:17   ` Rob Herring
2021-03-24 15:17     ` Rob Herring
2021-03-25 14:14     ` Emil Velikov
2021-03-25 14:14       ` Emil Velikov
2021-03-26 14:28       ` Ezequiel Garcia
2021-03-26 14:28         ` Ezequiel Garcia
2021-03-31 17:42         ` Emil Velikov
2021-03-31 17:42           ` Emil Velikov
2021-03-26 14:33     ` Ezequiel Garcia
2021-03-26 14:33       ` Ezequiel Garcia
2021-03-11 15:40 ` [PATCH v2 07/10] media: hantro: add initial SAMA5D4 support Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 08/10] ARM: dts: sama5d4: enable Hantro G1 VDEC Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 09/10] ARM: configs: at91: sama5: update with savedefconfig Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40 ` [PATCH v2 10/10] ARM: configs: at91: sama5: enable the Hantro G1 engine Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-11 15:40   ` Emil Velikov
2021-03-16 17:23 ` [PATCH v2 00/10] Microship SAMA5D4 VPU support et al Ezequiel Garcia
2021-03-16 17:23   ` Ezequiel Garcia
2021-03-24 12:49   ` Emil Velikov
2021-03-24 12:49     ` Emil Velikov
2021-03-24 13:44     ` Nicolas Ferre
2021-03-24 13:44       ` Nicolas Ferre
2021-03-25  8:48       ` Alexandre Belloni
2021-03-25  8:48         ` Alexandre Belloni
2021-03-25 14:22         ` Emil Velikov
2021-03-25 14:22           ` Emil Velikov
2021-03-29  9:53           ` Nicolas Ferre
2021-03-29  9:53             ` Nicolas Ferre
2021-03-31 17:36             ` Emil Velikov
2021-03-31 17:36               ` Emil Velikov
2021-03-25 15:50         ` Nicolas Ferre
2021-03-25 15:50           ` Nicolas Ferre
2021-03-24 19:58 ` Nicolas Dufresne
2021-03-24 19:58   ` Nicolas Dufresne

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