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From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v3 01/11] clk: Warn on failure to assign rate
Date: Thu,  8 Apr 2021 22:13:03 -0400	[thread overview]
Message-ID: <20210409021313.433558-2-seanga2@gmail.com> (raw)
In-Reply-To: <20210409021313.433558-1-seanga2@gmail.com>

If the user/dev explicitly requests a clock be assigned a certain rate,
then we should warn them if we can't do it. This makes it clear if the
clock is running at the default rate.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
---

Changes in v3:
- New

 drivers/clk/clk-uclass.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 4ab3c402ed..53e7be764d 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -14,6 +14,7 @@
 #include <errno.h>
 #include <log.h>
 #include <malloc.h>
+#include <dm/device_compat.h>
 #include <dm/device-internal.h>
 #include <dm/devres.h>
 #include <dm/read.h>
@@ -309,8 +310,9 @@ static int clk_set_default_rates(struct udevice *dev, int stage)
 		ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 					      index, &clk);
 		if (ret) {
-			debug("%s: could not get assigned clock %d for %s\n",
-			      __func__, index, dev_read_name(dev));
+			dev_dbg(dev,
+				"could not get assigned clock %d (err = %d)\n",
+				index, ret);
 			continue;
 		}
 
@@ -332,8 +334,9 @@ static int clk_set_default_rates(struct udevice *dev, int stage)
 		ret = clk_set_rate(c, rates[index]);
 
 		if (ret < 0) {
-			debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
-			      __func__, index, clk.id, dev_read_name(dev));
+			dev_warn(dev,
+				 "failed to set rate on clock index %d (%ld) (error = %d)\n",
+				 index, clk.id, ret);
 			break;
 		}
 	}
-- 
2.31.0

  reply	other threads:[~2021-04-09  2:13 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-09  2:13 [PATCH v3 00/11] riscv: k210: Enable use of AI ram bank Sean Anderson
2021-04-09  2:13 ` Sean Anderson [this message]
2021-04-09  2:13 ` [PATCH v3 02/11] clk: k210: Fix PLLs not being enabled Sean Anderson
2021-04-09  2:45   ` Damien Le Moal
2021-04-09  2:13 ` [PATCH v3 03/11] clk: k210: Fix PLL enable always getting taken Sean Anderson
2021-04-09  2:13 ` [PATCH v3 04/11] clk: k210: Remove k210_register_pll Sean Anderson
2021-04-09  2:13 ` [PATCH v3 05/11] clk: k210: Move the clint clock to under aclk Sean Anderson
2021-04-09  2:54   ` Damien Le Moal
2021-04-09  2:57     ` Sean Anderson
2021-04-09  3:00       ` Damien Le Moal
2021-04-09  2:58     ` Damien Le Moal
2021-04-09  3:09       ` Sean Anderson
2021-04-09  2:13 ` [PATCH v3 06/11] clk: Add support for the k210 clock driver pre-relocation Sean Anderson
2021-04-09  2:13 ` [PATCH v3 07/11] riscv: Enable some devices pre-relocation Sean Anderson
2021-04-09  2:13 ` [PATCH v3 08/11] riscv: Enable AI ram on K210 Sean Anderson
2021-04-09  2:13 ` [PATCH v3 09/11] riscv: k210: Rename airam to aisram Sean Anderson
2021-04-09  2:13 ` [PATCH v3 10/11] riscv: k210: Use AI as the parent clock of aisram, not PLL1 Sean Anderson
2021-04-09  2:13 ` [PATCH v3 11/11] riscv: Don't reserve AI ram in k210 dts Sean Anderson

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