From: Catalin Marinas <catalin.marinas@arm.com> To: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Will Deacon <will@kernel.org>, stable@vger.kernel.org Subject: Re: [PATCH v3] arm64: mte: Move MTE TCF0 check in entry-common Date: Fri, 9 Apr 2021 15:47:39 +0100 [thread overview] Message-ID: <20210409144738.GB24031@arm.com> (raw) In-Reply-To: <20210409132419.29965-1-vincenzo.frascino@arm.com> On Fri, Apr 09, 2021 at 02:24:19PM +0100, Vincenzo Frascino wrote: > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index b3c70a612c7a..84a942c25870 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -166,14 +166,43 @@ static void set_gcr_el1_excl(u64 excl) > */ > } > > -void flush_mte_state(void) > +void noinstr check_mte_async_tcf0(void) Nitpick: it looks like naming isn't be entirely consistent with your kernel async patches: https://lore.kernel.org/linux-arm-kernel/20210315132019.33202-8-vincenzo.frascino@arm.com/ You could name them mte_check_tfsre0_el1() etc. Also make sure they are called in similar places in both series. > +{ > + u64 tcf0; > + > + if (!system_supports_mte()) > + return; > + > + /* > + * dsb(ish) is not required before the register read > + * because the TFSRE0_EL1 is automatically synchronized > + * by the hardware on exception entry as SCTLR_EL1.ITFSB > + * is set. > + */ > + tcf0 = read_sysreg_s(SYS_TFSRE0_EL1); > + > + if (tcf0 & SYS_TFSR_EL1_TF0) > + set_thread_flag(TIF_MTE_ASYNC_FAULT); > + > + write_sysreg_s(0, SYS_TFSRE0_EL1); Please move the write_sysreg() inside the 'if' block. If it was 0, there's no point in a potentially more expensive write. That said, we only check TFSRE0_EL1 on entry from EL0. Is there a point in clearing it before we return to EL0? Uaccess routines may set it anyway. > +} > + > +void noinstr clear_mte_async_tcf0(void) > { > if (!system_supports_mte()) > return; > > - /* clear any pending asynchronous tag fault */ > dsb(ish); > write_sysreg_s(0, SYS_TFSRE0_EL1); > +} I think Mark suggested on your first version that we should keep these functions in mte.h so that they can be inlined. They are small and only called in one or two places. -- Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com> To: Vincenzo Frascino <vincenzo.frascino@arm.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com, Will Deacon <will@kernel.org>, stable@vger.kernel.org Subject: Re: [PATCH v3] arm64: mte: Move MTE TCF0 check in entry-common Date: Fri, 9 Apr 2021 15:47:39 +0100 [thread overview] Message-ID: <20210409144738.GB24031@arm.com> (raw) In-Reply-To: <20210409132419.29965-1-vincenzo.frascino@arm.com> On Fri, Apr 09, 2021 at 02:24:19PM +0100, Vincenzo Frascino wrote: > diff --git a/arch/arm64/kernel/mte.c b/arch/arm64/kernel/mte.c > index b3c70a612c7a..84a942c25870 100644 > --- a/arch/arm64/kernel/mte.c > +++ b/arch/arm64/kernel/mte.c > @@ -166,14 +166,43 @@ static void set_gcr_el1_excl(u64 excl) > */ > } > > -void flush_mte_state(void) > +void noinstr check_mte_async_tcf0(void) Nitpick: it looks like naming isn't be entirely consistent with your kernel async patches: https://lore.kernel.org/linux-arm-kernel/20210315132019.33202-8-vincenzo.frascino@arm.com/ You could name them mte_check_tfsre0_el1() etc. Also make sure they are called in similar places in both series. > +{ > + u64 tcf0; > + > + if (!system_supports_mte()) > + return; > + > + /* > + * dsb(ish) is not required before the register read > + * because the TFSRE0_EL1 is automatically synchronized > + * by the hardware on exception entry as SCTLR_EL1.ITFSB > + * is set. > + */ > + tcf0 = read_sysreg_s(SYS_TFSRE0_EL1); > + > + if (tcf0 & SYS_TFSR_EL1_TF0) > + set_thread_flag(TIF_MTE_ASYNC_FAULT); > + > + write_sysreg_s(0, SYS_TFSRE0_EL1); Please move the write_sysreg() inside the 'if' block. If it was 0, there's no point in a potentially more expensive write. That said, we only check TFSRE0_EL1 on entry from EL0. Is there a point in clearing it before we return to EL0? Uaccess routines may set it anyway. > +} > + > +void noinstr clear_mte_async_tcf0(void) > { > if (!system_supports_mte()) > return; > > - /* clear any pending asynchronous tag fault */ > dsb(ish); > write_sysreg_s(0, SYS_TFSRE0_EL1); > +} I think Mark suggested on your first version that we should keep these functions in mte.h so that they can be inlined. They are small and only called in one or two places. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-04-09 14:47 UTC|newest] Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-09 13:24 [PATCH v3] arm64: mte: Move MTE TCF0 check in entry-common Vincenzo Frascino 2021-04-09 13:24 ` Vincenzo Frascino 2021-04-09 14:32 ` Mark Rutland 2021-04-09 14:32 ` Mark Rutland 2021-04-09 16:18 ` Mark Rutland 2021-04-09 16:18 ` Mark Rutland 2021-04-09 16:56 ` Catalin Marinas 2021-04-09 16:56 ` Catalin Marinas 2021-04-09 14:47 ` Catalin Marinas [this message] 2021-04-09 14:47 ` Catalin Marinas
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20210409144738.GB24031@arm.com \ --to=catalin.marinas@arm.com \ --cc=kasan-dev@googlegroups.com \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=stable@vger.kernel.org \ --cc=vincenzo.frascino@arm.com \ --cc=will@kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.