* [PATCH v2 0/4] stm32 usart add fifo threshold configuration
@ 2021-04-13 17:40 ` Erwan Le Ray
0 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
This series adds the support for two optional DT properties to configure
RX and TX FIFO thresholds:
- rx-threshold
- tx-threshold
This replaces hard-coded 8 bytes threshold. No functional change expected
if unspecified (keep 8 as default).
Changes in v2:
Change added properties naming and factorize it in serial.yaml as proposed
by Rob Herring.
Erwan Le Ray (3):
dt-bindings: serial: add RX and TX FIFO properties
dt-bindings: serial: stm32: override FIFO threshold properties
dt-bindings: serial: 8250: update TX FIFO trigger level
Fabrice Gasnier (1):
serial: stm32: add FIFO threshold configuration
.../devicetree/bindings/serial/8250.yaml | 1 -
.../devicetree/bindings/serial/serial.yaml | 10 ++++
.../bindings/serial/st,stm32-uart.yaml | 27 +++++++++-
drivers/tty/serial/stm32-usart.c | 53 ++++++++++++++++---
drivers/tty/serial/stm32-usart.h | 8 +--
5 files changed, 85 insertions(+), 14 deletions(-)
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 1/4] dt-bindings: serial: add RX and TX FIFO properties
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-13 17:40 ` Erwan Le Ray
-1 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Add two optional DT properties to configure RX and TX FIFO thresholds:
- rx-threshold
- tx-threshold
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml
index 65e75d040521..f368d58e8086 100644
--- a/Documentation/devicetree/bindings/serial/serial.yaml
+++ b/Documentation/devicetree/bindings/serial/serial.yaml
@@ -75,6 +75,16 @@ properties:
type: boolean
description: CTS and RTS pins are swapped.
+ rx-threshold:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ RX FIFO threshold configuration (in bytes).
+
+ tx-threshold:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ TX FIFO threshold configuration (in bytes).
+
if:
required:
- uart-has-rtscts
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 1/4] dt-bindings: serial: add RX and TX FIFO properties
@ 2021-04-13 17:40 ` Erwan Le Ray
0 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Add two optional DT properties to configure RX and TX FIFO thresholds:
- rx-threshold
- tx-threshold
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml
index 65e75d040521..f368d58e8086 100644
--- a/Documentation/devicetree/bindings/serial/serial.yaml
+++ b/Documentation/devicetree/bindings/serial/serial.yaml
@@ -75,6 +75,16 @@ properties:
type: boolean
description: CTS and RTS pins are swapped.
+ rx-threshold:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ RX FIFO threshold configuration (in bytes).
+
+ tx-threshold:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ TX FIFO threshold configuration (in bytes).
+
if:
required:
- uart-has-rtscts
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2 1/4] dt-bindings: serial: add RX and TX FIFO properties
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-15 21:12 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:12 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Alexandre Torgue, linux-serial, Maxime Coquelin,
Greg Kroah-Hartman, Valentin Caron, devicetree, Fabrice Gasnier,
Jiri Slaby, linux-stm32, Rob Herring, linux-arm-kernel,
linux-kernel
On Tue, 13 Apr 2021 19:40:12 +0200, Erwan Le Ray wrote:
> Add two optional DT properties to configure RX and TX FIFO thresholds:
> - rx-threshold
> - tx-threshold
>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/4] dt-bindings: serial: add RX and TX FIFO properties
@ 2021-04-15 21:12 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:12 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Alexandre Torgue, linux-serial, Maxime Coquelin,
Greg Kroah-Hartman, Valentin Caron, devicetree, Fabrice Gasnier,
Jiri Slaby, linux-stm32, Rob Herring, linux-arm-kernel,
linux-kernel
On Tue, 13 Apr 2021 19:40:12 +0200, Erwan Le Ray wrote:
> Add two optional DT properties to configure RX and TX FIFO thresholds:
> - rx-threshold
> - tx-threshold
>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 2/4] dt-bindings: serial: stm32: override FIFO threshold properties
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-13 17:40 ` Erwan Le Ray
-1 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Override rx-threshold and tx-threshold properties:
- extend description
- provide default and expected values
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Changes in v2:
Change added properties naming and factorize it in serial.yaml as proposed
by Rob Herring.
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
index c69f8464cdf3..71a6426bc558 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
@@ -65,6 +65,18 @@ properties:
linux,rs485-enabled-at-boot-time: true
rs485-rx-during-tx: true
+ rx-threshold:
+ description:
+ If value is set to 1, RX FIFO threshold is disabled.
+ enum: [1, 2, 4, 8, 12, 14, 16]
+ default: 8
+
+ tx-threshold:
+ description:
+ If value is set to 1, TX FIFO threshold is disabled.
+ enum: [1, 2, 4, 8, 12, 14, 16]
+ default: 8
+
allOf:
- $ref: rs485.yaml#
- $ref: serial.yaml#
@@ -82,6 +94,17 @@ allOf:
then:
properties:
rx-tx-swap: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - st,stm32-uart
+ - st,stm32f7-uart
+ then:
+ properties:
+ rx-threshold: false
+ tx-threshold: false
required:
- compatible
@@ -96,13 +119,15 @@ examples:
- |
#include <dt-bindings/clock/stm32mp1-clks.h>
usart1: serial@40011000 {
- compatible = "st,stm32-uart";
+ compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
clocks = <&rcc 0 164>;
dmas = <&dma2 2 4 0x414 0x0>,
<&dma2 7 4 0x414 0x0>;
dma-names = "rx", "tx";
+ rx-threshold = <4>;
+ tx-threshold = <4>;
rs485-rts-active-low;
};
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 2/4] dt-bindings: serial: stm32: override FIFO threshold properties
@ 2021-04-13 17:40 ` Erwan Le Ray
0 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Override rx-threshold and tx-threshold properties:
- extend description
- provide default and expected values
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Changes in v2:
Change added properties naming and factorize it in serial.yaml as proposed
by Rob Herring.
diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
index c69f8464cdf3..71a6426bc558 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
+++ b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml
@@ -65,6 +65,18 @@ properties:
linux,rs485-enabled-at-boot-time: true
rs485-rx-during-tx: true
+ rx-threshold:
+ description:
+ If value is set to 1, RX FIFO threshold is disabled.
+ enum: [1, 2, 4, 8, 12, 14, 16]
+ default: 8
+
+ tx-threshold:
+ description:
+ If value is set to 1, TX FIFO threshold is disabled.
+ enum: [1, 2, 4, 8, 12, 14, 16]
+ default: 8
+
allOf:
- $ref: rs485.yaml#
- $ref: serial.yaml#
@@ -82,6 +94,17 @@ allOf:
then:
properties:
rx-tx-swap: false
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - st,stm32-uart
+ - st,stm32f7-uart
+ then:
+ properties:
+ rx-threshold: false
+ tx-threshold: false
required:
- compatible
@@ -96,13 +119,15 @@ examples:
- |
#include <dt-bindings/clock/stm32mp1-clks.h>
usart1: serial@40011000 {
- compatible = "st,stm32-uart";
+ compatible = "st,stm32h7-uart";
reg = <0x40011000 0x400>;
interrupts = <37>;
clocks = <&rcc 0 164>;
dmas = <&dma2 2 4 0x414 0x0>,
<&dma2 7 4 0x414 0x0>;
dma-names = "rx", "tx";
+ rx-threshold = <4>;
+ tx-threshold = <4>;
rs485-rts-active-low;
};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2 2/4] dt-bindings: serial: stm32: override FIFO threshold properties
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-15 21:13 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:13 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Maxime Coquelin, Jiri Slaby, Fabrice Gasnier, Valentin Caron,
linux-arm-kernel, Rob Herring, devicetree, Alexandre Torgue,
linux-serial, linux-kernel, linux-stm32, Greg Kroah-Hartman
On Tue, 13 Apr 2021 19:40:13 +0200, Erwan Le Ray wrote:
> Override rx-threshold and tx-threshold properties:
> - extend description
> - provide default and expected values
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
> Changes in v2:
> Change added properties naming and factorize it in serial.yaml as proposed
> by Rob Herring.
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 2/4] dt-bindings: serial: stm32: override FIFO threshold properties
@ 2021-04-15 21:13 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:13 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Maxime Coquelin, Jiri Slaby, Fabrice Gasnier, Valentin Caron,
linux-arm-kernel, Rob Herring, devicetree, Alexandre Torgue,
linux-serial, linux-kernel, linux-stm32, Greg Kroah-Hartman
On Tue, 13 Apr 2021 19:40:13 +0200, Erwan Le Ray wrote:
> Override rx-threshold and tx-threshold properties:
> - extend description
> - provide default and expected values
>
> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
> Changes in v2:
> Change added properties naming and factorize it in serial.yaml as proposed
> by Rob Herring.
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 3/4] dt-bindings: serial: 8250: update TX FIFO trigger level
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-13 17:40 ` Erwan Le Ray
-1 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Remove data type from tx-threshold trigger level as defined now as a
serial generic property.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
index c0e292cdaa6b..ff0fa9b2a390 100644
--- a/Documentation/devicetree/bindings/serial/8250.yaml
+++ b/Documentation/devicetree/bindings/serial/8250.yaml
@@ -166,7 +166,6 @@ properties:
property.
tx-threshold:
- $ref: /schemas/types.yaml#/definitions/uint32
description: |
Specify the TX FIFO low water indication for parts with programmable
TX FIFO thresholds.
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 3/4] dt-bindings: serial: 8250: update TX FIFO trigger level
@ 2021-04-13 17:40 ` Erwan Le Ray
0 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
Remove data type from tx-threshold trigger level as defined now as a
serial generic property.
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
index c0e292cdaa6b..ff0fa9b2a390 100644
--- a/Documentation/devicetree/bindings/serial/8250.yaml
+++ b/Documentation/devicetree/bindings/serial/8250.yaml
@@ -166,7 +166,6 @@ properties:
property.
tx-threshold:
- $ref: /schemas/types.yaml#/definitions/uint32
description: |
Specify the TX FIFO low water indication for parts with programmable
TX FIFO thresholds.
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [PATCH v2 3/4] dt-bindings: serial: 8250: update TX FIFO trigger level
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-15 21:13 ` Rob Herring
-1 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:13 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Fabrice Gasnier, Rob Herring, Alexandre Torgue, Jiri Slaby,
linux-stm32, devicetree, Maxime Coquelin, linux-kernel,
linux-serial, linux-arm-kernel, Greg Kroah-Hartman,
Valentin Caron
On Tue, 13 Apr 2021 19:40:14 +0200, Erwan Le Ray wrote:
> Remove data type from tx-threshold trigger level as defined now as a
> serial generic property.
>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/4] dt-bindings: serial: 8250: update TX FIFO trigger level
@ 2021-04-15 21:13 ` Rob Herring
0 siblings, 0 replies; 16+ messages in thread
From: Rob Herring @ 2021-04-15 21:13 UTC (permalink / raw)
To: Erwan Le Ray
Cc: Fabrice Gasnier, Rob Herring, Alexandre Torgue, Jiri Slaby,
linux-stm32, devicetree, Maxime Coquelin, linux-kernel,
linux-serial, linux-arm-kernel, Greg Kroah-Hartman,
Valentin Caron
On Tue, 13 Apr 2021 19:40:14 +0200, Erwan Le Ray wrote:
> Remove data type from tx-threshold trigger level as defined now as a
> serial generic property.
>
> Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
>
Reviewed-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 4/4] serial: stm32: add FIFO threshold configuration
2021-04-13 17:40 ` Erwan Le Ray
@ 2021-04-13 17:40 ` Erwan Le Ray
-1 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
From: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Add the support for two optional DT properties, to configure RX and TX
FIFO thresholds:
- rx-threshold
- tx-threshold
This replaces hard-coded 8 bytes threshold. Keep 8 as the default value if
not specified, for backward compatibility.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Changes in v2:
Change added properties naming as proposed by Rob Herring.
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 4d277804c63e..409cfd15a933 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -312,7 +312,7 @@ static void stm32_usart_tx_interrupt_enable(struct uart_port *port)
* Enables TX FIFO threashold irq when FIFO is enabled,
* or TX empty irq when FIFO is disabled
*/
- if (stm32_port->fifoen)
+ if (stm32_port->fifoen && stm32_port->txftcfg >= 0)
stm32_usart_set_bits(port, ofs->cr3, USART_CR3_TXFTIE);
else
stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TXEIE);
@@ -323,7 +323,7 @@ static void stm32_usart_tx_interrupt_disable(struct uart_port *port)
struct stm32_port *stm32_port = to_stm32_port(port);
const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
- if (stm32_port->fifoen)
+ if (stm32_port->fifoen && stm32_port->txftcfg >= 0)
stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE);
else
stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_TXEIE);
@@ -801,9 +801,10 @@ static void stm32_usart_set_termios(struct uart_port *port,
cr3 = readl_relaxed(port->membase + ofs->cr3);
cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTIE;
if (stm32_port->fifoen) {
- cr3 &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK);
- cr3 |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT;
- cr3 |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT;
+ if (stm32_port->txftcfg >= 0)
+ cr3 |= stm32_port->txftcfg << USART_CR3_TXFTCFG_SHIFT;
+ if (stm32_port->rxftcfg >= 0)
+ cr3 |= stm32_port->rxftcfg << USART_CR3_RXFTCFG_SHIFT;
}
if (cflag & CSTOPB)
@@ -833,7 +834,8 @@ static void stm32_usart_set_termios(struct uart_port *port,
, bits);
if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch ||
- stm32_port->fifoen)) {
+ (stm32_port->fifoen &&
+ stm32_port->rxftcfg >= 0))) {
if (cflag & CSTOPB)
bits = bits + 3; /* 1 start bit + 2 stop bits */
else
@@ -1021,6 +1023,39 @@ static const struct uart_ops stm32_uart_ops = {
.verify_port = stm32_usart_verify_port,
};
+/*
+ * STM32H7 RX & TX FIFO threshold configuration (CR3 RXFTCFG / TXFTCFG)
+ * Note: 1 isn't a valid value in RXFTCFG / TXFTCFG. In this case,
+ * RXNEIE / TXEIE can be used instead of threshold irqs: RXFTIE / TXFTIE.
+ * So, RXFTCFG / TXFTCFG bitfields values are encoded as array index + 1.
+ */
+static const u32 stm32h7_usart_fifo_thresh_cfg[] = { 1, 2, 4, 8, 12, 14, 16 };
+
+static void stm32_usart_get_ftcfg(struct platform_device *pdev, const char *p,
+ int *ftcfg)
+{
+ u32 bytes, i;
+
+ /* DT option to get RX & TX FIFO threshold (default to 8 bytes) */
+ if (of_property_read_u32(pdev->dev.of_node, p, &bytes))
+ bytes = 8;
+
+ for (i = 0; i < ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg); i++)
+ if (stm32h7_usart_fifo_thresh_cfg[i] >= bytes)
+ break;
+ if (i >= ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg))
+ i = ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg) - 1;
+
+ dev_dbg(&pdev->dev, "%s set to %d bytes\n", p,
+ stm32h7_usart_fifo_thresh_cfg[i]);
+
+ /* Provide FIFO threshold ftcfg (1 is invalid: threshold irq unused) */
+ if (i)
+ *ftcfg = i - 1;
+ else
+ *ftcfg = -EINVAL;
+}
+
static void stm32_usart_deinit_port(struct stm32_port *stm32port)
{
clk_disable_unprepare(stm32port->clk);
@@ -1057,6 +1092,12 @@ static int stm32_usart_init_port(struct stm32_port *stm32port,
of_property_read_bool(pdev->dev.of_node, "rx-tx-swap");
stm32port->fifoen = stm32port->info->cfg.has_fifo;
+ if (stm32port->fifoen) {
+ stm32_usart_get_ftcfg(pdev, "rx-threshold",
+ &stm32port->rxftcfg);
+ stm32_usart_get_ftcfg(pdev, "tx-threshold",
+ &stm32port->txftcfg);
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(&pdev->dev, res);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 77d1ac082e89..07ac291328cd 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -216,12 +216,6 @@ struct stm32_usart_info stm32h7_info = {
#define USART_CR3_TXFTCFG_MASK GENMASK(31, 29) /* H7 */
#define USART_CR3_TXFTCFG_SHIFT 29 /* H7 */
-/* TX FIFO threashold set to half of its depth */
-#define USART_CR3_TXFTCFG_HALF 0x2
-
-/* RX FIFO threashold set to half of its depth */
-#define USART_CR3_RXFTCFG_HALF 0x2
-
/* USART_GTPR */
#define USART_GTPR_PSC_MASK GENMASK(7, 0)
#define USART_GTPR_GT_MASK GENMASK(15, 8)
@@ -273,6 +267,8 @@ struct stm32_port {
bool hw_flow_control;
bool swap; /* swap RX & TX pins */
bool fifoen;
+ int rxftcfg; /* RX FIFO threshold CFG */
+ int txftcfg; /* TX FIFO threshold CFG */
bool wakeup_src;
int rdr_mask; /* receive data register mask */
struct mctrl_gpios *gpios; /* modem control gpios */
--
2.17.1
^ permalink raw reply related [flat|nested] 16+ messages in thread* [PATCH v2 4/4] serial: stm32: add FIFO threshold configuration
@ 2021-04-13 17:40 ` Erwan Le Ray
0 siblings, 0 replies; 16+ messages in thread
From: Erwan Le Ray @ 2021-04-13 17:40 UTC (permalink / raw)
To: Greg Kroah-Hartman, Jiri Slaby, Rob Herring, Maxime Coquelin,
Alexandre Torgue
Cc: linux-serial, devicetree, linux-stm32, linux-arm-kernel,
linux-kernel, Erwan Le Ray, Fabrice Gasnier, Valentin Caron
From: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Add the support for two optional DT properties, to configure RX and TX
FIFO thresholds:
- rx-threshold
- tx-threshold
This replaces hard-coded 8 bytes threshold. Keep 8 as the default value if
not specified, for backward compatibility.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Changes in v2:
Change added properties naming as proposed by Rob Herring.
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 4d277804c63e..409cfd15a933 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -312,7 +312,7 @@ static void stm32_usart_tx_interrupt_enable(struct uart_port *port)
* Enables TX FIFO threashold irq when FIFO is enabled,
* or TX empty irq when FIFO is disabled
*/
- if (stm32_port->fifoen)
+ if (stm32_port->fifoen && stm32_port->txftcfg >= 0)
stm32_usart_set_bits(port, ofs->cr3, USART_CR3_TXFTIE);
else
stm32_usart_set_bits(port, ofs->cr1, USART_CR1_TXEIE);
@@ -323,7 +323,7 @@ static void stm32_usart_tx_interrupt_disable(struct uart_port *port)
struct stm32_port *stm32_port = to_stm32_port(port);
const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
- if (stm32_port->fifoen)
+ if (stm32_port->fifoen && stm32_port->txftcfg >= 0)
stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE);
else
stm32_usart_clr_bits(port, ofs->cr1, USART_CR1_TXEIE);
@@ -801,9 +801,10 @@ static void stm32_usart_set_termios(struct uart_port *port,
cr3 = readl_relaxed(port->membase + ofs->cr3);
cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTIE;
if (stm32_port->fifoen) {
- cr3 &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK);
- cr3 |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT;
- cr3 |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT;
+ if (stm32_port->txftcfg >= 0)
+ cr3 |= stm32_port->txftcfg << USART_CR3_TXFTCFG_SHIFT;
+ if (stm32_port->rxftcfg >= 0)
+ cr3 |= stm32_port->rxftcfg << USART_CR3_RXFTCFG_SHIFT;
}
if (cflag & CSTOPB)
@@ -833,7 +834,8 @@ static void stm32_usart_set_termios(struct uart_port *port,
, bits);
if (ofs->rtor != UNDEF_REG && (stm32_port->rx_ch ||
- stm32_port->fifoen)) {
+ (stm32_port->fifoen &&
+ stm32_port->rxftcfg >= 0))) {
if (cflag & CSTOPB)
bits = bits + 3; /* 1 start bit + 2 stop bits */
else
@@ -1021,6 +1023,39 @@ static const struct uart_ops stm32_uart_ops = {
.verify_port = stm32_usart_verify_port,
};
+/*
+ * STM32H7 RX & TX FIFO threshold configuration (CR3 RXFTCFG / TXFTCFG)
+ * Note: 1 isn't a valid value in RXFTCFG / TXFTCFG. In this case,
+ * RXNEIE / TXEIE can be used instead of threshold irqs: RXFTIE / TXFTIE.
+ * So, RXFTCFG / TXFTCFG bitfields values are encoded as array index + 1.
+ */
+static const u32 stm32h7_usart_fifo_thresh_cfg[] = { 1, 2, 4, 8, 12, 14, 16 };
+
+static void stm32_usart_get_ftcfg(struct platform_device *pdev, const char *p,
+ int *ftcfg)
+{
+ u32 bytes, i;
+
+ /* DT option to get RX & TX FIFO threshold (default to 8 bytes) */
+ if (of_property_read_u32(pdev->dev.of_node, p, &bytes))
+ bytes = 8;
+
+ for (i = 0; i < ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg); i++)
+ if (stm32h7_usart_fifo_thresh_cfg[i] >= bytes)
+ break;
+ if (i >= ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg))
+ i = ARRAY_SIZE(stm32h7_usart_fifo_thresh_cfg) - 1;
+
+ dev_dbg(&pdev->dev, "%s set to %d bytes\n", p,
+ stm32h7_usart_fifo_thresh_cfg[i]);
+
+ /* Provide FIFO threshold ftcfg (1 is invalid: threshold irq unused) */
+ if (i)
+ *ftcfg = i - 1;
+ else
+ *ftcfg = -EINVAL;
+}
+
static void stm32_usart_deinit_port(struct stm32_port *stm32port)
{
clk_disable_unprepare(stm32port->clk);
@@ -1057,6 +1092,12 @@ static int stm32_usart_init_port(struct stm32_port *stm32port,
of_property_read_bool(pdev->dev.of_node, "rx-tx-swap");
stm32port->fifoen = stm32port->info->cfg.has_fifo;
+ if (stm32port->fifoen) {
+ stm32_usart_get_ftcfg(pdev, "rx-threshold",
+ &stm32port->rxftcfg);
+ stm32_usart_get_ftcfg(pdev, "tx-threshold",
+ &stm32port->txftcfg);
+ }
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(&pdev->dev, res);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 77d1ac082e89..07ac291328cd 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -216,12 +216,6 @@ struct stm32_usart_info stm32h7_info = {
#define USART_CR3_TXFTCFG_MASK GENMASK(31, 29) /* H7 */
#define USART_CR3_TXFTCFG_SHIFT 29 /* H7 */
-/* TX FIFO threashold set to half of its depth */
-#define USART_CR3_TXFTCFG_HALF 0x2
-
-/* RX FIFO threashold set to half of its depth */
-#define USART_CR3_RXFTCFG_HALF 0x2
-
/* USART_GTPR */
#define USART_GTPR_PSC_MASK GENMASK(7, 0)
#define USART_GTPR_GT_MASK GENMASK(15, 8)
@@ -273,6 +267,8 @@ struct stm32_port {
bool hw_flow_control;
bool swap; /* swap RX & TX pins */
bool fifoen;
+ int rxftcfg; /* RX FIFO threshold CFG */
+ int txftcfg; /* TX FIFO threshold CFG */
bool wakeup_src;
int rdr_mask; /* receive data register mask */
struct mctrl_gpios *gpios; /* modem control gpios */
--
2.17.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread