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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-riscv@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>,
	"Juan Quintela" <quintela@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	"Laurent Vivier" <laurent@vivier.eu>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
	"Claudio Fontana" <cfontana@suse.de>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v6 01/18] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
Date: Thu, 22 Apr 2021 21:38:45 +0200	[thread overview]
Message-ID: <20210422193902.2644064-2-f4bug@amsat.org> (raw)
In-Reply-To: <20210422193902.2644064-1-f4bug@amsat.org>

To be able to later extract the cpu_get_phys_page_debug() and
cpu_asidx_from_attrs() handlers from CPUClass, un-inline them
from "hw/core/cpu.h".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/cpu.h | 33 ++++-----------------------------
 hw/core/cpu.c         | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 29 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c68bc3ba8af..9338e80aa4b 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -580,18 +580,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags);
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
-                                                   MemTxAttrs *attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
-    if (cc->get_phys_page_attrs_debug) {
-        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
-    }
-    /* Fallback for CPUs which don't implement the _attrs_ hook */
-    *attrs = MEMTXATTRS_UNSPECIFIED;
-    return cc->get_phys_page_debug(cpu, addr);
-}
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs);
 
 /**
  * cpu_get_phys_page_debug:
@@ -603,12 +593,7 @@ static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
-{
-    MemTxAttrs attrs = {};
-
-    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
-}
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 
 /** cpu_asidx_from_attrs:
  * @cpu: CPU
@@ -617,17 +602,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
  * Returns the address space index specifying the CPU AddressSpace
  * to use for a memory access with the given transaction attributes.
  */
-static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-    int ret = 0;
-
-    if (cc->asidx_from_attrs) {
-        ret = cc->asidx_from_attrs(cpu, attrs);
-        assert(ret < cpu->num_ases && ret >= 0);
-    }
-    return ret;
-}
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
 
 #endif /* CONFIG_USER_ONLY */
 
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 00330ba07de..4dce35f832f 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -94,6 +94,38 @@ static void cpu_common_get_memory_mapping(CPUState *cpu,
     error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
 }
 
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                                   MemTxAttrs *attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->get_phys_page_attrs_debug) {
+        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+    }
+    /* Fallback for CPUs which don't implement the _attrs_ hook */
+    *attrs = MEMTXATTRS_UNSPECIFIED;
+    return cc->get_phys_page_debug(cpu, addr);
+}
+
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
+{
+    MemTxAttrs attrs = {};
+
+    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
+}
+
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+    int ret = 0;
+
+    if (cc->asidx_from_attrs) {
+        ret = cc->asidx_from_attrs(cpu, attrs);
+        assert(ret < cpu->num_ases && ret >= 0);
+    }
+    return ret;
+}
+
 /* Resetting the IRQ comes from across the code base so we take the
  * BQL here if we need to.  cpu_interrupt assumes it is held.*/
 void cpu_reset_interrupt(CPUState *cpu, int mask)
-- 
2.26.3



WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	qemu-riscv@nongnu.org, "Juan Quintela" <quintela@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Claudio Fontana" <cfontana@suse.de>,
	qemu-arm@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>,
	qemu-ppc@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	qemu-s390x@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>
Subject: [PATCH v6 01/18] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs
Date: Thu, 22 Apr 2021 21:38:45 +0200	[thread overview]
Message-ID: <20210422193902.2644064-2-f4bug@amsat.org> (raw)
In-Reply-To: <20210422193902.2644064-1-f4bug@amsat.org>

To be able to later extract the cpu_get_phys_page_debug() and
cpu_asidx_from_attrs() handlers from CPUClass, un-inline them
from "hw/core/cpu.h".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 include/hw/core/cpu.h | 33 ++++-----------------------------
 hw/core/cpu.c         | 32 ++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 29 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index c68bc3ba8af..9338e80aa4b 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -580,18 +580,8 @@ void cpu_dump_statistics(CPUState *cpu, int flags);
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
-                                                   MemTxAttrs *attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-
-    if (cc->get_phys_page_attrs_debug) {
-        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
-    }
-    /* Fallback for CPUs which don't implement the _attrs_ hook */
-    *attrs = MEMTXATTRS_UNSPECIFIED;
-    return cc->get_phys_page_debug(cpu, addr);
-}
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                     MemTxAttrs *attrs);
 
 /**
  * cpu_get_phys_page_debug:
@@ -603,12 +593,7 @@ static inline hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
  *
  * Returns: Corresponding physical page address or -1 if no page found.
  */
-static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
-{
-    MemTxAttrs attrs = {};
-
-    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
-}
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 
 /** cpu_asidx_from_attrs:
  * @cpu: CPU
@@ -617,17 +602,7 @@ static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
  * Returns the address space index specifying the CPU AddressSpace
  * to use for a memory access with the given transaction attributes.
  */
-static inline int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
-{
-    CPUClass *cc = CPU_GET_CLASS(cpu);
-    int ret = 0;
-
-    if (cc->asidx_from_attrs) {
-        ret = cc->asidx_from_attrs(cpu, attrs);
-        assert(ret < cpu->num_ases && ret >= 0);
-    }
-    return ret;
-}
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs);
 
 #endif /* CONFIG_USER_ONLY */
 
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 00330ba07de..4dce35f832f 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -94,6 +94,38 @@ static void cpu_common_get_memory_mapping(CPUState *cpu,
     error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
 }
 
+hwaddr cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
+                                                   MemTxAttrs *attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+
+    if (cc->get_phys_page_attrs_debug) {
+        return cc->get_phys_page_attrs_debug(cpu, addr, attrs);
+    }
+    /* Fallback for CPUs which don't implement the _attrs_ hook */
+    *attrs = MEMTXATTRS_UNSPECIFIED;
+    return cc->get_phys_page_debug(cpu, addr);
+}
+
+hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
+{
+    MemTxAttrs attrs = {};
+
+    return cpu_get_phys_page_attrs_debug(cpu, addr, &attrs);
+}
+
+int cpu_asidx_from_attrs(CPUState *cpu, MemTxAttrs attrs)
+{
+    CPUClass *cc = CPU_GET_CLASS(cpu);
+    int ret = 0;
+
+    if (cc->asidx_from_attrs) {
+        ret = cc->asidx_from_attrs(cpu, attrs);
+        assert(ret < cpu->num_ases && ret >= 0);
+    }
+    return ret;
+}
+
 /* Resetting the IRQ comes from across the code base so we take the
  * BQL here if we need to.  cpu_interrupt assumes it is held.*/
 void cpu_reset_interrupt(CPUState *cpu, int mask)
-- 
2.26.3



  reply	other threads:[~2021-04-22 19:41 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-22 19:38 [PATCH v6 00/18] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 19:38 ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` Philippe Mathieu-Daudé [this message]
2021-04-22 19:38   ` [PATCH v6 01/18] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 02/18] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 03/18] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 04/18] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 05/18] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 06/18] cpu: Assert DeviceClass::vmsd is NULL on user emulation Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:08   ` Richard Henderson
2021-04-23  1:08     ` Richard Henderson
2021-04-26 16:15   ` Dr. David Alan Gilbert
2021-04-26 16:15     ` Dr. David Alan Gilbert
2021-04-26 16:50     ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 07/18] cpu: Rename CPUClass vmsd -> legacy_vmsd Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:11   ` Richard Henderson
2021-04-23  1:11     ` Richard Henderson
2021-04-22 19:38 ` [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one) Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:16   ` Richard Henderson
2021-04-23  1:16     ` Richard Henderson
2021-05-17  5:27     ` Philippe Mathieu-Daudé
2021-05-17  5:27       ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 09/18] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 10/18] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:24   ` Richard Henderson
2021-04-23  1:24     ` Richard Henderson
2021-04-22 19:38 ` [PATCH v6 11/18] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 12/18] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 13/18] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 14/18] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 15/18] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 16/18] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 17/18] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 18/18] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé

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