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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Michael Walle" <michael@walle.cc>,
	qemu-riscv@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>,
	"Juan Quintela" <quintela@redhat.com>,
	"Anthony Green" <green@moxielogic.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	"Laurent Vivier" <laurent@vivier.eu>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
	"Claudio Fontana" <cfontana@suse.de>,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one)
Date: Thu, 22 Apr 2021 21:38:52 +0200	[thread overview]
Message-ID: <20210422193902.2644064-9-f4bug@amsat.org> (raw)
In-Reply-To: <20210422193902.2644064-1-f4bug@amsat.org>

See rationale in previous commit. Targets should use the vmsd field
of DeviceClass, not CPUClass. As migration is not important on the
avr/lm32/moxie targets, break the migration compatibility and set
the DeviceClass vmsd field.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/avr/cpu.c   | 2 +-
 target/lm32/cpu.c  | 2 +-
 target/moxie/cpu.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 37a8ebcc86f..3353bcb9fc7 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -213,7 +213,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
     cc->set_pc = avr_cpu_set_pc;
     cc->memory_rw_debug = avr_cpu_memory_rw_debug;
     cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vms_avr_cpu;
+    dc->vmsd = &vms_avr_cpu;
     cc->disas_set_info = avr_cpu_disas_set_info;
     cc->gdb_read_register = avr_cpu_gdb_read_register;
     cc->gdb_write_register = avr_cpu_gdb_write_register;
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index c0388142528..e27c1a8bc97 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -241,7 +241,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_write_register = lm32_cpu_gdb_write_register;
 #ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vmstate_lm32_cpu;
+    dc->vmsd = &vmstate_lm32_cpu;
 #endif
     cc->gdb_num_core_regs = 32 + 7;
     cc->gdb_stop_before_watchpoint = true;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 3c81a088eaa..e5da3fa3f17 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -122,7 +122,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
     cc->set_pc = moxie_cpu_set_pc;
 #ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vmstate_moxie_cpu;
+    dc->vmsd = &vmstate_moxie_cpu;
 #endif
     cc->disas_set_info = moxie_cpu_disas_set_info;
     cc->tcg_ops = &moxie_tcg_ops;
-- 
2.26.3



WARNING: multiple messages have this Message-ID (diff)
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com>,
	qemu-riscv@nongnu.org, "Juan Quintela" <quintela@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Claudio Fontana" <cfontana@suse.de>,
	qemu-arm@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>,
	qemu-ppc@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	qemu-s390x@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Michael Rolnik" <mrolnik@gmail.com>,
	"Michael Walle" <michael@walle.cc>,
	"Anthony Green" <green@moxielogic.com>
Subject: [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one)
Date: Thu, 22 Apr 2021 21:38:52 +0200	[thread overview]
Message-ID: <20210422193902.2644064-9-f4bug@amsat.org> (raw)
In-Reply-To: <20210422193902.2644064-1-f4bug@amsat.org>

See rationale in previous commit. Targets should use the vmsd field
of DeviceClass, not CPUClass. As migration is not important on the
avr/lm32/moxie targets, break the migration compatibility and set
the DeviceClass vmsd field.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/avr/cpu.c   | 2 +-
 target/lm32/cpu.c  | 2 +-
 target/moxie/cpu.c | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 37a8ebcc86f..3353bcb9fc7 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -213,7 +213,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data)
     cc->set_pc = avr_cpu_set_pc;
     cc->memory_rw_debug = avr_cpu_memory_rw_debug;
     cc->get_phys_page_debug = avr_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vms_avr_cpu;
+    dc->vmsd = &vms_avr_cpu;
     cc->disas_set_info = avr_cpu_disas_set_info;
     cc->gdb_read_register = avr_cpu_gdb_read_register;
     cc->gdb_write_register = avr_cpu_gdb_write_register;
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index c0388142528..e27c1a8bc97 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -241,7 +241,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
     cc->gdb_write_register = lm32_cpu_gdb_write_register;
 #ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = lm32_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vmstate_lm32_cpu;
+    dc->vmsd = &vmstate_lm32_cpu;
 #endif
     cc->gdb_num_core_regs = 32 + 7;
     cc->gdb_stop_before_watchpoint = true;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 3c81a088eaa..e5da3fa3f17 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -122,7 +122,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
     cc->set_pc = moxie_cpu_set_pc;
 #ifndef CONFIG_USER_ONLY
     cc->get_phys_page_debug = moxie_cpu_get_phys_page_debug;
-    cc->legacy_vmsd = &vmstate_moxie_cpu;
+    dc->vmsd = &vmstate_moxie_cpu;
 #endif
     cc->disas_set_info = moxie_cpu_disas_set_info;
     cc->tcg_ops = &moxie_tcg_ops;
-- 
2.26.3



  parent reply	other threads:[~2021-04-22 19:53 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-22 19:38 [PATCH v6 00/18] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 19:38 ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 01/18] cpu: Un-inline cpu_get_phys_page_debug and cpu_asidx_from_attrs Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 02/18] cpu: Introduce cpu_virtio_is_big_endian() Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 03/18] cpu: Directly use cpu_write_elf*() fallback handlers in place Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 04/18] cpu: Directly use get_paging_enabled() " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 05/18] cpu: Directly use get_memory_mapping() " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 06/18] cpu: Assert DeviceClass::vmsd is NULL on user emulation Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:08   ` Richard Henderson
2021-04-23  1:08     ` Richard Henderson
2021-04-26 16:15   ` Dr. David Alan Gilbert
2021-04-26 16:15     ` Dr. David Alan Gilbert
2021-04-26 16:50     ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 07/18] cpu: Rename CPUClass vmsd -> legacy_vmsd Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:11   ` Richard Henderson
2021-04-23  1:11     ` Richard Henderson
2021-04-22 19:38 ` Philippe Mathieu-Daudé [this message]
2021-04-22 19:38   ` [PATCH v6 08/18] cpu/{avr, lm32, moxie}: Set DeviceClass vmsd field (not CPUClass one) Philippe Mathieu-Daudé
2021-04-23  1:16   ` Richard Henderson
2021-04-23  1:16     ` Richard Henderson
2021-05-17  5:27     ` Philippe Mathieu-Daudé
2021-05-17  5:27       ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 09/18] cpu: Introduce SysemuCPUOps structure Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 10/18] cpu: Move CPUClass::vmsd to SysemuCPUOps Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-23  1:24   ` Richard Henderson
2021-04-23  1:24     ` Richard Henderson
2021-04-22 19:38 ` [PATCH v6 11/18] cpu: Move CPUClass::virtio_is_big_endian " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 12/18] cpu: Move CPUClass::get_crash_info " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 13/18] cpu: Move CPUClass::write_elf* " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 14/18] cpu: Move CPUClass::asidx_from_attrs " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:38 ` [PATCH v6 15/18] cpu: Move CPUClass::get_phys_page_debug " Philippe Mathieu-Daudé
2021-04-22 19:38   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 16/18] cpu: Move CPUClass::get_memory_mapping " Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 17/18] cpu: Move CPUClass::get_paging_enabled " Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé
2021-04-22 19:39 ` [PATCH v6 18/18] cpu: Restrict "hw/core/sysemu-cpu-ops.h" to target/cpu.c Philippe Mathieu-Daudé
2021-04-22 19:39   ` Philippe Mathieu-Daudé

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