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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	dri-devel@lists.freedesktop.org,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH v4 03/17] drm/i915/pxp: define PXP device flag and kconfig
Date: Mon, 24 May 2021 22:47:49 -0700	[thread overview]
Message-ID: <20210525054803.7387-4-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20210525054803.7387-1-daniele.ceraolospurio@intel.com>

Ahead of the PXP implementation, define the relevant define flag and
kconfig option.

v2: flip kconfig default to N. Some machines have IFWIs that do not
support PXP, so we need it to be an opt-in until we add support to query
the caps from the mei device.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> #v1
---
 drivers/gpu/drm/i915/Kconfig             | 11 +++++++++++
 drivers/gpu/drm/i915/i915_drv.h          |  4 ++++
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 3 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 93f4d059fc89..3303579b41bb 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -131,6 +131,17 @@ config DRM_I915_GVT_KVMGT
 	  Choose this option if you want to enable KVMGT support for
 	  Intel GVT-g.
 
+config DRM_I915_PXP
+	bool "Enable Intel PXP support for Intel Gen12+ platform"
+	depends on DRM_I915
+	depends on INTEL_MEI && INTEL_MEI_PXP
+	default n
+	help
+	  PXP (Protected Xe Path) is an i915 component, available on GEN12+
+	  GPUs, that helps to establish the hardware protected session and
+	  manage the status of the alive software session, as well as its life
+	  cycle.
+
 menu "drm/i915 Debugging"
 depends on DRM_I915
 depends on EXPERT
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9cb02618ba15..ee7280cad3bb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1701,6 +1701,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_VRR(i915)	(INTEL_GEN(i915) >= 12)
 
+#define HAS_PXP(dev_priv) (IS_ENABLED(CONFIG_DRM_I915_PXP) && \
+			   INTEL_INFO(dev_priv)->has_pxp) && \
+			   VDBOX_MASK(&dev_priv->gt)
+
 /* Only valid when HAS_DISPLAY() is true */
 #define INTEL_DISPLAY_ENABLED(dev_priv) \
 	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 1390fad5ec06..2252f03558ff 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -129,6 +129,7 @@ enum intel_ppgtt_type {
 	func(has_logical_ring_elsq); \
 	func(has_master_unit_irq); \
 	func(has_pooled_eu); \
+	func(has_pxp); \
 	func(has_rc6); \
 	func(has_rc6p); \
 	func(has_rps); \
-- 
2.29.2


WARNING: multiple messages have this Message-ID (diff)
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v4 03/17] drm/i915/pxp: define PXP device flag and kconfig
Date: Mon, 24 May 2021 22:47:49 -0700	[thread overview]
Message-ID: <20210525054803.7387-4-daniele.ceraolospurio@intel.com> (raw)
In-Reply-To: <20210525054803.7387-1-daniele.ceraolospurio@intel.com>

Ahead of the PXP implementation, define the relevant define flag and
kconfig option.

v2: flip kconfig default to N. Some machines have IFWIs that do not
support PXP, so we need it to be an opt-in until we add support to query
the caps from the mei device.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> #v1
---
 drivers/gpu/drm/i915/Kconfig             | 11 +++++++++++
 drivers/gpu/drm/i915/i915_drv.h          |  4 ++++
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 3 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 93f4d059fc89..3303579b41bb 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -131,6 +131,17 @@ config DRM_I915_GVT_KVMGT
 	  Choose this option if you want to enable KVMGT support for
 	  Intel GVT-g.
 
+config DRM_I915_PXP
+	bool "Enable Intel PXP support for Intel Gen12+ platform"
+	depends on DRM_I915
+	depends on INTEL_MEI && INTEL_MEI_PXP
+	default n
+	help
+	  PXP (Protected Xe Path) is an i915 component, available on GEN12+
+	  GPUs, that helps to establish the hardware protected session and
+	  manage the status of the alive software session, as well as its life
+	  cycle.
+
 menu "drm/i915 Debugging"
 depends on DRM_I915
 depends on EXPERT
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 9cb02618ba15..ee7280cad3bb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1701,6 +1701,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_VRR(i915)	(INTEL_GEN(i915) >= 12)
 
+#define HAS_PXP(dev_priv) (IS_ENABLED(CONFIG_DRM_I915_PXP) && \
+			   INTEL_INFO(dev_priv)->has_pxp) && \
+			   VDBOX_MASK(&dev_priv->gt)
+
 /* Only valid when HAS_DISPLAY() is true */
 #define INTEL_DISPLAY_ENABLED(dev_priv) \
 	(drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)), !(dev_priv)->params.disable_display)
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 1390fad5ec06..2252f03558ff 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -129,6 +129,7 @@ enum intel_ppgtt_type {
 	func(has_logical_ring_elsq); \
 	func(has_master_unit_irq); \
 	func(has_pooled_eu); \
+	func(has_pxp); \
 	func(has_rc6); \
 	func(has_rc6p); \
 	func(has_rps); \
-- 
2.29.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2021-05-25  5:48 UTC|newest]

Thread overview: 90+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-25  5:47 [PATCH v4 00/17] drm/i915: Introduce Intel PXP Daniele Ceraolo Spurio
2021-05-25  5:47 ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25  5:47 ` [PATCH v4 01/17] drm/i915/pxp: Define PXP component interface Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25  5:47 ` [PATCH v4 02/17] mei: pxp: export pavp client to me client bus Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 19:10   ` Rodrigo Vivi
2021-06-02 19:10     ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:47 ` Daniele Ceraolo Spurio [this message]
2021-05-25  5:47   ` [Intel-gfx] [PATCH v4 03/17] drm/i915/pxp: define PXP device flag and kconfig Daniele Ceraolo Spurio
2021-05-25  5:47 ` [PATCH v4 04/17] drm/i915/gt: Export the pinned context constructor and destructor Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-01 20:20   ` Rodrigo Vivi
2021-06-01 20:20     ` [Intel-gfx] " Rodrigo Vivi
2021-06-01 21:23     ` Daniele Ceraolo Spurio
2021-06-01 21:23       ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 18:18       ` Rodrigo Vivi
2021-06-02 18:18         ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:47 ` [PATCH v4 05/17] drm/i915/pxp: allocate a vcs context for pxp usage Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-01 20:24   ` Rodrigo Vivi
2021-06-01 20:24     ` Rodrigo Vivi
2021-05-25  5:47 ` [PATCH v4 06/17] drm/i915/pxp: Implement funcs to create the TEE channel Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-01 20:26   ` Rodrigo Vivi
2021-06-01 20:26     ` [Intel-gfx] " Rodrigo Vivi
2021-06-03  0:07   ` Teres Alexis, Alan Previn
2021-06-03  0:07     ` Teres Alexis, Alan Previn
2021-05-25  5:47 ` [PATCH v4 07/17] drm/i915/pxp: set KCR reg init Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25  5:47 ` [PATCH v4 08/17] drm/i915/pxp: Create the arbitrary session after boot Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-01 20:32   ` Rodrigo Vivi
2021-06-01 20:32     ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:47 ` [PATCH v4 09/17] drm/i915/pxp: Implement arb session teardown Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25 20:24   ` kernel test robot
2021-05-25 20:24     ` kernel test robot
2021-05-25 20:24     ` [Intel-gfx] " kernel test robot
2021-05-25  5:47 ` [PATCH v4 10/17] drm/i915/pxp: Implement PXP irq handler Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 16:06   ` Rodrigo Vivi
2021-06-02 16:06     ` Rodrigo Vivi
2021-06-02 16:08   ` Rodrigo Vivi
2021-06-02 16:08     ` Rodrigo Vivi
2021-05-25  5:47 ` [PATCH v4 11/17] drm/i915/pxp: interface for marking contexts as using protected content Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-27 10:10   ` Daniel Vetter
2021-05-27 10:10     ` Daniel Vetter
2021-05-25  5:47 ` [PATCH v4 12/17] drm/i915/pxp: start the arb session on demand Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 18:14   ` Rodrigo Vivi
2021-06-02 18:14     ` Rodrigo Vivi
2021-06-10 22:44     ` Daniele Ceraolo Spurio
2021-06-10 22:44       ` Daniele Ceraolo Spurio
2021-06-11  8:38       ` Rodrigo Vivi
2021-06-11  8:38         ` Rodrigo Vivi
2021-05-25  5:47 ` [PATCH v4 13/17] drm/i915/pxp: Enable PXP power management Daniele Ceraolo Spurio
2021-05-25  5:47   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 16:20   ` Rodrigo Vivi
2021-06-02 16:20     ` [Intel-gfx] " Rodrigo Vivi
2021-06-10 22:58     ` Daniele Ceraolo Spurio
2021-06-10 22:58       ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-11  8:44       ` Rodrigo Vivi
2021-06-11  8:44         ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:48 ` [PATCH v4 14/17] drm/i915/pxp: User interface for Protected buffer Daniele Ceraolo Spurio
2021-05-25  5:48   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25 13:32   ` Daniel Vetter
2021-05-25 13:32     ` [Intel-gfx] " Daniel Vetter
2021-05-27  2:03     ` Daniele Ceraolo Spurio
2021-05-27  2:03       ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25 18:36   ` Tang, CQ
2021-05-25 18:36     ` Tang, CQ
2021-05-27  2:13     ` Daniele Ceraolo Spurio
2021-05-27  2:13       ` Daniele Ceraolo Spurio
2021-05-25  5:48 ` [PATCH v4 15/17] drm/i915/pxp: Add plane decryption support Daniele Ceraolo Spurio
2021-05-25  5:48   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 18:23   ` Rodrigo Vivi
2021-06-02 18:23     ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:48 ` [PATCH v4 16/17] drm/i915/pxp: black pixels on pxp disabled Daniele Ceraolo Spurio
2021-05-25  5:48   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-06-02 19:00   ` Rodrigo Vivi
2021-06-02 19:00     ` [Intel-gfx] " Rodrigo Vivi
2021-05-25  5:48 ` [PATCH v4 17/17] drm/i915/pxp: enable PXP for integrated Gen12 Daniele Ceraolo Spurio
2021-05-25  5:48   ` [Intel-gfx] " Daniele Ceraolo Spurio
2021-05-25  6:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Introduce Intel PXP Patchwork
2021-05-25  6:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-25  6:23 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2021-05-25  6:42 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-25  8:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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