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From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: <linux-pci@vger.kernel.org>, <linux-cxl@vger.kernel.org>,
	Dan Williams <dan.j.williams@intel.com>,
	Bjorn Helgaas <helgaas@kernel.org>, <ira.weiny@intel.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Ben Widawsky <ben.widawsky@intel.com>,
	Chris Browy <cbrowy@avery-design.com>,
	<linux-acpi@vger.kernel.org>, <alison.schofield@intel.com>,
	<vishal.l.verma@intel.com>, Fangjian <f.fangjian@huawei.com>,
	<linuxarm@huawei.com>
Subject: Re: [PATCH v4 0/5] PCI Data Object Exchange support + CXL CDAT
Date: Thu, 10 Jun 2021 15:30:00 +0100	[thread overview]
Message-ID: <20210610153000.00000739@Huawei.com> (raw)
In-Reply-To: <20210524133938.2815206-1-Jonathan.Cameron@huawei.com>

On Mon, 24 May 2021 21:39:33 +0800
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:

> Series first introduces generic support for DOE mailboxes as defined
> in the ECN to the PCIe r5.0 specification available from the PCI SIG [0]
> 
> A user is then introduced in the form of the table access protocol defined
> in the CXL 2.0 specification [1] used to access the
> Coherent Device Attribute Table (CDAT) defined in [2]
> 
> Finally, in two patches that are not intended for merging, an example
> of a generic IOCTL interface to perform synchronous exchanges from user
> space in a kernel mediated fashion is introduced. The current consensus
> seems in favour of not introducing such an interface, but instead
> providing per protocol interfaces where appropriate. As this code was
> developed in parallel with that discussion and may be of use to someone it
> is included here.
>

Gentle, not particularly urgent, request for review on this set.

I am currently missing ABI docs for the CDAT binary attribute, but
that could be handled in a follow up patch.

Thanks,

Jonathan
 
> Open questions.
> * Do we need to prevent userspace access to the DOE when the kernel is
>   managing it (registered by driver)? Discussion in thread:
>   https://lore.kernel.org/linux-pci/20210419165451.2176200-1-Jonathan.Cameron@huawei.com/
> * Does a generic userspace mediation interface make sense?
>   Currently it seems not, but as it was nearly ready, I've included
>   it in this patch set anyway.
> * Move CXL cdat handling to a separate file, or wait until we can see
>   how it is going to be used?
>   
> Changes since v3
> Thanks to Ira, Bjorn and Dan for feedback.
> * Addition of a generic IOCTL interface and demo program for discussion.
> * Fixed an issue with accidentally disabling interrupts.
> * Ensure IRQ_HANDLED always returned as clearing of BUSY can result
>   in an interrupt, but there is no means of identifying this.
>   The best that can be done is to eat the interrupt.
> * Edited comments to more directly tie them to the code the referred to.
> * Lock scope documentation update.
> * Dropped the CDAT dump to log patch as we are hopefully getting closer
>   to this being applied.
> * Fixed the references to pcie_ missed when renaming to pci_ in v3.
> 
> Set based on cxl/next
> 
> All testing conducted against QEMU emulation of a CXL type 3 device
> in conjunction with DOE mailbox patches v5 [3, 4]
> 
> [0] https://pcisig.com/specifications
> [1] https://www.computeexpresslink.org/download-the-specification
> [2] https://uefi.org/node/4093
> [3] https://lore.kernel.org/qemu-devel/20210202005948.241655-1-ben.widawsky@intel.com/
> [4] https://lore.kernel.org/qemu-devel/1619454964-10190-1-git-send-email-cbrowy@avery-design.com/
> 
> Jonathan Cameron (5):
>   PCI: Add vendor ID for the PCI SIG
>   PCI/DOE: Add Data Object Exchange support
>   cxl/mem: Add CDAT table reading from DOE
>   DONOTMERGE PCI/DOE Add per DOE chrdev for ioctl based access
>   DONOTMERGE: PCI/DOE: Add userspace example program to tools/pci
> 
>  drivers/cxl/Kconfig           |   1 +
>  drivers/cxl/cxl.h             |  21 +
>  drivers/cxl/mem.c             | 174 ++++++++
>  drivers/cxl/mem.h             |   6 +
>  drivers/pci/Kconfig           |   8 +
>  drivers/pci/Makefile          |   1 +
>  drivers/pci/doe.c             | 794 ++++++++++++++++++++++++++++++++++
>  drivers/pci/pci-driver.c      |   3 +-
>  include/linux/pci-doe.h       | 100 +++++
>  include/linux/pci.h           |   3 +
>  include/linux/pci_ids.h       |   1 +
>  include/uapi/linux/pci_doe.h  |  32 ++
>  include/uapi/linux/pci_regs.h |  29 +-
>  tools/pci/Build               |   1 +
>  tools/pci/Makefile            |   9 +-
>  tools/pci/doetest.c           | 131 ++++++
>  16 files changed, 1311 insertions(+), 3 deletions(-)
>  create mode 100644 drivers/pci/doe.c
>  create mode 100644 include/linux/pci-doe.h
>  create mode 100644 include/uapi/linux/pci_doe.h
>  create mode 100644 tools/pci/doetest.c
> 
> 
> base-commit: 35c32e3095d396c750f5cdfdaa94cba83d9b23c6


      parent reply	other threads:[~2021-06-10 14:30 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24 13:39 Jonathan Cameron
2021-05-24 13:39 ` [PATCH v4 1/5] PCI: Add vendor ID for the PCI SIG Jonathan Cameron
2021-06-10 15:17   ` Dan Williams
2021-06-10 17:39     ` Jonathan Cameron
2021-06-10 20:10       ` Dan Williams
2021-05-24 13:39 ` [PATCH v4 2/5] PCI/DOE: Add Data Object Exchange support Jonathan Cameron
2021-06-10 20:06   ` Dan Williams
2021-07-07 19:54     ` Dan Williams
2021-07-08  8:48       ` Lorenzo Pieralisi
2021-07-08 17:28         ` Jonathan Cameron
2021-05-24 13:39 ` [PATCH v4 3/5] cxl/mem: Add CDAT table reading from DOE Jonathan Cameron
2021-06-10 21:46   ` Dan Williams
2021-05-24 13:39 ` [PATCH v4 4/5] DONOTMERGE: PCI/DOE: Add per DOE chrdev for ioctl based access Jonathan Cameron
2021-05-25 10:26   ` kernel test robot
2021-05-24 13:39 ` [PATCH v4 5/5] DONOTMERGE: PCI/DOE: Add userspace example program to tools/pci Jonathan Cameron
2021-06-10 14:30 ` Jonathan Cameron [this message]

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