* [Intel-gfx] [CI 0/4] Pipe DMC bits
@ 2021-06-21 19:14 Anusha Srivatsa
2021-06-21 19:14 ` [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN Anusha Srivatsa
` (7 more replies)
0 siblings, 8 replies; 10+ messages in thread
From: Anusha Srivatsa @ 2021-06-21 19:14 UTC (permalink / raw)
To: intel-gfx
One change from previous verison is a fix of SKL
regression. Corner cases for stepping-substepping
combination was missing from fw_info_matches_stepping()
helper. Luckily SKL was the only platform in CI that came
under this category and DMC refused to load.
v2: SKL fix tested on SKL.
v3: Minor changes in Pipe DMC plugging patch
as suggested by Lucas
v4: Remove the sanity check for MMIO that no longer
apply to newer platforms.(Anusha)
Anusha Srivatsa (4):
drm/i915/dmc: Introduce DMC_FW_MAIN
drm/i915/xelpd: Pipe A DMC plugging
drm/i915/adl_p: Pipe B DMC Support
drm/i915/adl_p: Load DMC
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_power.c | 5 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 165 ++++++++++--------
drivers/gpu/drm/i915/display/intel_dmc.h | 23 ++-
drivers/gpu/drm/i915/i915_reg.h | 2 +-
5 files changed, 123 insertions(+), 78 deletions(-)
--
2.32.0
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^ permalink raw reply [flat|nested] 10+ messages in thread* [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa @ 2021-06-21 19:14 ` Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 2/4] drm/i915/xelpd: Pipe A DMC plugging Anusha Srivatsa ` (6 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Anusha Srivatsa @ 2021-06-21 19:14 UTC (permalink / raw) To: intel-gfx This is a prep patch for Pipe DMC plugging. Add dmc_info struct in intel_dmc to have all common fields shared between all DMC's in the package. Add DMC_FW_MAIN(dmc_id 0) to refer to the blob. v2: Remove dmc_offset and start_mmioaddr from dmc_info struct (Jose) Cc: Souza, Jose <jose.souza@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/display/intel_dmc.c | 38 +++++++++++++----------- drivers/gpu/drm/i915/display/intel_dmc.h | 18 +++++++---- 2 files changed, 33 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 97308da28059..269a57d936ab 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -239,7 +239,7 @@ struct stepping_info { bool intel_dmc_has_payload(struct drm_i915_private *i915) { - return i915->dmc.dmc_payload; + return i915->dmc.dmc_info[DMC_FW_MAIN].payload; } static const struct stepping_info skl_stepping_info[] = { @@ -316,7 +316,8 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv) */ void intel_dmc_load_program(struct drm_i915_private *dev_priv) { - u32 *payload = dev_priv->dmc.dmc_payload; + struct intel_dmc *dmc = &dev_priv->dmc; + struct dmc_fw_info *dmc_info = &dmc->dmc_info[DMC_FW_MAIN]; u32 i, fw_size; if (!HAS_DMC(dev_priv)) { @@ -325,26 +326,26 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) return; } - if (!intel_dmc_has_payload(dev_priv)) { + if (!dev_priv->dmc.dmc_info[DMC_FW_MAIN].payload) { drm_err(&dev_priv->drm, "Tried to program CSR with empty payload\n"); return; } - fw_size = dev_priv->dmc.dmc_fw_size; + fw_size = dmc_info->dmc_fw_size; assert_rpm_wakelock_held(&dev_priv->runtime_pm); preempt_disable(); for (i = 0; i < fw_size; i++) intel_uncore_write_fw(&dev_priv->uncore, DMC_PROGRAM(i), - payload[i]); + dmc_info->payload[i]); preempt_enable(); - for (i = 0; i < dev_priv->dmc.mmio_count; i++) { - intel_de_write(dev_priv, dev_priv->dmc.mmioaddr[i], - dev_priv->dmc.mmiodata[i]); + for (i = 0; i < dmc_info->mmio_count; i++) { + intel_de_write(dev_priv, dmc_info->mmioaddr[i], + dmc_info->mmiodata[i]); } dev_priv->dmc.dc_state = 0; @@ -401,13 +402,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, size_t rem_size) { struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); + struct dmc_fw_info *dmc_info = &dmc->dmc_info[DMC_FW_MAIN]; unsigned int header_len_bytes, dmc_header_size, payload_size, i; const u32 *mmioaddr, *mmiodata; u32 mmio_count, mmio_count_max; u8 *payload; - BUILD_BUG_ON(ARRAY_SIZE(dmc->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || - ARRAY_SIZE(dmc->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); + BUILD_BUG_ON(ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || + ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V1_MAX_MMIO_COUNT); /* * Check if we can access common fields, we will checkc again below @@ -469,10 +471,10 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, mmioaddr[i]); return 0; } - dmc->mmioaddr[i] = _MMIO(mmioaddr[i]); - dmc->mmiodata[i] = mmiodata[i]; + dmc_info->mmioaddr[i] = _MMIO(mmioaddr[i]); + dmc_info->mmiodata[i] = mmiodata[i]; } - dmc->mmio_count = mmio_count; + dmc_info->mmio_count = mmio_count; rem_size -= header_len_bytes; @@ -485,14 +487,14 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, drm_err(&i915->drm, "DMC FW too big (%u bytes)\n", payload_size); return 0; } - dmc->dmc_fw_size = dmc_header->fw_size; + dmc_info->dmc_fw_size = dmc_header->fw_size; - dmc->dmc_payload = kmalloc(payload_size, GFP_KERNEL); - if (!dmc->dmc_payload) + dmc_info->payload = kmalloc(payload_size, GFP_KERNEL); + if (!dmc_info->payload) return 0; payload = (u8 *)(dmc_header) + header_len_bytes; - memcpy(dmc->dmc_payload, payload, payload_size); + memcpy(dmc_info->payload, payload, payload_size); return header_len_bytes + payload_size; @@ -827,5 +829,5 @@ void intel_dmc_ucode_fini(struct drm_i915_private *dev_priv) intel_dmc_ucode_suspend(dev_priv); drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref); - kfree(dev_priv->dmc.dmc_payload); + kfree(dev_priv->dmc.dmc_info[DMC_FW_MAIN].payload); } diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 4c22f567b61b..b872f3a4fd03 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -16,17 +16,25 @@ struct drm_i915_private; #define DMC_VERSION_MAJOR(version) ((version) >> 16) #define DMC_VERSION_MINOR(version) ((version) & 0xffff) +enum { + DMC_FW_MAIN = 0, + DMC_FW_MAX +}; + struct intel_dmc { struct work_struct work; const char *fw_path; u32 required_version; u32 max_fw_size; /* bytes */ - u32 *dmc_payload; - u32 dmc_fw_size; /* dwords */ u32 version; - u32 mmio_count; - i915_reg_t mmioaddr[20]; - u32 mmiodata[20]; + struct dmc_fw_info { + u32 mmio_count; + i915_reg_t mmioaddr[20]; + u32 mmiodata[20]; + u32 dmc_fw_size; /*dwords */ + u32 *payload; + } dmc_info[DMC_FW_MAX]; + u32 dc_state; u32 target_dc_state; u32 allowed_dc_mask; -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [CI 2/4] drm/i915/xelpd: Pipe A DMC plugging 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN Anusha Srivatsa @ 2021-06-21 19:14 ` Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support Anusha Srivatsa ` (5 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Anusha Srivatsa @ 2021-06-21 19:14 UTC (permalink / raw) To: intel-gfx This patch adds Pipe A plumbing to the already existing parsing and loading functions which is taken care of in the prep patches. Adding MAX_DMC_FW to keep track for both Main and Pipe A DMC while loading the respective blobs. Also adding present field in dmc_info. s/find_dmc_fw_offset/csr_set_dmc_fw_offset. While at it add fw_info_matches_stepping() helper. CSR_PROGRAM() should now take the starting address of the particular blob (Main or Pipe) and not hardcode it. v2: Add dmc_offset and start_mmioaddr fields for dmc_info struct. v3: Add a missing corner cases of stepping-substepping combination in fw_info_matches_stepping() helper. v4: Add macro for start_mmioaddr for V1 package. Simplify code in dmc_set_fw_offset (Lucas) Cc: Souza, Jose <jose.souza@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- .../drm/i915/display/intel_display_debugfs.c | 4 +- .../drm/i915/display/intel_display_power.c | 5 +- drivers/gpu/drm/i915/display/intel_dmc.c | 131 ++++++++++-------- drivers/gpu/drm/i915/display/intel_dmc.h | 4 + drivers/gpu/drm/i915/i915_reg.h | 2 +- 5 files changed, 85 insertions(+), 61 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 88bb05d5c483..2a1c39a0e56e 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -544,6 +544,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused) seq_printf(m, "fw loaded: %s\n", yesno(intel_dmc_has_payload(dev_priv))); seq_printf(m, "path: %s\n", dmc->fw_path); + seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12)); + seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload)); if (!intel_dmc_has_payload(dev_priv)) goto out; @@ -582,7 +584,7 @@ static int i915_dmc_info(struct seq_file *m, void *unused) out: seq_printf(m, "program base: 0x%08x\n", - intel_de_read(dev_priv, DMC_PROGRAM(0))); + intel_de_read(dev_priv, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0))); seq_printf(m, "ssp base: 0x%08x\n", intel_de_read(dev_priv, DMC_SSP_BASE)); seq_printf(m, "htp: 0x%08x\n", intel_de_read(dev_priv, DMC_HTP_SKL)); diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c index 4298ae684d7d..285380079aab 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power.c +++ b/drivers/gpu/drm/i915/display/intel_display_power.c @@ -961,8 +961,9 @@ static void bxt_disable_dc9(struct drm_i915_private *dev_priv) static void assert_dmc_loaded(struct drm_i915_private *dev_priv) { drm_WARN_ONCE(&dev_priv->drm, - !intel_de_read(dev_priv, DMC_PROGRAM(0)), - "DMC program storage start is NULL\n"); + !intel_de_read(dev_priv, + DMC_PROGRAM(dev_priv->dmc.dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)), + "DMC program storage start is NULL\n"); drm_WARN_ONCE(&dev_priv->drm, !intel_de_read(dev_priv, DMC_SSP_BASE), "DMC SSP Base Not fine\n"); drm_WARN_ONCE(&dev_priv->drm, !intel_de_read(dev_priv, DMC_HTP_SKL), diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 269a57d936ab..18e0d225a478 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -96,6 +96,7 @@ MODULE_FIRMWARE(BXT_DMC_PATH); #define PACKAGE_V2_MAX_FW_INFO_ENTRIES 32 #define DMC_V1_MAX_MMIO_COUNT 8 #define DMC_V3_MAX_MMIO_COUNT 20 +#define DMC_V1_MMIO_START_RANGE 0x80000 struct intel_css_header { /* 0x09 for DMC */ @@ -317,8 +318,7 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv) void intel_dmc_load_program(struct drm_i915_private *dev_priv) { struct intel_dmc *dmc = &dev_priv->dmc; - struct dmc_fw_info *dmc_info = &dmc->dmc_info[DMC_FW_MAIN]; - u32 i, fw_size; + u32 id, i; if (!HAS_DMC(dev_priv)) { drm_err(&dev_priv->drm, @@ -332,20 +332,25 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) return; } - fw_size = dmc_info->dmc_fw_size; assert_rpm_wakelock_held(&dev_priv->runtime_pm); preempt_disable(); - for (i = 0; i < fw_size; i++) - intel_uncore_write_fw(&dev_priv->uncore, DMC_PROGRAM(i), - dmc_info->payload[i]); + for (id = 0; id < DMC_FW_MAX; id++) { + for (i = 0; i < dmc->dmc_info[id].dmc_fw_size; i++) { + intel_uncore_write_fw(&dev_priv->uncore, + DMC_PROGRAM(dmc->dmc_info[id].start_mmioaddr, i), + dmc->dmc_info[id].payload[i]); + } + } preempt_enable(); - for (i = 0; i < dmc_info->mmio_count; i++) { - intel_de_write(dev_priv, dmc_info->mmioaddr[i], - dmc_info->mmiodata[i]); + for (id = 0; id < DMC_FW_MAX; id++) { + for (i = 0; i < dmc->dmc_info[id].mmio_count; i++) { + intel_de_write(dev_priv, dmc->dmc_info[id].mmioaddr[i], + dmc->dmc_info[id].mmiodata[i]); + } } dev_priv->dmc.dc_state = 0; @@ -353,59 +358,68 @@ void intel_dmc_load_program(struct drm_i915_private *dev_priv) gen9_set_dc_state_debugmask(dev_priv); } +static bool fw_info_matches_stepping(const struct intel_fw_info *fw_info, + const struct stepping_info *si) +{ + if ((fw_info->substepping == '*' && si->stepping == fw_info->stepping) || + (si->stepping == fw_info->stepping && si->substepping == fw_info->substepping) || + /* + * If we don't find a more specific one from above two checks, we + * then check for the generic one to be sure to work even with + * "broken firmware" + */ + (si->stepping == '*' && si->substepping == fw_info->substepping) || + (fw_info->stepping == '*' && fw_info->substepping == '*')) + return true; + + return false; +} + /* * Search fw_info table for dmc_offset to find firmware binary: num_entries is * already sanitized. */ -static u32 find_dmc_fw_offset(const struct intel_fw_info *fw_info, +static void dmc_set_fw_offset(struct intel_dmc *dmc, + const struct intel_fw_info *fw_info, unsigned int num_entries, const struct stepping_info *si, u8 package_ver) { - u32 dmc_offset = DMC_DEFAULT_FW_OFFSET; - unsigned int i; + unsigned int i, id; + + struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); for (i = 0; i < num_entries; i++) { - if (package_ver > 1 && fw_info[i].dmc_id != 0) - continue; + id = package_ver <= 1 ? DMC_FW_MAIN : fw_info[i].dmc_id; - if (fw_info[i].substepping == '*' && - si->stepping == fw_info[i].stepping) { - dmc_offset = fw_info[i].offset; - break; + if (id >= DMC_FW_MAX) { + drm_dbg(&i915->drm, "Unsupported firmware id: %u\n", id); + continue; } - if (si->stepping == fw_info[i].stepping && - si->substepping == fw_info[i].substepping) { - dmc_offset = fw_info[i].offset; - break; - } + /* More specific versions come first, so we don't even have to + * check for the stepping since we already found a previous FW + * for this id. + */ + if (dmc->dmc_info[id].present) + continue; - if (fw_info[i].stepping == '*' && - fw_info[i].substepping == '*') { - /* - * In theory we should stop the search as generic - * entries should always come after the more specific - * ones, but let's continue to make sure to work even - * with "broken" firmwares. If we don't find a more - * specific one, then we use this entry - */ - dmc_offset = fw_info[i].offset; + if (fw_info_matches_stepping(&fw_info[i], si)) { + dmc->dmc_info[id].present = true; + dmc->dmc_info[id].dmc_offset = fw_info[i].offset; } } - - return dmc_offset; } static u32 parse_dmc_fw_header(struct intel_dmc *dmc, const struct intel_dmc_header_base *dmc_header, - size_t rem_size) + size_t rem_size, u8 dmc_id) { struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); - struct dmc_fw_info *dmc_info = &dmc->dmc_info[DMC_FW_MAIN]; + struct dmc_fw_info *dmc_info = &dmc->dmc_info[dmc_id]; unsigned int header_len_bytes, dmc_header_size, payload_size, i; const u32 *mmioaddr, *mmiodata; - u32 mmio_count, mmio_count_max; + u32 mmio_count, mmio_count_max, start_mmioaddr; u8 *payload; BUILD_BUG_ON(ARRAY_SIZE(dmc_info->mmioaddr) < DMC_V3_MAX_MMIO_COUNT || @@ -432,6 +446,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, mmio_count_max = DMC_V3_MAX_MMIO_COUNT; /* header_len is in dwords */ header_len_bytes = dmc_header->header_len * 4; + start_mmioaddr = v3->start_mmioaddr; dmc_header_size = sizeof(*v3); } else if (dmc_header->header_ver == 1) { const struct intel_dmc_header_v1 *v1 = @@ -445,6 +460,7 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, mmio_count = v1->mmio_count; mmio_count_max = DMC_V1_MAX_MMIO_COUNT; header_len_bytes = dmc_header->header_len; + start_mmioaddr = DMC_V1_MMIO_START_RANGE; dmc_header_size = sizeof(*v1); } else { drm_err(&i915->drm, "Unknown DMC fw header version: %u\n", @@ -465,16 +481,11 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc, } for (i = 0; i < mmio_count; i++) { - if (mmioaddr[i] < DMC_MMIO_START_RANGE || - mmioaddr[i] > DMC_MMIO_END_RANGE) { - drm_err(&i915->drm, "DMC firmware has wrong mmio address 0x%x\n", - mmioaddr[i]); - return 0; - } dmc_info->mmioaddr[i] = _MMIO(mmioaddr[i]); dmc_info->mmiodata[i] = mmiodata[i]; } dmc_info->mmio_count = mmio_count; + dmc_info->start_mmioaddr = start_mmioaddr; rem_size -= header_len_bytes; @@ -511,7 +522,7 @@ parse_dmc_fw_package(struct intel_dmc *dmc, { struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc); u32 package_size = sizeof(struct intel_package_header); - u32 num_entries, max_entries, dmc_offset; + u32 num_entries, max_entries; const struct intel_fw_info *fw_info; if (rem_size < package_size) @@ -547,16 +558,11 @@ parse_dmc_fw_package(struct intel_dmc *dmc, fw_info = (const struct intel_fw_info *) ((u8 *)package_header + sizeof(*package_header)); - dmc_offset = find_dmc_fw_offset(fw_info, num_entries, si, - package_header->header_ver); - if (dmc_offset == DMC_DEFAULT_FW_OFFSET) { - drm_err(&i915->drm, "DMC firmware not supported for %c stepping\n", - si->stepping); - return 0; - } + dmc_set_fw_offset(dmc, fw_info, num_entries, si, + package_header->header_ver); /* dmc_offset is in dwords */ - return package_size + dmc_offset * 4; + return package_size; error_truncated: drm_err(&i915->drm, "Truncated DMC firmware, refusing.\n"); @@ -608,7 +614,8 @@ static void parse_dmc_fw(struct drm_i915_private *dev_priv, struct intel_dmc *dmc = &dev_priv->dmc; const struct stepping_info *si = intel_get_stepping_info(dev_priv); u32 readcount = 0; - u32 r; + u32 r, offset; + int id; if (!fw) return; @@ -629,9 +636,19 @@ static void parse_dmc_fw(struct drm_i915_private *dev_priv, readcount += r; - /* Extract dmc_header information */ - dmc_header = (struct intel_dmc_header_base *)&fw->data[readcount]; - parse_dmc_fw_header(dmc, dmc_header, fw->size - readcount); + for (id = 0; id < DMC_FW_MAX; id++) { + if (!dev_priv->dmc.dmc_info[id].present) + continue; + + offset = readcount + dmc->dmc_info[id].dmc_offset * 4; + if (fw->size - offset < 0) { + drm_err(&dev_priv->drm, "Reading beyond the fw_size\n"); + continue; + } + + dmc_header = (struct intel_dmc_header_base *)&fw->data[offset]; + parse_dmc_fw_header(dmc, dmc_header, fw->size - offset, id); + } } static void intel_dmc_runtime_pm_get(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index b872f3a4fd03..007a284b0ef0 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -18,6 +18,7 @@ struct drm_i915_private; enum { DMC_FW_MAIN = 0, + DMC_FW_PIPEA, DMC_FW_MAX }; @@ -31,8 +32,11 @@ struct intel_dmc { u32 mmio_count; i915_reg_t mmioaddr[20]; u32 mmiodata[20]; + u32 dmc_offset; + u32 start_mmioaddr; u32 dmc_fw_size; /*dwords */ u32 *payload; + bool present; } dmc_info[DMC_FW_MAX]; u32 dc_state; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 955027799d1d..c857fafb8a30 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7751,7 +7751,7 @@ enum { #define GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED (3 << 0) /* icl + */ /* DMC */ -#define DMC_PROGRAM(i) _MMIO(0x80000 + (i) * 4) +#define DMC_PROGRAM(addr, i) _MMIO((addr) + (i) * 4) #define DMC_SSP_BASE_ADDR_GEN9 0x00002FC0 #define DMC_HTP_ADDR_SKL 0x00500034 #define DMC_SSP_BASE _MMIO(0x8F074) -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 2/4] drm/i915/xelpd: Pipe A DMC plugging Anusha Srivatsa @ 2021-06-21 19:14 ` Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa ` (4 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Anusha Srivatsa @ 2021-06-21 19:14 UTC (permalink / raw) To: intel-gfx ADLP requires us to load both Pipe A and Pipe B. Plug Pipe B loading support. Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 2 ++ drivers/gpu/drm/i915/display/intel_dmc.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 2a1c39a0e56e..db38891a9ef0 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -546,6 +546,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused) seq_printf(m, "path: %s\n", dmc->fw_path); seq_printf(m, "Pipe A fw support: %s\n", yesno(INTEL_GEN(dev_priv) >= 12)); seq_printf(m, "Pipe A fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEA].payload)); + seq_printf(m, "Pipe B fw support: %s\n", yesno(IS_ALDERLAKE_P(dev_priv))); + seq_printf(m, "Pipe B fw loaded: %s\n", yesno(dmc->dmc_info[DMC_FW_PIPEB].payload)); if (!intel_dmc_has_payload(dev_priv)) goto out; diff --git a/drivers/gpu/drm/i915/display/intel_dmc.h b/drivers/gpu/drm/i915/display/intel_dmc.h index 007a284b0ef0..c3c00ff03869 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.h +++ b/drivers/gpu/drm/i915/display/intel_dmc.h @@ -19,6 +19,7 @@ struct drm_i915_private; enum { DMC_FW_MAIN = 0, DMC_FW_PIPEA, + DMC_FW_PIPEB, DMC_FW_MAX }; -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa ` (2 preceding siblings ...) 2021-06-21 19:14 ` [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support Anusha Srivatsa @ 2021-06-21 19:14 ` Anusha Srivatsa 2021-06-21 19:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC bits Patchwork ` (3 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Anusha Srivatsa @ 2021-06-21 19:14 UTC (permalink / raw) To: intel-gfx Load DMC v2.10 on ADLP. The release notes mention that this version enables few power savings features. v2: Add DMC_PATH() for ADLP (Lucas) Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/display/intel_dmc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 18e0d225a478..f8789d4543bf 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -45,6 +45,10 @@ #define GEN12_DMC_MAX_FW_SIZE ICL_DMC_MAX_FW_SIZE +#define ADLP_DMC_PATH DMC_PATH(adlp, 2, 10) +#define ADLP_DMC_VERSION_REQUIRED DMC_VERSION(2, 10) +MODULE_FIRMWARE(ADLP_DMC_PATH); + #define ADLS_DMC_PATH DMC_PATH(adls, 2, 01) #define ADLS_DMC_VERSION_REQUIRED DMC_VERSION(2, 1) MODULE_FIRMWARE(ADLS_DMC_PATH); @@ -724,7 +728,11 @@ void intel_dmc_ucode_init(struct drm_i915_private *dev_priv) */ intel_dmc_runtime_pm_get(dev_priv); - if (IS_ALDERLAKE_S(dev_priv)) { + if (IS_ALDERLAKE_P(dev_priv)) { + dmc->fw_path = ADLP_DMC_PATH; + dmc->required_version = ADLP_DMC_VERSION_REQUIRED; + dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; + } else if (IS_ALDERLAKE_S(dev_priv)) { dmc->fw_path = ADLS_DMC_PATH; dmc->required_version = ADLS_DMC_VERSION_REQUIRED; dmc->max_fw_size = GEN12_DMC_MAX_FW_SIZE; -- 2.32.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC bits 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa ` (3 preceding siblings ...) 2021-06-21 19:14 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa @ 2021-06-21 19:31 ` Patchwork 2021-06-21 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork ` (2 subsequent siblings) 7 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-06-21 19:31 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: Pipe DMC bits URL : https://patchwork.freedesktop.org/series/91746/ State : warning == Summary == $ dim checkpatch origin/drm-tip 81c0a903179b drm/i915/dmc: Introduce DMC_FW_MAIN 2dc1d7a2161e drm/i915/xelpd: Pipe A DMC plugging -:49: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #49: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs.c:587: + intel_de_read(dev_priv, DMC_PROGRAM(dmc->dmc_info[DMC_FW_MAIN].start_mmioaddr, 0))); -:64: WARNING:LONG_LINE: line length of 105 exceeds 100 columns #64: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:965: + DMC_PROGRAM(dev_priv->dmc.dmc_info[DMC_FW_MAIN].start_mmioaddr, 0)), total: 0 errors, 2 warnings, 0 checks, 287 lines checked b3db0b3770f8 drm/i915/adl_p: Pipe B DMC Support 162182d31dc0 drm/i915/adl_p: Load DMC _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Pipe DMC bits 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa ` (4 preceding siblings ...) 2021-06-21 19:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC bits Patchwork @ 2021-06-21 19:32 ` Patchwork 2021-06-21 19:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-06-21 21:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 7 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-06-21 19:32 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: Pipe DMC bits URL : https://patchwork.freedesktop.org/series/91746/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/display/intel_display.c:1893:21: expected struct i915_vma *[assigned] vma +drivers/gpu/drm/i915/display/intel_display.c:1893:21: got void [noderef] __iomem *[assigned] iomem +drivers/gpu/drm/i915/display/intel_display.c:1893:21: warning: incorrect type in assignment (different address spaces) +drivers/gpu/drm/i915/gem/i915_gem_ttm.c:733:38: warning: symbol 'i915_gem_ttm_obj_ops' was not declared. Should it be static? +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1396:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block +drivers/gpu/drm/i915/gt/intel_ring_submission.c:1207:24: warning: Using plain integer as NULL pointer +drivers/gpu/drm/i915/i915_perf.c:1434:15: warning: memset with byte count of 16777216 +drivers/gpu/drm/i915/i915_perf.c:1488:15: warning: memset with byte count of 16777216 +./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative (-262080) +./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative (-262080) +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block +./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Pipe DMC bits 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa ` (5 preceding siblings ...) 2021-06-21 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork @ 2021-06-21 19:46 ` Patchwork 2021-06-21 21:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 7 siblings, 0 replies; 10+ messages in thread From: Patchwork @ 2021-06-21 19:46 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 1307 bytes --] == Series Details == Series: Pipe DMC bits URL : https://patchwork.freedesktop.org/series/91746/ State : success == Summary == CI Bug Log - changes from CI_DRM_10256 -> Patchwork_20421 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/index.html Changes ------- No changes found Participating hosts (44 -> 38) ------------------------------ Missing (6): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-cfl-8700k fi-ctg-p8600 fi-bdw-samus Build changes ------------- * Linux: CI_DRM_10256 -> Patchwork_20421 CI-20190529: 20190529 CI_DRM_10256: 2a5df66b6597af17e2c3e3fff1a2271a6079412b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6115: 4ef420186b82f1a6d9c9b69d2f8de4fd100a2af3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_20421: 162182d31dc0abc9864acaba856737f63bb766aa @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 162182d31dc0 drm/i915/adl_p: Load DMC b3db0b3770f8 drm/i915/adl_p: Pipe B DMC Support 2dc1d7a2161e drm/i915/xelpd: Pipe A DMC plugging 81c0a903179b drm/i915/dmc: Introduce DMC_FW_MAIN == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/index.html [-- Attachment #1.2: Type: text/html, Size: 1896 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Pipe DMC bits 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa ` (6 preceding siblings ...) 2021-06-21 19:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-06-21 21:30 ` Patchwork 2021-06-21 23:32 ` Srivatsa, Anusha 7 siblings, 1 reply; 10+ messages in thread From: Patchwork @ 2021-06-21 21:30 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 9748 bytes --] == Series Details == Series: Pipe DMC bits URL : https://patchwork.freedesktop.org/series/91746/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10256_full -> Patchwork_20421_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_20421_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20421_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_20421_full: ### IGT changes ### #### Possible regressions #### * igt@kms_big_fb@y-tiled-16bpp-rotate-180: - shard-iclb: NOTRUN -> [DMESG-WARN][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-iclb4/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html - shard-tglb: NOTRUN -> [DMESG-WARN][2] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-tglb8/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html Known issues ------------ Here are the changes found in Patchwork_20421_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@kms_big_fb@y-tiled-16bpp-rotate-180: - shard-glk: NOTRUN -> [DMESG-WARN][3] ([i915#1610]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-glk7/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html - shard-kbl: NOTRUN -> [DMESG-WARN][4] ([i915#1610]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-kbl3/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html - shard-skl: NOTRUN -> [DMESG-WARN][5] ([i915#1610]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-skl9/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html * igt@kms_color_chamelium@pipe-a-ctm-0-75: - shard-apl: NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-0-75.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt: - shard-apl: NOTRUN -> [SKIP][7] ([fdo#109271]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: - shard-apl: NOTRUN -> [DMESG-WARN][8] ([i915#1610]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@kms_pipe_crc_basic@hang-read-crc-pipe-c.html * igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm: - shard-snb: NOTRUN -> [SKIP][9] ([fdo#109271]) +4 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-snb6/igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm.html #### Warnings #### * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-apl: [DMESG-WARN][10] ([i915#1610]) -> [DMESG-WARN][11] ([i915#1610] / [i915#180]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html - shard-kbl: [DMESG-WARN][12] ([i915#1610]) -> [DMESG-WARN][13] ([i915#1610] / [i915#180]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@runner@aborted: - shard-apl: ([FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18], [FAIL][19], [FAIL][20], [FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25], [FAIL][26], [FAIL][27], [FAIL][28], [FAIL][29], [FAIL][30], [FAIL][31], [FAIL][32], [FAIL][33]) ([fdo#109271] / [i915#1610] / [i915#1814] / [i915#2426] / [i915#3363]) -> ([FAIL][34], [FAIL][35], [FAIL][36], [FAIL][37], [FAIL][38], [FAIL][39], [FAIL][40], [FAIL][41], [FAIL][42], [FAIL][43], [FAIL][44], [FAIL][45], [FAIL][46], [FAIL][47], [FAIL][48], [FAIL][49], [FAIL][50], [FAIL][51], [FAIL][52], [FAIL][53], [FAIL][54]) ([fdo#109271] / [i915#1814] / [i915#2426] / [i915#3363]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl3/igt@runner@aborted.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl3/igt@runner@aborted.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_10256 -> Patchwork_20421 CI-20190529: 20190529 CI_DRM_10256: 2a5df66b6597af17e2c3e3fff1a2271a6079412b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6115: 4ef420186b82f1a6d9c9b69d2f8de4fd100a2af3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_20421: 162182d31dc0abc9864acaba856737f63bb766aa @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/index.html [-- Attachment #1.2: Type: text/html, Size: 11762 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Pipe DMC bits 2021-06-21 21:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2021-06-21 23:32 ` Srivatsa, Anusha 0 siblings, 0 replies; 10+ messages in thread From: Srivatsa, Anusha @ 2021-06-21 23:32 UTC (permalink / raw) To: intel-gfx [-- Attachment #1.1: Type: text/plain, Size: 9798 bytes --] From: Patchwork <patchwork@emeril.freedesktop.org> Sent: Monday, June 21, 2021 2:30 PM To: Srivatsa, Anusha <anusha.srivatsa@intel.com> Cc: intel-gfx@lists.freedesktop.org Subject: ✗ Fi.CI.IGT: failure for Pipe DMC bits Patch Details Series: Pipe DMC bits URL: https://patchwork.freedesktop.org/series/91746/ State: failure Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/index.html CI Bug Log - changes from CI_DRM_10256_full -> Patchwork_20421_full Summary FAILURE Serious unknown changes coming with Patchwork_20421_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_20421_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues Here are the unknown changes that may have been introduced in Patchwork_20421_full: IGT changes Possible regressions * igt@kms_big_fb@y-tiled-16bpp-rotate-180: * shard-iclb: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-iclb4/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html> * shard-tglb: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-tglb8/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html> Not related to the changes introduced by this series. Anusha Known issues Here are the changes found in Patchwork_20421_full that come from known issues: IGT changes Issues hit * igt@kms_big_fb@y-tiled-16bpp-rotate-180: * shard-glk: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-glk7/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) * shard-kbl: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-kbl3/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) * shard-skl: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-skl9/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) * igt@kms_color_chamelium@pipe-a-ctm-0-75: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-0-75.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / fdo#111827<https://bugs.freedesktop.org/show_bug.cgi?id=111827>) * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt: * shard-apl: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +1 similar issue * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c: * shard-apl: NOTRUN -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@kms_pipe_crc_basic@hang-read-crc-pipe-c.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) * igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm: * shard-snb: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-snb6/igt@kms_vblank@pipe-a-ts-continuation-modeset-rpm.html> (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +4 similar issues Warnings * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: * shard-apl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610> / i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) * shard-kbl: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610>) -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-kbl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html> (i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610> / i915#180<https://gitlab.freedesktop.org/drm/intel/issues/180>) * igt@runner@aborted: * shard-apl: (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10256/shard-apl8/igt@runner@aborted.html>) (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#1610<https://gitlab.freedesktop.org/drm/intel/issues/1610> / i915#1814<https://gitlab.freedesktop.org/drm/intel/issues/1814> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / i915#3363<https://gitlab.freedesktop.org/drm/intel/issues/3363>) -> (FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl1/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl2/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl8/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl3/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl7/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html>, FAIL<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20421/shard-apl6/igt@runner@aborted.html>) (fdo#109271<https://bugs.freedesktop.org/show_bug.cgi?id=109271> / i915#1814<https://gitlab.freedesktop.org/drm/intel/issues/1814> / i915#2426<https://gitlab.freedesktop.org/drm/intel/issues/2426> / i915#3363<https://gitlab.freedesktop.org/drm/intel/issues/3363>) Participating hosts (10 -> 10) No changes in participating hosts Build changes * Linux: CI_DRM_10256 -> Patchwork_20421 CI-20190529: 20190529 CI_DRM_10256: 2a5df66b6597af17e2c3e3fff1a2271a6079412b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6115: 4ef420186b82f1a6d9c9b69d2f8de4fd100a2af3 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_20421: 162182d31dc0abc9864acaba856737f63bb766aa @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit [-- Attachment #1.2: Type: text/html, Size: 26467 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-06-21 23:32 UTC | newest] Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-06-21 19:14 [Intel-gfx] [CI 0/4] Pipe DMC bits Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 1/4] drm/i915/dmc: Introduce DMC_FW_MAIN Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 2/4] drm/i915/xelpd: Pipe A DMC plugging Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 3/4] drm/i915/adl_p: Pipe B DMC Support Anusha Srivatsa 2021-06-21 19:14 ` [Intel-gfx] [CI 4/4] drm/i915/adl_p: Load DMC Anusha Srivatsa 2021-06-21 19:31 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Pipe DMC bits Patchwork 2021-06-21 19:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2021-06-21 19:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-06-21 21:30 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-06-21 23:32 ` Srivatsa, Anusha
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