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* [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
@ 2021-07-07 10:53 ` Uwe Kleine-König
  0 siblings, 0 replies; 8+ messages in thread
From: Uwe Kleine-König @ 2021-07-07 10:53 UTC (permalink / raw)
  To: Shawn Guo
  Cc: Rob Herring, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team, devicetree, linux-arm-kernel

The nodes after the root nodes are supposed to be ordered
alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
proper place.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 144 +++++++++----------
 1 file changed, 72 insertions(+), 72 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 7b99fad6e4d6..4122323d3ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -67,20 +67,6 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
 	};
 };
 
-&flexcan1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan1>;
-	xceiver-supply = <&reg_can1_stby>;
-	status = "okay";
-};
-
-&flexcan2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan2>;
-	xceiver-supply = <&reg_can2_stby>;
-	status = "disabled";/* can2 pin conflict with pdm */
-};
-
 &eqos {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_eqos>;
@@ -124,6 +110,20 @@ ethphy1: ethernet-phy@1 {
 	};
 };
 
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	xceiver-supply = <&reg_can1_stby>;
+	status = "okay";
+};
+
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	xceiver-supply = <&reg_can2_stby>;
+	status = "disabled";/* can2 pin conflict with pdm */
+};
+
 &i2c1 {
 	clock-frequency = <400000>;
 	pinctrl-names = "default";
@@ -224,64 +224,6 @@ pca6416: gpio@20 {
 	};
 };
 
-&snvs_pwrkey {
-	status = "okay";
-};
-
-&uart2 {
-	/* console */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-	status = "okay";
-};
-
-&usb3_phy1 {
-	status = "okay";
-};
-
-&usb3_1 {
-	status = "okay";
-};
-
-&usb_dwc3_1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usb1_vbus>;
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usdhc2 {
-	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
-	assigned-clock-rates = <400000000>;
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-	vmmc-supply = <&reg_usdhc2_vmmc>;
-	bus-width = <4>;
-	status = "okay";
-};
-
-&usdhc3 {
-	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
-	assigned-clock-rates = <400000000>;
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc3>;
-	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-&wdog1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_wdog>;
-	fsl,ext-reset-output;
-	status = "okay";
-};
-
 &iomuxc {
 	pinctrl_eqos: eqosgrp {
 		fsl,pins = <
@@ -490,3 +432,61 @@ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166
 		>;
 	};
 };
+
+&snvs_pwrkey {
+	status = "okay";
+};
+
+&uart2 {
+	/* console */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb1_vbus>;
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usdhc2 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&usdhc3 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
-- 
2.30.2


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
@ 2021-07-07 10:53 ` Uwe Kleine-König
  0 siblings, 0 replies; 8+ messages in thread
From: Uwe Kleine-König @ 2021-07-07 10:53 UTC (permalink / raw)
  To: Shawn Guo
  Cc: Rob Herring, Pengutronix Kernel Team, Fabio Estevam,
	NXP Linux Team, devicetree, linux-arm-kernel

The nodes after the root nodes are supposed to be ordered
alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
proper place.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 144 +++++++++----------
 1 file changed, 72 insertions(+), 72 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
index 7b99fad6e4d6..4122323d3ea3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
@@ -67,20 +67,6 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
 	};
 };
 
-&flexcan1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan1>;
-	xceiver-supply = <&reg_can1_stby>;
-	status = "okay";
-};
-
-&flexcan2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_flexcan2>;
-	xceiver-supply = <&reg_can2_stby>;
-	status = "disabled";/* can2 pin conflict with pdm */
-};
-
 &eqos {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_eqos>;
@@ -124,6 +110,20 @@ ethphy1: ethernet-phy@1 {
 	};
 };
 
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	xceiver-supply = <&reg_can1_stby>;
+	status = "okay";
+};
+
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	xceiver-supply = <&reg_can2_stby>;
+	status = "disabled";/* can2 pin conflict with pdm */
+};
+
 &i2c1 {
 	clock-frequency = <400000>;
 	pinctrl-names = "default";
@@ -224,64 +224,6 @@ pca6416: gpio@20 {
 	};
 };
 
-&snvs_pwrkey {
-	status = "okay";
-};
-
-&uart2 {
-	/* console */
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-	status = "okay";
-};
-
-&usb3_phy1 {
-	status = "okay";
-};
-
-&usb3_1 {
-	status = "okay";
-};
-
-&usb_dwc3_1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usb1_vbus>;
-	dr_mode = "host";
-	status = "okay";
-};
-
-&usdhc2 {
-	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
-	assigned-clock-rates = <400000000>;
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
-	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
-	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
-	vmmc-supply = <&reg_usdhc2_vmmc>;
-	bus-width = <4>;
-	status = "okay";
-};
-
-&usdhc3 {
-	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
-	assigned-clock-rates = <400000000>;
-	pinctrl-names = "default", "state_100mhz", "state_200mhz";
-	pinctrl-0 = <&pinctrl_usdhc3>;
-	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
-	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
-	bus-width = <8>;
-	non-removable;
-	status = "okay";
-};
-
-&wdog1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_wdog>;
-	fsl,ext-reset-output;
-	status = "okay";
-};
-
 &iomuxc {
 	pinctrl_eqos: eqosgrp {
 		fsl,pins = <
@@ -490,3 +432,61 @@ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166
 		>;
 	};
 };
+
+&snvs_pwrkey {
+	status = "okay";
+};
+
+&uart2 {
+	/* console */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb3_1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb1_vbus>;
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usdhc2 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	bus-width = <4>;
+	status = "okay";
+};
+
+&usdhc3 {
+	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
+	assigned-clock-rates = <400000000>;
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
-- 
2.30.2


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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
  2021-07-07 10:53 ` Uwe Kleine-König
@ 2021-07-07 11:06   ` Ahmad Fatoum
  -1 siblings, 0 replies; 8+ messages in thread
From: Ahmad Fatoum @ 2021-07-07 11:06 UTC (permalink / raw)
  To: Uwe Kleine-König, Shawn Guo
  Cc: devicetree, Rob Herring, NXP Linux Team, Pengutronix Kernel Team,
	Fabio Estevam, linux-arm-kernel

On 07.07.21 12:53, Uwe Kleine-König wrote:
> The nodes after the root nodes are supposed to be ordered
> alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> proper place.

At least for i.MX, it seems to be convention to have iomuxc at the end
of the file. I'd not reorder it, file is easier to browse when it's not
in the middle.

> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 144 +++++++++----------
>  1 file changed, 72 insertions(+), 72 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 7b99fad6e4d6..4122323d3ea3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -67,20 +67,6 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>  	};
>  };
>  
> -&flexcan1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_flexcan1>;
> -	xceiver-supply = <&reg_can1_stby>;
> -	status = "okay";
> -};
> -
> -&flexcan2 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_flexcan2>;
> -	xceiver-supply = <&reg_can2_stby>;
> -	status = "disabled";/* can2 pin conflict with pdm */
> -};
> -
>  &eqos {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_eqos>;
> @@ -124,6 +110,20 @@ ethphy1: ethernet-phy@1 {
>  	};
>  };
>  
> +&flexcan1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan1>;
> +	xceiver-supply = <&reg_can1_stby>;
> +	status = "okay";
> +};
> +
> +&flexcan2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan2>;
> +	xceiver-supply = <&reg_can2_stby>;
> +	status = "disabled";/* can2 pin conflict with pdm */
> +};
> +
>  &i2c1 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
> @@ -224,64 +224,6 @@ pca6416: gpio@20 {
>  	};
>  };
>  
> -&snvs_pwrkey {
> -	status = "okay";
> -};
> -
> -&uart2 {
> -	/* console */
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_uart2>;
> -	status = "okay";
> -};
> -
> -&usb3_phy1 {
> -	status = "okay";
> -};
> -
> -&usb3_1 {
> -	status = "okay";
> -};
> -
> -&usb_dwc3_1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_usb1_vbus>;
> -	dr_mode = "host";
> -	status = "okay";
> -};
> -
> -&usdhc2 {
> -	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> -	assigned-clock-rates = <400000000>;
> -	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> -	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> -	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> -	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> -	vmmc-supply = <&reg_usdhc2_vmmc>;
> -	bus-width = <4>;
> -	status = "okay";
> -};
> -
> -&usdhc3 {
> -	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> -	assigned-clock-rates = <400000000>;
> -	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -	pinctrl-0 = <&pinctrl_usdhc3>;
> -	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> -	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> -	bus-width = <8>;
> -	non-removable;
> -	status = "okay";
> -};
> -
> -&wdog1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_wdog>;
> -	fsl,ext-reset-output;
> -	status = "okay";
> -};
> -
>  &iomuxc {
>  	pinctrl_eqos: eqosgrp {
>  		fsl,pins = <
> @@ -490,3 +432,61 @@ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166
>  		>;
>  	};
>  };
> +
> +&snvs_pwrkey {
> +	status = "okay";
> +};
> +
> +&uart2 {
> +	/* console */
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart2>;
> +	status = "okay";
> +};
> +
> +&usb3_phy1 {
> +	status = "okay";
> +};
> +
> +&usb3_1 {
> +	status = "okay";
> +};
> +
> +&usb_dwc3_1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb1_vbus>;
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usdhc2 {
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> +	assigned-clock-rates = <400000000>;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> +	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> +	vmmc-supply = <&reg_usdhc2_vmmc>;
> +	bus-width = <4>;
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> +	assigned-clock-rates = <400000000>;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +	bus-width = <8>;
> +	non-removable;
> +	status = "okay";
> +};
> +
> +&wdog1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdog>;
> +	fsl,ext-reset-output;
> +	status = "okay";
> +};
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
@ 2021-07-07 11:06   ` Ahmad Fatoum
  0 siblings, 0 replies; 8+ messages in thread
From: Ahmad Fatoum @ 2021-07-07 11:06 UTC (permalink / raw)
  To: Uwe Kleine-König, Shawn Guo
  Cc: devicetree, Rob Herring, NXP Linux Team, Pengutronix Kernel Team,
	Fabio Estevam, linux-arm-kernel

On 07.07.21 12:53, Uwe Kleine-König wrote:
> The nodes after the root nodes are supposed to be ordered
> alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> proper place.

At least for i.MX, it seems to be convention to have iomuxc at the end
of the file. I'd not reorder it, file is easier to browse when it's not
in the middle.

> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 144 +++++++++----------
>  1 file changed, 72 insertions(+), 72 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> index 7b99fad6e4d6..4122323d3ea3 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> @@ -67,20 +67,6 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>  	};
>  };
>  
> -&flexcan1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_flexcan1>;
> -	xceiver-supply = <&reg_can1_stby>;
> -	status = "okay";
> -};
> -
> -&flexcan2 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_flexcan2>;
> -	xceiver-supply = <&reg_can2_stby>;
> -	status = "disabled";/* can2 pin conflict with pdm */
> -};
> -
>  &eqos {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_eqos>;
> @@ -124,6 +110,20 @@ ethphy1: ethernet-phy@1 {
>  	};
>  };
>  
> +&flexcan1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan1>;
> +	xceiver-supply = <&reg_can1_stby>;
> +	status = "okay";
> +};
> +
> +&flexcan2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan2>;
> +	xceiver-supply = <&reg_can2_stby>;
> +	status = "disabled";/* can2 pin conflict with pdm */
> +};
> +
>  &i2c1 {
>  	clock-frequency = <400000>;
>  	pinctrl-names = "default";
> @@ -224,64 +224,6 @@ pca6416: gpio@20 {
>  	};
>  };
>  
> -&snvs_pwrkey {
> -	status = "okay";
> -};
> -
> -&uart2 {
> -	/* console */
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_uart2>;
> -	status = "okay";
> -};
> -
> -&usb3_phy1 {
> -	status = "okay";
> -};
> -
> -&usb3_1 {
> -	status = "okay";
> -};
> -
> -&usb_dwc3_1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_usb1_vbus>;
> -	dr_mode = "host";
> -	status = "okay";
> -};
> -
> -&usdhc2 {
> -	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> -	assigned-clock-rates = <400000000>;
> -	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> -	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> -	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> -	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> -	vmmc-supply = <&reg_usdhc2_vmmc>;
> -	bus-width = <4>;
> -	status = "okay";
> -};
> -
> -&usdhc3 {
> -	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> -	assigned-clock-rates = <400000000>;
> -	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> -	pinctrl-0 = <&pinctrl_usdhc3>;
> -	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> -	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> -	bus-width = <8>;
> -	non-removable;
> -	status = "okay";
> -};
> -
> -&wdog1 {
> -	pinctrl-names = "default";
> -	pinctrl-0 = <&pinctrl_wdog>;
> -	fsl,ext-reset-output;
> -	status = "okay";
> -};
> -
>  &iomuxc {
>  	pinctrl_eqos: eqosgrp {
>  		fsl,pins = <
> @@ -490,3 +432,61 @@ MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B	0x166
>  		>;
>  	};
>  };
> +
> +&snvs_pwrkey {
> +	status = "okay";
> +};
> +
> +&uart2 {
> +	/* console */
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_uart2>;
> +	status = "okay";
> +};
> +
> +&usb3_phy1 {
> +	status = "okay";
> +};
> +
> +&usb3_1 {
> +	status = "okay";
> +};
> +
> +&usb_dwc3_1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_usb1_vbus>;
> +	dr_mode = "host";
> +	status = "okay";
> +};
> +
> +&usdhc2 {
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
> +	assigned-clock-rates = <400000000>;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
> +	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
> +	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
> +	vmmc-supply = <&reg_usdhc2_vmmc>;
> +	bus-width = <4>;
> +	status = "okay";
> +};
> +
> +&usdhc3 {
> +	assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
> +	assigned-clock-rates = <400000000>;
> +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> +	pinctrl-0 = <&pinctrl_usdhc3>;
> +	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
> +	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
> +	bus-width = <8>;
> +	non-removable;
> +	status = "okay";
> +};
> +
> +&wdog1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_wdog>;
> +	fsl,ext-reset-output;
> +	status = "okay";
> +};
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
  2021-07-07 11:06   ` Ahmad Fatoum
@ 2021-07-07 12:04     ` Fabio Estevam
  -1 siblings, 0 replies; 8+ messages in thread
From: Fabio Estevam @ 2021-07-07 12:04 UTC (permalink / raw)
  To: Ahmad Fatoum
  Cc: Uwe Kleine-König, Shawn Guo,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, NXP Linux Team, Pengutronix Kernel Team,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE

Hi Ahmad,

On Wed, Jul 7, 2021 at 8:06 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
>
> On 07.07.21 12:53, Uwe Kleine-König wrote:
> > The nodes after the root nodes are supposed to be ordered
> > alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> > proper place.
>
> At least for i.MX, it seems to be convention to have iomuxc at the end
> of the file. I'd not reorder it, file is easier to browse when it's not
> in the middle.

Yes, agree. Thanks

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
@ 2021-07-07 12:04     ` Fabio Estevam
  0 siblings, 0 replies; 8+ messages in thread
From: Fabio Estevam @ 2021-07-07 12:04 UTC (permalink / raw)
  To: Ahmad Fatoum
  Cc: Uwe Kleine-König, Shawn Guo,
	open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	Rob Herring, NXP Linux Team, Pengutronix Kernel Team,
	moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE

Hi Ahmad,

On Wed, Jul 7, 2021 at 8:06 AM Ahmad Fatoum <a.fatoum@pengutronix.de> wrote:
>
> On 07.07.21 12:53, Uwe Kleine-König wrote:
> > The nodes after the root nodes are supposed to be ordered
> > alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> > proper place.
>
> At least for i.MX, it seems to be convention to have iomuxc at the end
> of the file. I'd not reorder it, file is easier to browse when it's not
> in the middle.

Yes, agree. Thanks

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
  2021-07-07 11:06   ` Ahmad Fatoum
@ 2021-07-07 13:54     ` Uwe Kleine-König
  -1 siblings, 0 replies; 8+ messages in thread
From: Uwe Kleine-König @ 2021-07-07 13:54 UTC (permalink / raw)
  To: Ahmad Fatoum
  Cc: Shawn Guo, devicetree, Rob Herring, NXP Linux Team,
	Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel

[-- Attachment #1: Type: text/plain, Size: 1576 bytes --]

Hello Ahmad,

On Wed, Jul 07, 2021 at 01:06:19PM +0200, Ahmad Fatoum wrote:
> On 07.07.21 12:53, Uwe Kleine-König wrote:
> > The nodes after the root nodes are supposed to be ordered
> > alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> > proper place.
> 
> At least for i.MX, it seems to be convention to have iomuxc at the end
> of the file.

Oh, that's news to me. Looking at next/master and the output of

$ for f in $(git grep -l \&iomux arch/arm/boot/dts/imx* arch/arm64/boot/dts/freescale/*); do awk '/^&/ { handle = $1; } END { if ( handle == "&iomuxc" ) { print "end" } else { print "middle" } }' "$f"; done | sort | uniq -c
    158 end
    143 middle

(i.e. among the files that have a &iomux node, iomuxc is at the end for
158, and for 143 is isn't)

So that convention is either new or not very binding.

Note: In the end case there are a few (e.g.
arch/arm/boot/dts/imx6qdl-pico-dwarf.dtsi and
arch/arm/boot/dts/imx6qdl-pico-pi.dtsi) where iomuxc is at the end and
the file is sorted.

> I'd not reorder it, file is easier to browse when it's not in the
> middle.

Seems to be subjective :-)
I would consider it easier to browse if each pinmux define would be near
the device node that makes use of it, but iomuxc being at the end
doesn't have an advantage for me.

I don't feel like resending to only fix the flexcan ordering.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically
@ 2021-07-07 13:54     ` Uwe Kleine-König
  0 siblings, 0 replies; 8+ messages in thread
From: Uwe Kleine-König @ 2021-07-07 13:54 UTC (permalink / raw)
  To: Ahmad Fatoum
  Cc: Shawn Guo, devicetree, Rob Herring, NXP Linux Team,
	Pengutronix Kernel Team, Fabio Estevam, linux-arm-kernel


[-- Attachment #1.1: Type: text/plain, Size: 1576 bytes --]

Hello Ahmad,

On Wed, Jul 07, 2021 at 01:06:19PM +0200, Ahmad Fatoum wrote:
> On 07.07.21 12:53, Uwe Kleine-König wrote:
> > The nodes after the root nodes are supposed to be ordered
> > alphabetically. So move &flexcan1, &flexcan2 and &pinctrl to their
> > proper place.
> 
> At least for i.MX, it seems to be convention to have iomuxc at the end
> of the file.

Oh, that's news to me. Looking at next/master and the output of

$ for f in $(git grep -l \&iomux arch/arm/boot/dts/imx* arch/arm64/boot/dts/freescale/*); do awk '/^&/ { handle = $1; } END { if ( handle == "&iomuxc" ) { print "end" } else { print "middle" } }' "$f"; done | sort | uniq -c
    158 end
    143 middle

(i.e. among the files that have a &iomux node, iomuxc is at the end for
158, and for 143 is isn't)

So that convention is either new or not very binding.

Note: In the end case there are a few (e.g.
arch/arm/boot/dts/imx6qdl-pico-dwarf.dtsi and
arch/arm/boot/dts/imx6qdl-pico-pi.dtsi) where iomuxc is at the end and
the file is sorted.

> I'd not reorder it, file is easier to browse when it's not in the
> middle.

Seems to be subjective :-)
I would consider it easier to browse if each pinmux define would be near
the device node that makes use of it, but iomuxc being at the end
doesn't have an advantage for me.

I don't feel like resending to only fix the flexcan ordering.

Best regards
Uwe

-- 
Pengutronix e.K.                           | Uwe Kleine-König            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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_______________________________________________
linux-arm-kernel mailing list
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2021-07-07 13:56 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-07 10:53 [PATCH] arm64: freescale/imx8mp-evk.dts: reorder nodes alphabetically Uwe Kleine-König
2021-07-07 10:53 ` Uwe Kleine-König
2021-07-07 11:06 ` Ahmad Fatoum
2021-07-07 11:06   ` Ahmad Fatoum
2021-07-07 12:04   ` Fabio Estevam
2021-07-07 12:04     ` Fabio Estevam
2021-07-07 13:54   ` Uwe Kleine-König
2021-07-07 13:54     ` Uwe Kleine-König

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