From: Kefeng Wang <wangkefeng.wang@huawei.com>
To: <palmerdabbelt@google.com>, <paul.walmsley@sifive.com>,
<palmer@dabbelt.com>, <linux-riscv@lists.infradead.org>
Cc: Kefeng Wang <wangkefeng.wang@huawei.com>
Subject: [PATCH 1/3] riscv: Allow forced irq threading
Date: Thu, 8 Jul 2021 09:59:47 +0800 [thread overview]
Message-ID: <20210708015949.20076-2-wangkefeng.wang@huawei.com> (raw)
In-Reply-To: <20210708015949.20076-1-wangkefeng.wang@huawei.com>
The timer interrupt and the perf interrupt on riscv are with
IRQF_PERCPU, so it's safe to allow forced interrupt threading.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
---
arch/riscv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 469a70bd8da6..6356c14240c9 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -91,6 +91,7 @@ config RISCV
select HAVE_STACKPROTECTOR
select HAVE_SYSCALL_TRACEPOINTS
select IRQ_DOMAIN
+ select IRQ_FORCED_THREADING
select MODULES_USE_ELF_RELA if MODULES
select MODULE_SECTIONS if MODULES
select OF
--
2.26.2
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next prev parent reply other threads:[~2021-07-08 1:53 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 1:59 [PATCH 0/3] riscv: Enable some feature for RISCV Kefeng Wang
2021-07-08 1:59 ` Kefeng Wang [this message]
2021-07-08 5:28 ` [PATCH 1/3] riscv: Allow forced irq threading Christoph Hellwig
2021-07-08 6:42 ` Kefeng Wang
2021-08-04 20:33 ` Palmer Dabbelt
2021-07-08 1:59 ` [PATCH 2/3] riscv: Enable idle generic idle loop Kefeng Wang
2021-07-08 1:59 ` [PATCH 3/3] riscv: Enable GENERIC_IRQ_SHOW_LEVEL Kefeng Wang
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