From: Christoph Hellwig <hch@infradead.org>
To: Kefeng Wang <wangkefeng.wang@huawei.com>
Cc: palmerdabbelt@google.com, paul.walmsley@sifive.com,
palmer@dabbelt.com, linux-riscv@lists.infradead.org
Subject: Re: [PATCH 1/3] riscv: Allow forced irq threading
Date: Thu, 8 Jul 2021 06:28:21 +0100 [thread overview]
Message-ID: <YOaM9bfqZiU386T7@infradead.org> (raw)
In-Reply-To: <20210708015949.20076-2-wangkefeng.wang@huawei.com>
On Thu, Jul 08, 2021 at 09:59:47AM +0800, Kefeng Wang wrote:
> The timer interrupt and the perf interrupt on riscv are with
> IRQF_PERCPU, so it's safe to allow forced interrupt threading.
"Architecture code needs to select CONFIG_IRQ_FORCED_THREADING after
marking the interrupts which cant be threaded IRQF_NO_THREAD.
All interrupts which have IRQF_TIMER set are implict marked
IRQF_NO_THREAD. Also all PER_CPU interrupts are excluded."
Did you do that audit?
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next prev parent reply other threads:[~2021-07-08 5:29 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 1:59 [PATCH 0/3] riscv: Enable some feature for RISCV Kefeng Wang
2021-07-08 1:59 ` [PATCH 1/3] riscv: Allow forced irq threading Kefeng Wang
2021-07-08 5:28 ` Christoph Hellwig [this message]
2021-07-08 6:42 ` Kefeng Wang
2021-08-04 20:33 ` Palmer Dabbelt
2021-07-08 1:59 ` [PATCH 2/3] riscv: Enable idle generic idle loop Kefeng Wang
2021-07-08 1:59 ` [PATCH 3/3] riscv: Enable GENERIC_IRQ_SHOW_LEVEL Kefeng Wang
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