* [PATCH v2] arm64: dts: imx8qm: add compatible string for usdhc3
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
add compatible string for usdhc3
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 00ae820d5175..8c33edf0744f 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -19,3 +19,7 @@
&usdhc2 {
compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
};
+
+&usdhc3 {
+ compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
+};
--
2.17.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8qm: enabled watchdog
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
enable the watchdog
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
need to enable CONFIG_IMX_SC_WDT
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 87a4c3ec8861..b822f95f9baf 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -169,6 +169,11 @@
};
+ watchdog {
+ compatible = "fsl,imx8qm-sc-wdt", "fsl,imx-sc-wdt";
+ timeout-sec = <60>;
+ };
+
/* sorted in register address */
#include "imx8-ss-dma.dtsi"
#include "imx8-ss-conn.dtsi"
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8qm: enabled watchdog
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
enable the watchdog
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
need to enable CONFIG_IMX_SC_WDT
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 87a4c3ec8861..b822f95f9baf 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -169,6 +169,11 @@
};
+ watchdog {
+ compatible = "fsl,imx8qm-sc-wdt", "fsl,imx-sc-wdt";
+ timeout-sec = <60>;
+ };
+
/* sorted in register address */
#include "imx8-ss-dma.dtsi"
#include "imx8-ss-conn.dtsi"
--
2.17.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v1] arm64: dts: imx8qm: added System MMU
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added node for System MMU
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 7efc0add74ea..fa827ed04e09 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -140,6 +140,23 @@
method = "smc";
};
+ smmu: iommu@51400000 {
+ compatible = "arm,mmu-500";
+ interrupt-parent = <&gic>;
+ reg = <0 0x51400000 0 0x40000>;
+ #global-interrupts = <1>;
+ #iommu-cells = <2>;
+ interrupts = <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8qm: added System MMU
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added node for System MMU
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 7efc0add74ea..fa827ed04e09 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -140,6 +140,23 @@
method = "smc";
};
+ smmu: iommu@51400000 {
+ compatible = "arm,mmu-500";
+ interrupt-parent = <&gic>;
+ reg = <0 0x51400000 0 0x40000>;
+ #global-interrupts = <1>;
+ #iommu-cells = <2>;
+ interrupts = <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
+ <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH v1] arm64: dts: imx8qm: added System MMU
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 14:37 ` Robin Murphy
-1 siblings, 0 replies; 18+ messages in thread
From: Robin Murphy @ 2021-07-14 14:37 UTC (permalink / raw)
To: Oliver Graute, shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Rob Herring,
Sascha Hauer, Sascha Hauer, Fabio Estevam, NXP Linux Team,
linux-arm-kernel, linux-kernel
On 2021-07-14 13:09, Oliver Graute wrote:
> added node for System MMU
Note that it's a bit of a dangerous game to enable an SMMU without the
complete Stream ID topology for *all* its upstream devices also
described, since CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT will ruin
peoples' day. It might be more polite to add it in a disabled state
until every "iommus" property has been filled in, so that people who do
want to play with it for specific devices in the meantime can easily
just flip the status (while taking the necessary precautions), but
people who don't care won't be inadvertently affected regardless of
their kernel config. I'm assuming an SMMU with 32 contexts has more than
a single USB controller behind it...
Robin.
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Dong Aisheng <aisheng.dong@nxp.com>
>
> Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
> ---
> arch/arm64/boot/dts/freescale/imx8qm.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> index 7efc0add74ea..fa827ed04e09 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> @@ -140,6 +140,23 @@
> method = "smc";
> };
>
> + smmu: iommu@51400000 {
> + compatible = "arm,mmu-500";
> + interrupt-parent = <&gic>;
> + reg = <0 0x51400000 0 0x40000>;
> + #global-interrupts = <1>;
> + #iommu-cells = <2>;
> + interrupts = <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
> + };
> +
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v1] arm64: dts: imx8qm: added System MMU
@ 2021-07-14 14:37 ` Robin Murphy
0 siblings, 0 replies; 18+ messages in thread
From: Robin Murphy @ 2021-07-14 14:37 UTC (permalink / raw)
To: Oliver Graute, shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Rob Herring,
Sascha Hauer, Sascha Hauer, Fabio Estevam, NXP Linux Team,
linux-arm-kernel, linux-kernel
On 2021-07-14 13:09, Oliver Graute wrote:
> added node for System MMU
Note that it's a bit of a dangerous game to enable an SMMU without the
complete Stream ID topology for *all* its upstream devices also
described, since CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT will ruin
peoples' day. It might be more polite to add it in a disabled state
until every "iommus" property has been filled in, so that people who do
want to play with it for specific devices in the meantime can easily
just flip the status (while taking the necessary precautions), but
people who don't care won't be inadvertently affected regardless of
their kernel config. I'm assuming an SMMU with 32 contexts has more than
a single USB controller behind it...
Robin.
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Sascha Hauer <kernel@pengutronix.de>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Dong Aisheng <aisheng.dong@nxp.com>
>
> Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
> ---
> arch/arm64/boot/dts/freescale/imx8qm.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> index 7efc0add74ea..fa827ed04e09 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
> @@ -140,6 +140,23 @@
> method = "smc";
> };
>
> + smmu: iommu@51400000 {
> + compatible = "arm,mmu-500";
> + interrupt-parent = <&gic>;
> + reg = <0 0x51400000 0 0x40000>;
> + #global-interrupts = <1>;
> + #iommu-cells = <2>;
> + interrupts = <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
> + };
> +
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* Physical Secure */
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v1] arm64: dts: imx8qm: added System MMU
2021-07-14 14:37 ` Robin Murphy
@ 2021-07-15 8:46 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-15 8:46 UTC (permalink / raw)
To: Robin Murphy
Cc: shawnguo, devicetree, aisheng.dong, fabio.estevam, Rob Herring,
Sascha Hauer, Sascha Hauer, Fabio Estevam, NXP Linux Team,
linux-arm-kernel, linux-kernel
On 14/07/21, Robin Murphy wrote:
> On 2021-07-14 13:09, Oliver Graute wrote:
> > added node for System MMU
>
> Note that it's a bit of a dangerous game to enable an SMMU without the
> complete Stream ID topology for *all* its upstream devices also described,
> since CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT will ruin peoples' day. It
> might be more polite to add it in a disabled state until every "iommus"
> property has been filled in, so that people who do want to play with it for
> specific devices in the meantime can easily just flip the status (while
> taking the necessary precautions), but people who don't care won't be
> inadvertently affected regardless of their kernel config. I'm assuming an
> SMMU with 32 contexts has more than a single USB controller behind it...
thx for the explanation. So I will set this node to disabled state in
next version of this patch.
>
> > };
> > + smmu: iommu@51400000 {
> > + compatible = "arm,mmu-500";
> > + interrupt-parent = <&gic>;
> > + reg = <0 0x51400000 0 0x40000>;
> > + #global-interrupts = <1>;
> > + #iommu-cells = <2>;
> > + interrupts = <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
status = "disabled";
> > + };
Best regards,
Oliver
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH v1] arm64: dts: imx8qm: added System MMU
@ 2021-07-15 8:46 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-15 8:46 UTC (permalink / raw)
To: Robin Murphy
Cc: shawnguo, devicetree, aisheng.dong, fabio.estevam, Rob Herring,
Sascha Hauer, Sascha Hauer, Fabio Estevam, NXP Linux Team,
linux-arm-kernel, linux-kernel
On 14/07/21, Robin Murphy wrote:
> On 2021-07-14 13:09, Oliver Graute wrote:
> > added node for System MMU
>
> Note that it's a bit of a dangerous game to enable an SMMU without the
> complete Stream ID topology for *all* its upstream devices also described,
> since CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT will ruin peoples' day. It
> might be more polite to add it in a disabled state until every "iommus"
> property has been filled in, so that people who do want to play with it for
> specific devices in the meantime can easily just flip the status (while
> taking the necessary precautions), but people who don't care won't be
> inadvertently affected regardless of their kernel config. I'm assuming an
> SMMU with 32 contexts has more than a single USB controller behind it...
thx for the explanation. So I will set this node to disabled state in
next version of this patch.
>
> > };
> > + smmu: iommu@51400000 {
> > + compatible = "arm,mmu-500";
> > + interrupt-parent = <&gic>;
> > + reg = <0 0x51400000 0 0x40000>;
> > + #global-interrupts = <1>;
> > + #iommu-cells = <2>;
> > + interrupts = <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>,
> > + <0 32 4>, <0 32 4>, <0 32 4>, <0 32 4>;
status = "disabled";
> > + };
Best regards,
Oliver
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH v1] arm64: dts: imx8qm: added pinctrl for pciea
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added pinctrl for PCI Express
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts b/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
index 331eec2dff01..466f8c5c3705 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
@@ -174,6 +174,14 @@
>;
};
+ pinctrl_pciea: pcieagrp {
+ fsl,pins = <
+ IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x06000021
+ IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021
+ IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x06000021
+ >;
+ };
+
pinctrl_rtc_epson_rx8900: rtc_epson_rx8900_grp {
fsl,pins = <
IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 0xc600004c
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8qm: added pinctrl for pciea
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added pinctrl for PCI Express
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts b/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
index 331eec2dff01..466f8c5c3705 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-rom7720-a1.dts
@@ -174,6 +174,14 @@
>;
};
+ pinctrl_pciea: pcieagrp {
+ fsl,pins = <
+ IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x06000021
+ IMX8QM_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO28 0x04000021
+ IMX8QM_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO29 0x06000021
+ >;
+ };
+
pinctrl_rtc_epson_rx8900: rtc_epson_rx8900_grp {
fsl,pins = <
IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 0xc600004c
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v1] arm64: dts: imx8: added usb nodes to imx8-ss-conn.dtsi
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added usb nodes to imx8-ss-conn.dtsi
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
.../boot/dts/freescale/imx8-ss-conn.dtsi | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index 725349e297be..70778aeaacf0 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -34,6 +34,90 @@ conn_subsys: bus@5b000000 {
clock-output-names = "conn_ipg_clk";
};
+ usb3phy: usb3-phy@5b160000 {
+ compatible = "nxp,salvo-phy";
+ reg = <0x5b160000 0x40000>;
+ clocks = <&usb3_lpcg 4>;
+ clock-names = "salvo_phy_clk";
+ power-domains = <&pd IMX_SC_R_USB_2_PHY>;
+ #phy-cells = <0>;
+ };
+
+ usb2_lpcg: clock-controller@5b270000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x5b270000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&conn_ahb_clk>, <&conn_ipg_clk>;
+ clock-indices = <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>;
+ clock-output-names = "usboh3_ahb_clk",
+ "usboh3_phy_ipg_clk";
+ clock-names = "ahb", "ipg";
+ power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+ };
+
+ usb3_lpcg: clock-controller@5b280000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x5b280000 0x10000>;
+ #clock-cells = <1>;
+ /* bit-offset = <0 4 16 20 24 28>; */
+ clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>,
+ <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>,
+ <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>;
+ clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
+ <&conn_ipg_clk>,
+ <&conn_ipg_clk>,
+ <&conn_ipg_clk>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>;
+ clock-output-names = "usb3_bus_clk",
+ "usb3_lpm_clk",
+ "usb3_ipg_clk",
+ "usb3_core_pclk",
+ "usb3_phy_clk",
+ "usb3_aclk";
+ power-domains = <&pd IMX_SC_R_USB_2_PHY>;
+ };
+
+ usbotg3: usb3@5b110000 {
+ compatible = "fsl,imx8qm-usb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0x5B110000 0x10000>;
+
+ clocks = <&usb3_lpcg IMX_LPCG_CLK_1>,
+ <&usb3_lpcg IMX_LPCG_CLK_0>,
+ <&usb3_lpcg IMX_LPCG_CLK_7>,
+ <&usb3_lpcg IMX_LPCG_CLK_4>,
+ <&usb3_lpcg IMX_LPCG_CLK_5>;
+ clock-names = "usb3_lpm_clk", "usb3_bus_clk", "usb3_aclk",
+ "usb3_ipg_clk", "usb3_core_pclk";
+ assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
+ assigned-clock-rates = <125000000>, <12000000>, <250000000>;
+ power-domains = <&pd IMX_SC_R_USB_2>;
+ status = "disabled";
+
+ usbotg3_cdns3: cdns3 {
+ compatible = "cdns,usb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host", "peripheral", "otg";
+ reg = <0x5B130000 0x10000>, /* memory area for HOST registers */
+ <0x5B140000 0x10000>, /* memory area for DEVICE registers */
+ <0x5B120000 0x10000>; /* memory area for OTG/DRD registers */
+ reg-names = "xhci", "dev", "otg";
+ phys = <&usb3phy>;
+ phy-names = "cdns3,usb2-phy";
+ status = "disabled";
+ };
+ };
+
usdhc1: mmc@5b010000 {
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x5b010000 0x10000>;
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8: added usb nodes to imx8-ss-conn.dtsi
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added usb nodes to imx8-ss-conn.dtsi
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
.../boot/dts/freescale/imx8-ss-conn.dtsi | 84 +++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
index 725349e297be..70778aeaacf0 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
@@ -34,6 +34,90 @@ conn_subsys: bus@5b000000 {
clock-output-names = "conn_ipg_clk";
};
+ usb3phy: usb3-phy@5b160000 {
+ compatible = "nxp,salvo-phy";
+ reg = <0x5b160000 0x40000>;
+ clocks = <&usb3_lpcg 4>;
+ clock-names = "salvo_phy_clk";
+ power-domains = <&pd IMX_SC_R_USB_2_PHY>;
+ #phy-cells = <0>;
+ };
+
+ usb2_lpcg: clock-controller@5b270000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x5b270000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&conn_ahb_clk>, <&conn_ipg_clk>;
+ clock-indices = <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>;
+ clock-output-names = "usboh3_ahb_clk",
+ "usboh3_phy_ipg_clk";
+ clock-names = "ahb", "ipg";
+ power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+ };
+
+ usb3_lpcg: clock-controller@5b280000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x5b280000 0x10000>;
+ #clock-cells = <1>;
+ /* bit-offset = <0 4 16 20 24 28>; */
+ clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>,
+ <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>,
+ <IMX_LPCG_CLK_6>, <IMX_LPCG_CLK_7>;
+ clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
+ <&conn_ipg_clk>,
+ <&conn_ipg_clk>,
+ <&conn_ipg_clk>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>;
+ clock-output-names = "usb3_bus_clk",
+ "usb3_lpm_clk",
+ "usb3_ipg_clk",
+ "usb3_core_pclk",
+ "usb3_phy_clk",
+ "usb3_aclk";
+ power-domains = <&pd IMX_SC_R_USB_2_PHY>;
+ };
+
+ usbotg3: usb3@5b110000 {
+ compatible = "fsl,imx8qm-usb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ reg = <0x5B110000 0x10000>;
+
+ clocks = <&usb3_lpcg IMX_LPCG_CLK_1>,
+ <&usb3_lpcg IMX_LPCG_CLK_0>,
+ <&usb3_lpcg IMX_LPCG_CLK_7>,
+ <&usb3_lpcg IMX_LPCG_CLK_4>,
+ <&usb3_lpcg IMX_LPCG_CLK_5>;
+ clock-names = "usb3_lpm_clk", "usb3_bus_clk", "usb3_aclk",
+ "usb3_ipg_clk", "usb3_core_pclk";
+ assigned-clocks = <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_PER>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MISC>,
+ <&clk IMX_SC_R_USB_2 IMX_SC_PM_CLK_MST_BUS>;
+ assigned-clock-rates = <125000000>, <12000000>, <250000000>;
+ power-domains = <&pd IMX_SC_R_USB_2>;
+ status = "disabled";
+
+ usbotg3_cdns3: cdns3 {
+ compatible = "cdns,usb3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "host", "peripheral", "otg";
+ reg = <0x5B130000 0x10000>, /* memory area for HOST registers */
+ <0x5B140000 0x10000>, /* memory area for DEVICE registers */
+ <0x5B120000 0x10000>; /* memory area for OTG/DRD registers */
+ reg-names = "xhci", "dev", "otg";
+ phys = <&usb3phy>;
+ phy-names = "cdns3,usb2-phy";
+ status = "disabled";
+ };
+ };
+
usdhc1: mmc@5b010000 {
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x5b010000 0x10000>;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v1] arm64: dts: imx8: added usbotg3 node to imx8qm-ss-conn.dtsi
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
set iommus for usbotg3
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 8c33edf0744f..3737dbb49e77 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -23,3 +23,7 @@
&usdhc3 {
compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
};
+
+&usbotg3 {
+ iommus = <&smmu 0x4 0x7f80>;
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8: added usbotg3 node to imx8qm-ss-conn.dtsi
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
set iommus for usbotg3
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
index 8c33edf0744f..3737dbb49e77 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi
@@ -23,3 +23,7 @@
&usdhc3 {
compatible = "fsl,imx8qm-usdhc", "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
};
+
+&usbotg3 {
+ iommus = <&smmu 0x4 0x7f80>;
+};
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH v1] arm64: dts: imx8qm: added usb nodes to imx8qm.dtsi
2021-07-14 12:09 ` Oliver Graute
@ 2021-07-14 12:09 ` Oliver Graute
-1 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added usb nodes to imx8qm.dtsi
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 37 +++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index fd0e706ea011..acaaa1748fd5 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -226,6 +226,43 @@
};
+ usbmisc1: usbmisc@5b0d0200 {
+ #index-cells = <1>;
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx6q-usbmisc";
+ reg = <0 0x5b0d0200 0 0x200>;
+ };
+
+ usbmisc2: usbmisc@5b0e0200 {
+ #index-cells = <1>;
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx6q-usbmisc";
+ reg = <0x0 0x5b0e0200 0x0 0x200>;
+ };
+
+ usbphy1: usbphy@5b100000 {
+ compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy",
+ "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
+ reg = <0 0x5b100000 0 0x1000>;
+ clocks = <&usb2_lpcg 1>;
+ power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+ status = "disabled";
+ };
+
+ usbotg1: usb@5b0d0000 {
+ compatible = "fsl,imx8qm-usb", "fsl,imx7ulp-usb",
+ "fsl,imx27-usb";
+ reg = <0 0x5b0d0000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,usbphy = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ clocks = <&usb2_lpcg 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x10>;
+ rx-burst-size-dword = <0x10>;
+ power-domains = <&pd IMX_SC_R_USB_0>;
+ status = "disabled";
+ };
+
watchdog {
compatible = "fsl,imx8qm-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
--
2.17.1
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH v1] arm64: dts: imx8qm: added usb nodes to imx8qm.dtsi
@ 2021-07-14 12:09 ` Oliver Graute
0 siblings, 0 replies; 18+ messages in thread
From: Oliver Graute @ 2021-07-14 12:09 UTC (permalink / raw)
To: shawnguo
Cc: devicetree, aisheng.dong, fabio.estevam, Oliver Graute,
Rob Herring, Sascha Hauer, Sascha Hauer, Fabio Estevam,
NXP Linux Team, linux-arm-kernel, linux-kernel
added usb nodes to imx8qm.dtsi
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 37 +++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index fd0e706ea011..acaaa1748fd5 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -226,6 +226,43 @@
};
+ usbmisc1: usbmisc@5b0d0200 {
+ #index-cells = <1>;
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx6q-usbmisc";
+ reg = <0 0x5b0d0200 0 0x200>;
+ };
+
+ usbmisc2: usbmisc@5b0e0200 {
+ #index-cells = <1>;
+ compatible = "fsl,imx7ulp-usbmisc", "fsl,imx6q-usbmisc";
+ reg = <0x0 0x5b0e0200 0x0 0x200>;
+ };
+
+ usbphy1: usbphy@5b100000 {
+ compatible = "fsl,imx8qm-usbphy", "fsl,imx7ulp-usbphy",
+ "fsl,imx6ul-usbphy", "fsl,imx23-usbphy";
+ reg = <0 0x5b100000 0 0x1000>;
+ clocks = <&usb2_lpcg 1>;
+ power-domains = <&pd IMX_SC_R_USB_0_PHY>;
+ status = "disabled";
+ };
+
+ usbotg1: usb@5b0d0000 {
+ compatible = "fsl,imx8qm-usb", "fsl,imx7ulp-usb",
+ "fsl,imx27-usb";
+ reg = <0 0x5b0d0000 0 0x200>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,usbphy = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc1 0>;
+ clocks = <&usb2_lpcg 0>;
+ ahb-burst-config = <0x0>;
+ tx-burst-size-dword = <0x10>;
+ rx-burst-size-dword = <0x10>;
+ power-domains = <&pd IMX_SC_R_USB_0>;
+ status = "disabled";
+ };
+
watchdog {
compatible = "fsl,imx8qm-sc-wdt", "fsl,imx-sc-wdt";
timeout-sec = <60>;
--
2.17.1
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