From: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
To: <lukma@denx.de>, <maxims@google.com>, <sjg@chromium.org>,
<u-boot@lists.denx.de>
Cc: <ryan_chen@aspeedtech.com>, <joel@jms.id.au>
Subject: [PATCH v2 06/14] common: fit: Use hash.c to call CRC/SHA function
Date: Fri, 16 Jul 2021 13:55:38 +0800 [thread overview]
Message-ID: <20210716055546.1619-7-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20210716055546.1619-1-chiawei_wang@aspeedtech.com>
From: Joel Stanley <joel@jms.id.au>
Currently the FIT verification calls directly into
SW implemented functions to get a CRC/SHA/MD5 hash.
This patch removes duplcated algorithm lookup and use
hash_lookup_algo to get the hashing function with HW
accelearation supported if configured.
The MD5 direct call remains as it is not included in
the hash lookup table of hash.c.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
common/image-fit.c | 35 ++++++++++-------------------------
1 file changed, 10 insertions(+), 25 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index 0c5a05948d..e52ff47bc3 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1196,7 +1196,7 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
* calculate_hash - calculate and return hash for provided input data
* @data: pointer to the input data
* @data_len: data length
- * @algo: requested hash algorithm
+ * @algo_name: requested hash algorithm
* @value: pointer to the char, will hold hash value data (caller must
* allocate enough free space)
* value_len: length of the calculated hash
@@ -1210,37 +1210,22 @@ int fit_set_timestamp(void *fit, int noffset, time_t timestamp)
* 0, on success
* -1, when algo is unsupported
*/
-int calculate_hash(const void *data, int data_len, const char *algo,
- uint8_t *value, int *value_len)
+int calculate_hash(const void *data, int data_len, const char *algo_name,
+ uint8_t *value, int *value_len)
{
- if (IMAGE_ENABLE_CRC32 && strcmp(algo, "crc32") == 0) {
- *((uint32_t *)value) = crc32_wd(0, data, data_len,
- CHUNKSZ_CRC32);
- *((uint32_t *)value) = cpu_to_uimage(*((uint32_t *)value));
- *value_len = 4;
- } else if (IMAGE_ENABLE_SHA1 && strcmp(algo, "sha1") == 0) {
- sha1_csum_wd((unsigned char *)data, data_len,
- (unsigned char *)value, CHUNKSZ_SHA1);
- *value_len = 20;
- } else if (IMAGE_ENABLE_SHA256 && strcmp(algo, "sha256") == 0) {
- sha256_csum_wd((unsigned char *)data, data_len,
- (unsigned char *)value, CHUNKSZ_SHA256);
- *value_len = SHA256_SUM_LEN;
- } else if (IMAGE_ENABLE_SHA384 && strcmp(algo, "sha384") == 0) {
- sha384_csum_wd((unsigned char *)data, data_len,
- (unsigned char *)value, CHUNKSZ_SHA384);
- *value_len = SHA384_SUM_LEN;
- } else if (IMAGE_ENABLE_SHA512 && strcmp(algo, "sha512") == 0) {
- sha512_csum_wd((unsigned char *)data, data_len,
- (unsigned char *)value, CHUNKSZ_SHA512);
- *value_len = SHA512_SUM_LEN;
- } else if (IMAGE_ENABLE_MD5 && strcmp(algo, "md5") == 0) {
+ struct hash_algo *algo;
+
+ if (IMAGE_ENABLE_MD5 && strcmp(algo_name, "md5") == 0) {
md5_wd((unsigned char *)data, data_len, value, CHUNKSZ_MD5);
*value_len = 16;
+ } else if (hash_lookup_algo(algo_name, &algo) == 0) {
+ algo->hash_func_ws(data, data_len, value, algo->chunk_size);
+ *value_len = algo->digest_size;
} else {
debug("Unsupported hash alogrithm\n");
return -1;
}
+
return 0;
}
--
2.17.1
next prev parent reply other threads:[~2021-07-16 5:58 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-16 5:55 [PATCH v2 00/14] aspeed: Support secure boot chain with FIT image verification Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 01/14] aspeed: ast2600: Enlarge SRAM size Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 02/14] clk: ast2600: Add YCLK control for HACE Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 03/14] crypto: aspeed: Add AST2600 HACE support Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 04/14] ast2600: spl: Add HACE probing Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 05/14] ARM: dts: ast2600: Add HACE to device tree Chia-Wei Wang
2021-07-16 5:55 ` Chia-Wei Wang [this message]
2021-07-16 5:55 ` [PATCH v2 07/14] clk: ast2600: Add RSACLK control for ARCY Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 08/14] crypto: aspeed: Add AST2600 ARCY support Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 09/14] ast2600: spl: Add ARCY probing Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 10/14] ARM: dts: ast2600: Add ARCY to device tree Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 11/14] ast2600: spl: Locate load buffer in DRAM space Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 12/14] configs: ast2600-evb: Enable SPL FIT support Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 13/14] configs: aspeed: Make EXTRA_ENV_SETTINGS board specific Chia-Wei Wang
2021-07-16 5:55 ` [PATCH v2 14/14] configs: ast2600: Boot kernel FIT in DRAM Chia-Wei Wang
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