All of lore.kernel.org
 help / color / mirror / Atom feed
From: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
To: <lukma@denx.de>, <maxims@google.com>, <sjg@chromium.org>,
	<u-boot@lists.denx.de>
Cc: <ryan_chen@aspeedtech.com>, <joel@jms.id.au>
Subject: [PATCH v2 07/14] clk: ast2600: Add RSACLK control for ARCY
Date: Fri, 16 Jul 2021 13:55:39 +0800	[thread overview]
Message-ID: <20210716055546.1619-8-chiawei_wang@aspeedtech.com> (raw)
In-Reply-To: <20210716055546.1619-1-chiawei_wang@aspeedtech.com>

Add RSACLK enable for ARCY, the HW RSA/ECC crypto engine
of ASPEED AST26xx SoCs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 arch/arm/include/asm/arch-aspeed/scu_ast2600.h |  1 +
 drivers/clk/aspeed/clk_ast2600.c               | 15 +++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
index d7b500f656..27f4e9f994 100644
--- a/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
+++ b/arch/arm/include/asm/arch-aspeed/scu_ast2600.h
@@ -8,6 +8,7 @@
 #define SCU_UNLOCK_KEY			0x1688a8a8
 
 #define SCU_CLKGATE1_EMMC			BIT(27)
+#define SCU_CLKGATE1_ARCY			BIT(24)
 #define SCU_CLKGATE1_MAC2			BIT(21)
 #define SCU_CLKGATE1_MAC1			BIT(20)
 #define SCU_CLKGATE1_USB_HUB			BIT(14)
diff --git a/drivers/clk/aspeed/clk_ast2600.c b/drivers/clk/aspeed/clk_ast2600.c
index 69128fd3c4..bf3379fce2 100644
--- a/drivers/clk/aspeed/clk_ast2600.c
+++ b/drivers/clk/aspeed/clk_ast2600.c
@@ -1030,6 +1030,18 @@ static ulong ast2600_enable_haceclk(struct ast2600_scu *scu)
 	return 0;
 }
 
+static ulong ast2600_enable_rsaclk(struct ast2600_scu *scu)
+{
+	uint32_t clkgate_bit;
+
+	clkgate_bit = SCU_CLKGATE1_ARCY;
+
+	writel(clkgate_bit, &scu->clkgate_clr1);
+	mdelay(20);
+
+	return 0;
+}
+
 static int ast2600_clk_enable(struct clk *clk)
 {
 	struct ast2600_clk_priv *priv = dev_get_priv(clk->dev);
@@ -1071,6 +1083,9 @@ static int ast2600_clk_enable(struct clk *clk)
 	case ASPEED_CLK_GATE_YCLK:
 		ast2600_enable_haceclk(priv->scu);
 		break;
+	case ASPEED_CLK_GATE_RSACLK:
+		ast2600_enable_rsaclk(priv->scu);
+		break;
 	default:
 		pr_err("can't enable clk\n");
 		return -ENOENT;
-- 
2.17.1


  parent reply	other threads:[~2021-07-16  5:57 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-16  5:55 [PATCH v2 00/14] aspeed: Support secure boot chain with FIT image verification Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 01/14] aspeed: ast2600: Enlarge SRAM size Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 02/14] clk: ast2600: Add YCLK control for HACE Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 03/14] crypto: aspeed: Add AST2600 HACE support Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 04/14] ast2600: spl: Add HACE probing Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 05/14] ARM: dts: ast2600: Add HACE to device tree Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 06/14] common: fit: Use hash.c to call CRC/SHA function Chia-Wei Wang
2021-07-16  5:55 ` Chia-Wei Wang [this message]
2021-07-16  5:55 ` [PATCH v2 08/14] crypto: aspeed: Add AST2600 ARCY support Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 09/14] ast2600: spl: Add ARCY probing Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 10/14] ARM: dts: ast2600: Add ARCY to device tree Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 11/14] ast2600: spl: Locate load buffer in DRAM space Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 12/14] configs: ast2600-evb: Enable SPL FIT support Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 13/14] configs: aspeed: Make EXTRA_ENV_SETTINGS board specific Chia-Wei Wang
2021-07-16  5:55 ` [PATCH v2 14/14] configs: ast2600: Boot kernel FIT in DRAM Chia-Wei Wang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210716055546.1619-8-chiawei_wang@aspeedtech.com \
    --to=chiawei_wang@aspeedtech.com \
    --cc=joel@jms.id.au \
    --cc=lukma@denx.de \
    --cc=maxims@google.com \
    --cc=ryan_chen@aspeedtech.com \
    --cc=sjg@chromium.org \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.