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From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>
Subject: [PATCH -fixes 2/3] Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"
Date: Wed, 21 Jul 2021 09:59:36 +0200	[thread overview]
Message-ID: <20210721075937.696811-3-alex@ghiti.fr> (raw)
In-Reply-To: <20210721075937.696811-1-alex@ghiti.fr>

This reverts commit 9b79878ced8f7ab85c57623f8b1f6882e484a316.

The removal of this config exposes CONFIG_PHYS_RAM_BASE for all kernel
types: this value being implementation-specific, this breaks the
genericity of the RISC-V kernel so revert it.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
---
 arch/riscv/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8fcceb8eda07..6a02caf49cde 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -494,8 +494,13 @@ config STACKPROTECTOR_PER_TASK
 	def_bool y
 	depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
 
+config PHYS_RAM_BASE_FIXED
+	bool "Explicitly specified physical RAM address"
+	default n
+
 config PHYS_RAM_BASE
 	hex "Platform Physical RAM address"
+	depends on PHYS_RAM_BASE_FIXED
 	default "0x80000000"
 	help
 	  This is the physical address of RAM in the system. It has to be
@@ -508,6 +513,7 @@ config XIP_KERNEL
 	# This prevents XIP from being enabled by all{yes,mod}config, which
 	# fail to build since XIP doesn't support large kernels.
 	depends on !COMPILE_TEST
+	select PHYS_RAM_BASE_FIXED
 	help
 	  Execute-In-Place allows the kernel to run from non-volatile storage
 	  directly addressable by the CPU, such as NOR flash. This saves RAM
-- 
2.30.2


WARNING: multiple messages have this Message-ID
From: Alexandre Ghiti <alex@ghiti.fr>
To: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: Alexandre Ghiti <alex@ghiti.fr>
Subject: [PATCH -fixes 2/3] Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED"
Date: Wed, 21 Jul 2021 09:59:36 +0200	[thread overview]
Message-ID: <20210721075937.696811-3-alex@ghiti.fr> (raw)
In-Reply-To: <20210721075937.696811-1-alex@ghiti.fr>

This reverts commit 9b79878ced8f7ab85c57623f8b1f6882e484a316.

The removal of this config exposes CONFIG_PHYS_RAM_BASE for all kernel
types: this value being implementation-specific, this breaks the
genericity of the RISC-V kernel so revert it.

Signed-off-by: Alexandre Ghiti <alex@ghiti.fr>
---
 arch/riscv/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 8fcceb8eda07..6a02caf49cde 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -494,8 +494,13 @@ config STACKPROTECTOR_PER_TASK
 	def_bool y
 	depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_TLS
 
+config PHYS_RAM_BASE_FIXED
+	bool "Explicitly specified physical RAM address"
+	default n
+
 config PHYS_RAM_BASE
 	hex "Platform Physical RAM address"
+	depends on PHYS_RAM_BASE_FIXED
 	default "0x80000000"
 	help
 	  This is the physical address of RAM in the system. It has to be
@@ -508,6 +513,7 @@ config XIP_KERNEL
 	# This prevents XIP from being enabled by all{yes,mod}config, which
 	# fail to build since XIP doesn't support large kernels.
 	depends on !COMPILE_TEST
+	select PHYS_RAM_BASE_FIXED
 	help
 	  Execute-In-Place allows the kernel to run from non-volatile storage
 	  directly addressable by the CPU, such as NOR flash. This saves RAM
-- 
2.30.2


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  parent reply	other threads:[~2021-07-21  8:04 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-21  7:59 [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE Alexandre Ghiti
2021-07-21  7:59 ` Alexandre Ghiti
2021-07-21  7:59 ` [PATCH -fixes 1/3] riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion Alexandre Ghiti
2021-07-21  7:59   ` Alexandre Ghiti
2021-07-21  7:59 ` Alexandre Ghiti [this message]
2021-07-21  7:59   ` [PATCH -fixes 2/3] Revert "riscv: Remove CONFIG_PHYS_RAM_BASE_FIXED" Alexandre Ghiti
2021-07-21  7:59 ` [PATCH -fixes 3/3] riscv: Optimize kernel virtual address conversion macro Alexandre Ghiti
2021-07-21  7:59   ` Alexandre Ghiti
2021-08-07 16:36   ` Palmer Dabbelt
2021-08-07 16:36     ` Palmer Dabbelt
2021-08-07 19:31     ` Alex Ghiti
2021-08-07 19:31       ` Alex Ghiti
2021-08-12  5:23       ` Palmer Dabbelt
2021-08-12  5:23         ` Palmer Dabbelt
2021-08-08 12:27   ` Vitaly Wool
2021-08-08 12:27     ` Vitaly Wool
2021-07-21 14:12 ` [PATCH -fixes 0/3] Fixes regarding CONFIG_PHYS_RAM_BASE Emil Renner Berthing
2021-07-21 14:12   ` Emil Renner Berthing
2021-07-22 15:29 ` Jisheng Zhang
2021-07-22 15:29   ` Jisheng Zhang

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