From: kernel test robot <lkp@intel.com>
To: Matthew Brost <matthew.brost@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: kbuild-all@lists.01.org, daniel.vetter@ffwll.ch,
tony.ye@intel.com, zhengguo.xu@intel.com
Subject: Re: [Intel-gfx] [PATCH 24/27] drm/i915: Multi-BB execbuf
Date: Mon, 30 Aug 2021 11:46:52 +0800 [thread overview]
Message-ID: <202108301107.xwzwt2PH-lkp@intel.com> (raw)
In-Reply-To: <20210820224446.30620-25-matthew.brost@intel.com>
[-- Attachment #1: Type: text/plain, Size: 4134 bytes --]
Hi Matthew,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next next-20210827]
[cannot apply to tegra-drm/drm/tegra/for-next linus/master drm/drm-next v5.14]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210821-065348
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel-8.3-kselftests (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-348-gf0e6938b-dirty
# https://github.com/0day-ci/linux/commit/7e7ae2111b2855ac3d63aa5c806c6936daaa6bbc
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210821-065348
git checkout 7e7ae2111b2855ac3d63aa5c806c6936daaa6bbc
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=x86_64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:608:21: sparse: sparse: Using plain integer as NULL pointer
vim +608 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
548
549 static int
550 eb_add_vma(struct i915_execbuffer *eb,
551 unsigned int *current_batch,
552 unsigned int i,
553 struct i915_vma *vma)
554 {
555 struct drm_i915_private *i915 = eb->i915;
556 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
557 struct eb_vma *ev = &eb->vma[i];
558
559 ev->vma = vma;
560 ev->exec = entry;
561 ev->flags = entry->flags;
562
563 if (eb->lut_size > 0) {
564 ev->handle = entry->handle;
565 hlist_add_head(&ev->node,
566 &eb->buckets[hash_32(entry->handle,
567 eb->lut_size)]);
568 }
569
570 if (entry->relocation_count)
571 list_add_tail(&ev->reloc_link, &eb->relocs);
572
573 /*
574 * SNA is doing fancy tricks with compressing batch buffers, which leads
575 * to negative relocation deltas. Usually that works out ok since the
576 * relocate address is still positive, except when the batch is placed
577 * very low in the GTT. Ensure this doesn't happen.
578 *
579 * Note that actual hangs have only been observed on gen7, but for
580 * paranoia do it everywhere.
581 */
582 if (is_batch_buffer(eb, i)) {
583 if (entry->relocation_count &&
584 !(ev->flags & EXEC_OBJECT_PINNED))
585 ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
586 if (eb->reloc_cache.has_fence)
587 ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
588
589 eb->batches[*current_batch] = ev;
590
591 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
592 drm_dbg(&i915->drm,
593 "Attempting to use self-modifying batch buffer\n");
594 return -EINVAL;
595 }
596
597 if (range_overflows_t(u64,
598 eb->batch_start_offset,
599 eb->args->batch_len,
600 ev->vma->size)) {
601 drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
602 return -EINVAL;
603 }
604
605 if (eb->args->batch_len == 0)
606 eb->batch_len[*current_batch] = ev->vma->size -
607 eb->batch_start_offset;
> 608 if (unlikely(eb->batch_len == 0)) { /* impossible! */
609 drm_dbg(&i915->drm, "Invalid batch length\n");
610 return -EINVAL;
611 }
612
613 ++*current_batch;
614 }
615
616 return 0;
617 }
618
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 42173 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [Intel-gfx] [PATCH 24/27] drm/i915: Multi-BB execbuf
Date: Mon, 30 Aug 2021 11:46:52 +0800 [thread overview]
Message-ID: <202108301107.xwzwt2PH-lkp@intel.com> (raw)
In-Reply-To: <20210820224446.30620-25-matthew.brost@intel.com>
[-- Attachment #1: Type: text/plain, Size: 4245 bytes --]
Hi Matthew,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next next-20210827]
[cannot apply to tegra-drm/drm/tegra/for-next linus/master drm/drm-next v5.14]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210821-065348
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel-8.3-kselftests (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce:
# apt-get install sparse
# sparse version: v0.6.3-348-gf0e6938b-dirty
# https://github.com/0day-ci/linux/commit/7e7ae2111b2855ac3d63aa5c806c6936daaa6bbc
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Matthew-Brost/Parallel-submission-aka-multi-bb-execbuf/20210821-065348
git checkout 7e7ae2111b2855ac3d63aa5c806c6936daaa6bbc
# save the attached .config to linux build tree
make W=1 C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=x86_64 SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:608:21: sparse: sparse: Using plain integer as NULL pointer
vim +608 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
548
549 static int
550 eb_add_vma(struct i915_execbuffer *eb,
551 unsigned int *current_batch,
552 unsigned int i,
553 struct i915_vma *vma)
554 {
555 struct drm_i915_private *i915 = eb->i915;
556 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
557 struct eb_vma *ev = &eb->vma[i];
558
559 ev->vma = vma;
560 ev->exec = entry;
561 ev->flags = entry->flags;
562
563 if (eb->lut_size > 0) {
564 ev->handle = entry->handle;
565 hlist_add_head(&ev->node,
566 &eb->buckets[hash_32(entry->handle,
567 eb->lut_size)]);
568 }
569
570 if (entry->relocation_count)
571 list_add_tail(&ev->reloc_link, &eb->relocs);
572
573 /*
574 * SNA is doing fancy tricks with compressing batch buffers, which leads
575 * to negative relocation deltas. Usually that works out ok since the
576 * relocate address is still positive, except when the batch is placed
577 * very low in the GTT. Ensure this doesn't happen.
578 *
579 * Note that actual hangs have only been observed on gen7, but for
580 * paranoia do it everywhere.
581 */
582 if (is_batch_buffer(eb, i)) {
583 if (entry->relocation_count &&
584 !(ev->flags & EXEC_OBJECT_PINNED))
585 ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
586 if (eb->reloc_cache.has_fence)
587 ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
588
589 eb->batches[*current_batch] = ev;
590
591 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
592 drm_dbg(&i915->drm,
593 "Attempting to use self-modifying batch buffer\n");
594 return -EINVAL;
595 }
596
597 if (range_overflows_t(u64,
598 eb->batch_start_offset,
599 eb->args->batch_len,
600 ev->vma->size)) {
601 drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
602 return -EINVAL;
603 }
604
605 if (eb->args->batch_len == 0)
606 eb->batch_len[*current_batch] = ev->vma->size -
607 eb->batch_start_offset;
> 608 if (unlikely(eb->batch_len == 0)) { /* impossible! */
609 drm_dbg(&i915->drm, "Invalid batch length\n");
610 return -EINVAL;
611 }
612
613 ++*current_batch;
614 }
615
616 return 0;
617 }
618
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 42173 bytes --]
next prev parent reply other threads:[~2021-08-30 3:47 UTC|newest]
Thread overview: 145+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-20 22:44 [PATCH 00/27] Parallel submission aka multi-bb execbuf Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-20 22:44 ` [PATCH 01/27] drm/i915/guc: Squash Clean up GuC CI failures, simplify locking, and kernel DOC Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-20 22:44 ` [PATCH 02/27] drm/i915/guc: Allow flexible number of context ids Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:13 ` John Harrison
2021-09-10 0:14 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 03/27] drm/i915/guc: Connect the number of guc_ids to debugfs Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:16 ` John Harrison
2021-09-10 0:16 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 04/27] drm/i915/guc: Take GT PM ref when deregistering context Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:28 ` John Harrison
2021-09-10 0:21 ` Matthew Brost
2021-09-13 9:55 ` Tvrtko Ursulin
2021-09-13 17:12 ` Matthew Brost
2021-09-14 8:41 ` Tvrtko Ursulin
2021-08-20 22:44 ` [PATCH 05/27] drm/i915: Add GT PM unpark worker Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:36 ` John Harrison
2021-09-10 0:34 ` Matthew Brost
2021-09-10 8:36 ` Tvrtko Ursulin
2021-09-10 20:09 ` Matthew Brost
2021-09-13 10:33 ` Tvrtko Ursulin
2021-09-13 17:20 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 06/27] drm/i915/guc: Take engine PM when a context is pinned with GuC submission Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:46 ` John Harrison
2021-09-10 0:41 ` Matthew Brost
2021-09-13 22:26 ` John Harrison
2021-09-14 1:12 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 07/27] drm/i915/guc: Don't call switch_to_kernel_context " Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-09 22:51 ` John Harrison
2021-09-13 16:54 ` Matthew Brost
2021-09-13 22:38 ` John Harrison
2021-09-14 5:02 ` Matthew Brost
2021-09-13 16:55 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 08/27] drm/i915: Add logical engine mapping Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-10 11:12 ` Tvrtko Ursulin
2021-09-10 19:49 ` Matthew Brost
2021-09-13 9:24 ` Tvrtko Ursulin
2021-09-13 16:50 ` Matthew Brost
2021-09-14 8:34 ` Tvrtko Ursulin
2021-09-14 18:04 ` Matthew Brost
2021-09-15 8:24 ` Tvrtko Ursulin
2021-09-15 16:58 ` Matthew Brost
2021-09-16 8:31 ` Tvrtko Ursulin
2021-08-20 22:44 ` [PATCH 09/27] drm/i915: Expose logical engine instance to user Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-13 23:06 ` John Harrison
2021-09-14 1:08 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 10/27] drm/i915/guc: Introduce context parent-child relationship Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-13 23:19 ` John Harrison
2021-09-14 1:18 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 11/27] drm/i915/guc: Implement parallel context pin / unpin functions Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-20 22:44 ` [PATCH 12/27] drm/i915/guc: Add multi-lrc context registration Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-15 19:21 ` John Harrison
2021-09-15 19:31 ` Matthew Brost
2021-09-15 20:23 ` John Harrison
2021-09-15 20:33 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 13/27] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-15 19:24 ` John Harrison
2021-09-15 19:34 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 14/27] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-15 20:04 ` John Harrison
2021-09-15 20:55 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 15/27] drm/i915/guc: Implement multi-lrc submission Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-21 14:04 ` kernel test robot
2021-08-21 14:04 ` kernel test robot
2021-08-21 14:04 ` kernel test robot
2021-08-22 2:18 ` kernel test robot
2021-08-22 2:18 ` kernel test robot
2021-08-22 2:18 ` [Intel-gfx] " kernel test robot
2021-09-20 21:48 ` John Harrison
2021-09-22 16:25 ` Matthew Brost
2021-09-22 20:15 ` John Harrison
2021-09-23 2:44 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 16/27] drm/i915/guc: Insert submit fences between requests in parent-child relationship Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-20 21:57 ` John Harrison
2021-08-20 22:44 ` [PATCH 17/27] drm/i915/guc: Implement multi-lrc reset Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-20 22:44 ` John Harrison
2021-09-22 16:16 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 18/27] drm/i915/guc: Update debugfs for GuC multi-lrc Matthew Brost
2021-08-20 22:44 ` Matthew Brost
2021-09-20 22:48 ` [Intel-gfx] " John Harrison
2021-09-21 19:13 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 19/27] drm/i915: Fix bug in user proto-context creation that leaked contexts Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-20 22:57 ` John Harrison
2021-09-21 14:49 ` Tvrtko Ursulin
2021-09-21 19:28 ` Matthew Brost
2021-09-21 19:28 ` Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] [PATCH 20/27] drm/i915/guc: Connect UAPI to GuC multi-lrc interface Matthew Brost
2021-08-20 22:44 ` Matthew Brost
2021-08-29 4:00 ` [Intel-gfx] " kernel test robot
2021-08-29 4:00 ` kernel test robot
2021-08-29 19:59 ` kernel test robot
2021-08-29 19:59 ` kernel test robot
2021-09-21 0:09 ` John Harrison
2021-09-22 16:38 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 21/27] drm/i915/doc: Update parallel submit doc to point to i915_drm.h Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-21 0:12 ` John Harrison
2021-08-20 22:44 ` [PATCH 22/27] drm/i915/guc: Add basic GuC multi-lrc selftest Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-28 20:47 ` John Harrison
2021-08-20 22:44 ` [PATCH 23/27] drm/i915/guc: Implement no mid batch preemption for multi-lrc Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-10 11:25 ` Tvrtko Ursulin
2021-09-10 20:49 ` Matthew Brost
2021-09-13 10:52 ` Tvrtko Ursulin
2021-09-28 22:20 ` John Harrison
2021-09-28 22:33 ` Matthew Brost
2021-09-28 23:33 ` John Harrison
2021-09-29 0:22 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 24/27] drm/i915: Multi-BB execbuf Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-21 19:01 ` kernel test robot
2021-08-21 19:01 ` kernel test robot
2021-08-30 3:46 ` kernel test robot [this message]
2021-08-30 3:46 ` kernel test robot
2021-09-30 22:16 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 25/27] drm/i915/guc: Handle errors in multi-lrc requests Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-09-29 20:44 ` John Harrison
2021-09-29 20:58 ` Matthew Brost
2021-08-20 22:44 ` [PATCH 26/27] drm/i915: Enable multi-bb execbuf Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-20 22:44 ` [PATCH 27/27] drm/i915/execlists: Weak parallel submission support for execlists Matthew Brost
2021-08-20 22:44 ` [Intel-gfx] " Matthew Brost
2021-08-20 23:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Parallel submission aka multi-bb execbuf (rev3) Patchwork
2021-08-20 23:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-08-20 23:45 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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