[PATCH v5 0/4] riscv: enable SBI system reset

[PATCH v5 0/4] riscv: enable SBI system reset

[Heinrich Schuchardt]

With SBI v0.3 a system reset extension is available. This allows to
implement reboot and poweroff in U-Boot in a system independent way.

* Provide missing constants
* Provide a system reset driver using the system reset extension.

v5:
	* add a configuration actually using the driver
	* don't add __efi_runtime in arch/riscv/lib/sbi.c
	* use '=' not ':' in array initialization with enum indices
v4:
	* remove the UEFI SystemReset() implementation
	* simplify the code using an array to translate reset types
	* remove a superfluos check to determine if the device was probed
v3:
	add SBI_HSM_HART_STATUS_SUSPENDED,
	    SBI_HSM_HART_STATUS_SUSPEND_PENDING,
	    SBI_HSM_HART_STATUS_RESUME_PENDING
v2:
	correct constants that were blindly copied from Linux

Heinrich Schuchardt (4):
  riscv: add missing SBI extension definitions
  cmd/sbi: use constants instead of numerical values
  sysreset: provide SBI based sysreset driver
  configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfig

 MAINTAINERS                          |  1 +
 arch/riscv/cpu/cpu.c                 | 13 ++++++-
 arch/riscv/include/asm/sbi.h         | 40 ++++++++++++++++++++--
 arch/riscv/lib/sbi.c                 | 12 +++++++
 cmd/riscv/sbi.c                      | 30 ++++++++--------
 configs/qemu-riscv32_smode_defconfig |  1 +
 configs/qemu-riscv64_smode_defconfig |  1 +
 drivers/sysreset/Kconfig             | 12 +++++++
 drivers/sysreset/Makefile            |  1 +
 drivers/sysreset/sysreset_sbi.c      | 51 ++++++++++++++++++++++++++++
 10 files changed, 144 insertions(+), 18 deletions(-)
 create mode 100644 drivers/sysreset/sysreset_sbi.c

-- 
2.30.2

[PATCH v5 1/4] riscv: add missing SBI extension definitions

[Heinrich Schuchardt]

Add the System Reset Extension and the Hart State Management Extension
definitions.

Add missing RFENCE Extension enum values.

The SBI 0.1 extension constants are needed for the sbi command. Remove
an #ifdef.

Cf. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
v5:
	no change
v4:
	no change
---
 arch/riscv/include/asm/sbi.h | 39 ++++++++++++++++++++++++++++++++++--
 1 file changed, 37 insertions(+), 2 deletions(-)

diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 53ca316180..34a115afc3 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -12,7 +12,6 @@
 #include <linux/types.h>
 
 enum sbi_ext_id {
-#ifdef CONFIG_SBI_V01
 	SBI_EXT_0_1_SET_TIMER = 0x0,
 	SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
 	SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
@@ -22,11 +21,12 @@ enum sbi_ext_id {
 	SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
 	SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
 	SBI_EXT_0_1_SHUTDOWN = 0x8,
-#endif
 	SBI_EXT_BASE = 0x10,
 	SBI_EXT_TIME = 0x54494D45,
 	SBI_EXT_IPI = 0x735049,
 	SBI_EXT_RFENCE = 0x52464E43,
+	SBI_EXT_HSM = 0x48534D,
+	SBI_EXT_SRST = 0x53525354,
 };
 
 enum sbi_ext_base_fid {
@@ -51,6 +51,41 @@ enum sbi_ext_rfence_fid {
 	SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
 	SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
+	SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
+	SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
+	SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
+	SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
+};
+
+enum sbi_ext_hsm_fid {
+	SBI_EXT_HSM_HART_START = 0,
+	SBI_EXT_HSM_HART_STOP,
+	SBI_EXT_HSM_HART_STATUS,
+	SBI_EXT_HSM_HART_SUSPEND,
+};
+
+enum sbi_hsm_hart_status {
+	SBI_HSM_HART_STATUS_STARTED = 0,
+	SBI_HSM_HART_STATUS_STOPPED,
+	SBI_HSM_HART_STATUS_START_PENDING,
+	SBI_HSM_HART_STATUS_STOP_PENDING,
+	SBI_HSM_HART_STATUS_SUSPEND_PENDING,
+	SBI_HSM_HART_STATUS_RESUME_PENDING,
+};
+
+enum sbi_ext_srst_fid {
+	SBI_EXT_SRST_RESET = 0,
+};
+
+enum sbi_srst_reset_type {
+	SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
+	SBI_SRST_RESET_TYPE_COLD_REBOOT,
+	SBI_SRST_RESET_TYPE_WARM_REBOOT,
+};
+
+enum sbi_srst_reset_reason {
+	SBI_SRST_RESET_REASON_NONE = 0,
+	SBI_SRST_RESET_REASON_SYS_FAILURE,
 };
 
 #ifdef CONFIG_SBI_V01
-- 
2.30.2

[PATCH v5 2/4] cmd/sbi: use constants instead of numerical values

[Heinrich Schuchardt]

Use constants for extension IDs.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
---
v5:
	no change
v4:
	no change
---
 cmd/riscv/sbi.c | 30 +++++++++++++++---------------
 1 file changed, 15 insertions(+), 15 deletions(-)

diff --git a/cmd/riscv/sbi.c b/cmd/riscv/sbi.c
index 90c0811e14..65a2c93290 100644
--- a/cmd/riscv/sbi.c
+++ b/cmd/riscv/sbi.c
@@ -29,21 +29,21 @@ static struct sbi_imp implementations[] = {
 };
 
 static struct sbi_ext extensions[] = {
-	{ 0x00000000, "sbi_set_timer" },
-	{ 0x00000001, "sbi_console_putchar" },
-	{ 0x00000002, "sbi_console_getchar" },
-	{ 0x00000003, "sbi_clear_ipi" },
-	{ 0x00000004, "sbi_send_ipi" },
-	{ 0x00000005, "sbi_remote_fence_i" },
-	{ 0x00000006, "sbi_remote_sfence_vma" },
-	{ 0x00000007, "sbi_remote_sfence_vma_asid" },
-	{ 0x00000008, "sbi_shutdown" },
-	{ 0x00000010, "SBI Base Functionality" },
-	{ 0x54494D45, "Timer Extension" },
-	{ 0x00735049, "IPI Extension" },
-	{ 0x52464E43, "RFENCE Extension" },
-	{ 0x0048534D, "Hart State Management Extension" },
-	{ 0x53525354, "System Reset Extension" },
+	{ SBI_EXT_0_1_SET_TIMER,	      "sbi_set_timer" },
+	{ SBI_EXT_0_1_CONSOLE_PUTCHAR,	      "sbi_console_putchar" },
+	{ SBI_EXT_0_1_CONSOLE_GETCHAR,	      "sbi_console_getchar" },
+	{ SBI_EXT_0_1_CLEAR_IPI,	      "sbi_clear_ipi" },
+	{ SBI_EXT_0_1_SEND_IPI,		      "sbi_send_ipi" },
+	{ SBI_EXT_0_1_REMOTE_FENCE_I,	      "sbi_remote_fence_i" },
+	{ SBI_EXT_0_1_REMOTE_SFENCE_VMA,      "sbi_remote_sfence_vma" },
+	{ SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, "sbi_remote_sfence_vma_asid" },
+	{ SBI_EXT_0_1_SHUTDOWN,		      "sbi_shutdown" },
+	{ SBI_EXT_BASE,			      "SBI Base Functionality" },
+	{ SBI_EXT_TIME,			      "Timer Extension" },
+	{ SBI_EXT_IPI,			      "IPI Extension" },
+	{ SBI_EXT_RFENCE,		      "RFENCE Extension" },
+	{ SBI_EXT_HSM,			      "Hart State Management Extension" },
+	{ SBI_EXT_SRST,			      "System Reset Extension" },
 };
 
 static int do_sbi(struct cmd_tbl *cmdtp, int flag, int argc,
-- 
2.30.2

[PATCH v5 3/4] sysreset: provide SBI based sysreset driver

[Heinrich Schuchardt]

Provide sysreset driver using the SBI system reset extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
v5:
	* don't add __efi_runtime
	* use '=' not ':' in array initialization with enum indices
v4:
	* remove the UEFI SystemReset() implementation
	* simplify the code using an array to translate reset types
	* remove a superfluos check to determine if the device was probed
---
 MAINTAINERS                     |  1 +
 arch/riscv/cpu/cpu.c            | 13 ++++++++-
 arch/riscv/include/asm/sbi.h    |  1 +
 arch/riscv/lib/sbi.c            | 12 ++++++++
 drivers/sysreset/Kconfig        | 12 ++++++++
 drivers/sysreset/Makefile       |  1 +
 drivers/sysreset/sysreset_sbi.c | 51 +++++++++++++++++++++++++++++++++
 7 files changed, 90 insertions(+), 1 deletion(-)
 create mode 100644 drivers/sysreset/sysreset_sbi.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 4cf0c33c5d..88d7aa2bc7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1017,6 +1017,7 @@ T:	git https://source.denx.de/u-boot/custodians/u-boot-riscv.git
 F:	arch/riscv/
 F:	cmd/riscv/
 F:	doc/usage/sbi.rst
+F:	drivers/sysreset/sysreset_sbi.c
 F:	drivers/timer/andes_plmt_timer.c
 F:	drivers/timer/sifive_clint_timer.c
 F:	tools/prelink-riscv.c
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index c894ac10b5..8e49b6d736 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <dm/lists.h>
 #include <init.h>
 #include <log.h>
 #include <asm/encoding.h>
@@ -138,7 +139,17 @@ int arch_cpu_init_dm(void)
 
 int arch_early_init_r(void)
 {
-	return riscv_cpu_probe();
+	int ret;
+
+	ret = riscv_cpu_probe();
+	if (ret)
+		return ret;
+
+	if (IS_ENABLED(CONFIG_SYSRESET_SBI))
+		device_bind_driver(gd->dm_root, "sbi-sysreset",
+				   "sbi-sysreset", NULL);
+
+	return 0;
 }
 
 /**
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 34a115afc3..5030892b47 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -153,5 +153,6 @@ void sbi_set_timer(uint64_t stime_value);
 long sbi_get_spec_version(void);
 int sbi_get_impl_id(void);
 int sbi_probe_extension(int ext);
+void sbi_srst_reset(unsigned long type, unsigned long reason);
 
 #endif
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 77845a73ca..2b53896b8a 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -108,6 +108,18 @@ int sbi_probe_extension(int extid)
 	return -ENOTSUPP;
 }
 
+/**
+ * sbi_srst_reset() - invoke system reset extension
+ *
+ * @type:	type of reset
+ * @reason:	reason for reset
+ */
+void sbi_srst_reset(unsigned long type, unsigned long reason)
+{
+	sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
+		  0, 0, 0, 0);
+}
+
 #ifdef CONFIG_SBI_V01
 
 /**
diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
index ac77ffbc8b..43a948cfcd 100644
--- a/drivers/sysreset/Kconfig
+++ b/drivers/sysreset/Kconfig
@@ -85,6 +85,18 @@ config SYSRESET_PSCI
 	  Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
 	  must be running on your system.
 
+config SYSRESET_SBI
+	bool "Enable support for SBI System Reset"
+	depends on RISCV_SMODE && SBI_V02
+	select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
+	help
+	  Enable system reset and poweroff via the SBI system reset extension.
+	  The extension was introduced in version 0.3 of the SBI specification.
+
+	  If the SBI implementation provides the extension, is board specific.
+	  The RISC-V platform specification mandates the extension for rich
+	  operating system platforms.
+
 config SYSRESET_SOCFPGA
 	bool "Enable support for Intel SOCFPGA family"
 	depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10)
diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
index de81c399d7..8e00be0779 100644
--- a/drivers/sysreset/Makefile
+++ b/drivers/sysreset/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
 obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
 obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
 obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
+obj-$(CONFIG_SYSRESET_SBI) += sysreset_sbi.o
 obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
 obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
 obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
diff --git a/drivers/sysreset/sysreset_sbi.c b/drivers/sysreset/sysreset_sbi.c
new file mode 100644
index 0000000000..5e8090d62b
--- /dev/null
+++ b/drivers/sysreset/sysreset_sbi.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <log.h>
+#include <sysreset.h>
+#include <asm/sbi.h>
+
+static enum sbi_srst_reset_type reset_type_map[SYSRESET_COUNT] = {
+	[SYSRESET_WARM] = SBI_SRST_RESET_TYPE_WARM_REBOOT,
+	[SYSRESET_COLD] = SBI_SRST_RESET_TYPE_COLD_REBOOT,
+	[SYSRESET_POWER] = SBI_SRST_RESET_TYPE_COLD_REBOOT,
+	[SYSRESET_POWER_OFF] = SBI_SRST_RESET_TYPE_SHUTDOWN,
+};
+
+static int sbi_sysreset_request(struct udevice *dev, enum sysreset_t type)
+{
+	enum sbi_srst_reset_type reset_type;
+
+	reset_type = reset_type_map[type];
+	sbi_srst_reset(reset_type, SBI_SRST_RESET_REASON_NONE);
+
+	return -EINPROGRESS;
+}
+
+static int sbi_sysreset_probe(struct udevice *dev)
+{
+	long have_reset;
+
+	have_reset = sbi_probe_extension(SBI_EXT_SRST);
+	if (have_reset)
+		return 0;
+
+	log_warning("SBI has no system reset extension\n");
+	return -ENOENT;
+}
+
+static struct sysreset_ops sbi_sysreset_ops = {
+	.request = sbi_sysreset_request,
+};
+
+U_BOOT_DRIVER(sbi_sysreset) = {
+	.name = "sbi-sysreset",
+	.id = UCLASS_SYSRESET,
+	.ops = &sbi_sysreset_ops,
+	.probe = sbi_sysreset_probe,
+};
-- 
2.30.2

[PATCH v5 4/4] configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfig

[Heinrich Schuchardt]

There should be a platform compiled with the new driver.

If you want to test the SBI sysreset driver, disable
CONFIG_SYSRESET_SYSCON. In OpenSBI sifive_test_system_reset() will be
called.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
---
v5:
	new patch
---
 configs/qemu-riscv32_smode_defconfig | 1 +
 configs/qemu-riscv64_smode_defconfig | 1 +
 2 files changed, 2 insertions(+)

diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig
index 05eda43961..5a4ef47a22 100644
--- a/configs/qemu-riscv32_smode_defconfig
+++ b/configs/qemu-riscv32_smode_defconfig
@@ -13,3 +13,4 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
+CONFIG_SYSRESET_SBI=y
diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig
index 4a6416e254..8fb80d7008 100644
--- a/configs/qemu-riscv64_smode_defconfig
+++ b/configs/qemu-riscv64_smode_defconfig
@@ -16,3 +16,4 @@ CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM_MTD=y
+CONFIG_SYSRESET_SBI=y
-- 
2.30.2

Re: [PATCH v5 3/4] sysreset: provide SBI based sysreset driver

[Bin Meng]

On Fri, Sep 10, 2021 at 10:15 PM Heinrich Schuchardt
<heinrich.schuchardt@canonical.com> wrote:
>
> Provide sysreset driver using the SBI system reset extension.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v5:
>         * don't add __efi_runtime
>         * use '=' not ':' in array initialization with enum indices
> v4:
>         * remove the UEFI SystemReset() implementation
>         * simplify the code using an array to translate reset types
>         * remove a superfluos check to determine if the device was probed
> ---
>  MAINTAINERS                     |  1 +
>  arch/riscv/cpu/cpu.c            | 13 ++++++++-
>  arch/riscv/include/asm/sbi.h    |  1 +
>  arch/riscv/lib/sbi.c            | 12 ++++++++
>  drivers/sysreset/Kconfig        | 12 ++++++++
>  drivers/sysreset/Makefile       |  1 +
>  drivers/sysreset/sysreset_sbi.c | 51 +++++++++++++++++++++++++++++++++
>  7 files changed, 90 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/sysreset/sysreset_sbi.c
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

Re: [PATCH v5 4/4] configs: enable SYSRESET_SBI on qemu-riscvXX_smode_defconfig

[Bin Meng]

On Fri, Sep 10, 2021 at 10:15 PM Heinrich Schuchardt
<heinrich.schuchardt@canonical.com> wrote:
>
> There should be a platform compiled with the new driver.
>
> If you want to test the SBI sysreset driver, disable
> CONFIG_SYSRESET_SYSCON. In OpenSBI sifive_test_system_reset() will be
> called.
>
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v5:
>         new patch
> ---
>  configs/qemu-riscv32_smode_defconfig | 1 +
>  configs/qemu-riscv64_smode_defconfig | 1 +
>  2 files changed, 2 insertions(+)
>

Should also turn it on for the SPL version.

Regards,
Bin

Re: [PATCH v5 3/4] sysreset: provide SBI based sysreset driver

[Sean Anderson]

On 9/10/21 10:15 AM, Heinrich Schuchardt wrote:
> Provide sysreset driver using the SBI system reset extension.
> 
> Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> ---
> v5:
> 	* don't add __efi_runtime
> 	* use '=' not ':' in array initialization with enum indices
> v4:
> 	* remove the UEFI SystemReset() implementation
> 	* simplify the code using an array to translate reset types
> 	* remove a superfluos check to determine if the device was probed
> ---
>   MAINTAINERS                     |  1 +
>   arch/riscv/cpu/cpu.c            | 13 ++++++++-
>   arch/riscv/include/asm/sbi.h    |  1 +
>   arch/riscv/lib/sbi.c            | 12 ++++++++
>   drivers/sysreset/Kconfig        | 12 ++++++++
>   drivers/sysreset/Makefile       |  1 +
>   drivers/sysreset/sysreset_sbi.c | 51 +++++++++++++++++++++++++++++++++
>   7 files changed, 90 insertions(+), 1 deletion(-)
>   create mode 100644 drivers/sysreset/sysreset_sbi.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 4cf0c33c5d..88d7aa2bc7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1017,6 +1017,7 @@ T:	git https://source.denx.de/u-boot/custodians/u-boot-riscv.git
>   F:	arch/riscv/
>   F:	cmd/riscv/
>   F:	doc/usage/sbi.rst
> +F:	drivers/sysreset/sysreset_sbi.c
>   F:	drivers/timer/andes_plmt_timer.c
>   F:	drivers/timer/sifive_clint_timer.c
>   F:	tools/prelink-riscv.c
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index c894ac10b5..8e49b6d736 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -6,6 +6,7 @@
>   #include <common.h>
>   #include <cpu.h>
>   #include <dm.h>
> +#include <dm/lists.h>
>   #include <init.h>
>   #include <log.h>
>   #include <asm/encoding.h>
> @@ -138,7 +139,17 @@ int arch_cpu_init_dm(void)
>   
>   int arch_early_init_r(void)
>   {
> -	return riscv_cpu_probe();
> +	int ret;
> +
> +	ret = riscv_cpu_probe();
> +	if (ret)
> +		return ret;
> +
> +	if (IS_ENABLED(CONFIG_SYSRESET_SBI))
> +		device_bind_driver(gd->dm_root, "sbi-sysreset",
> +				   "sbi-sysreset", NULL);
> +
> +	return 0;
>   }
>   
>   /**
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 34a115afc3..5030892b47 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -153,5 +153,6 @@ void sbi_set_timer(uint64_t stime_value);
>   long sbi_get_spec_version(void);
>   int sbi_get_impl_id(void);
>   int sbi_probe_extension(int ext);
> +void sbi_srst_reset(unsigned long type, unsigned long reason);
>   
>   #endif
> diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
> index 77845a73ca..2b53896b8a 100644
> --- a/arch/riscv/lib/sbi.c
> +++ b/arch/riscv/lib/sbi.c
> @@ -108,6 +108,18 @@ int sbi_probe_extension(int extid)
>   	return -ENOTSUPP;
>   }
>   
> +/**
> + * sbi_srst_reset() - invoke system reset extension
> + *
> + * @type:	type of reset
> + * @reason:	reason for reset
> + */
> +void sbi_srst_reset(unsigned long type, unsigned long reason)
> +{
> +	sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
> +		  0, 0, 0, 0);
> +}
> +
>   #ifdef CONFIG_SBI_V01
>   
>   /**
> diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig
> index ac77ffbc8b..43a948cfcd 100644
> --- a/drivers/sysreset/Kconfig
> +++ b/drivers/sysreset/Kconfig
> @@ -85,6 +85,18 @@ config SYSRESET_PSCI
>   	  Enable PSCI SYSTEM_RESET function call.  To use this, PSCI firmware
>   	  must be running on your system.
>   
> +config SYSRESET_SBI
> +	bool "Enable support for SBI System Reset"
> +	depends on RISCV_SMODE && SBI_V02
> +	select SYSRESET_CMD_POWEROFF if CMD_POWEROFF
> +	help
> +	  Enable system reset and poweroff via the SBI system reset extension.
> +	  The extension was introduced in version 0.3 of the SBI specification.
> +
> +	  If the SBI implementation provides the extension, is board specific.
> +	  The RISC-V platform specification mandates the extension for rich
> +	  operating system platforms.
> +
>   config SYSRESET_SOCFPGA
>   	bool "Enable support for Intel SOCFPGA family"
>   	depends on ARCH_SOCFPGA && (TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10)
> diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile
> index de81c399d7..8e00be0779 100644
> --- a/drivers/sysreset/Makefile
> +++ b/drivers/sysreset/Makefile
> @@ -13,6 +13,7 @@ obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
>   obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
>   obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
>   obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
> +obj-$(CONFIG_SYSRESET_SBI) += sysreset_sbi.o
>   obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
>   obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
>   obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
> diff --git a/drivers/sysreset/sysreset_sbi.c b/drivers/sysreset/sysreset_sbi.c
> new file mode 100644
> index 0000000000..5e8090d62b
> --- /dev/null
> +++ b/drivers/sysreset/sysreset_sbi.c
> @@ -0,0 +1,51 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2021, Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <log.h>
> +#include <sysreset.h>
> +#include <asm/sbi.h>
> +
> +static enum sbi_srst_reset_type reset_type_map[SYSRESET_COUNT] = {
> +	[SYSRESET_WARM] = SBI_SRST_RESET_TYPE_WARM_REBOOT,
> +	[SYSRESET_COLD] = SBI_SRST_RESET_TYPE_COLD_REBOOT,
> +	[SYSRESET_POWER] = SBI_SRST_RESET_TYPE_COLD_REBOOT,
> +	[SYSRESET_POWER_OFF] = SBI_SRST_RESET_TYPE_SHUTDOWN,
> +};
> +
> +static int sbi_sysreset_request(struct udevice *dev, enum sysreset_t type)
> +{
> +	enum sbi_srst_reset_type reset_type;
> +
> +	reset_type = reset_type_map[type];
> +	sbi_srst_reset(reset_type, SBI_SRST_RESET_REASON_NONE);
> +
> +	return -EINPROGRESS;
> +}
> +
> +static int sbi_sysreset_probe(struct udevice *dev)
> +{
> +	long have_reset;
> +
> +	have_reset = sbi_probe_extension(SBI_EXT_SRST);
> +	if (have_reset)
> +		return 0;
> +
> +	log_warning("SBI has no system reset extension\n");
> +	return -ENOENT;
> +}
> +
> +static struct sysreset_ops sbi_sysreset_ops = {
> +	.request = sbi_sysreset_request,
> +};
> +
> +U_BOOT_DRIVER(sbi_sysreset) = {
> +	.name = "sbi-sysreset",
> +	.id = UCLASS_SYSRESET,
> +	.ops = &sbi_sysreset_ops,
> +	.probe = sbi_sysreset_probe,
> +};
> 

Reviewed-by: Sean Anderson <seanga2@gmail.com>