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From: Shawn Guo <shawnguo@kernel.org>
To: haibo.chen@nxp.com
Cc: robh+dt@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] ARM: dts: imx: change the spi-nor tx
Date: Mon, 4 Oct 2021 11:25:57 +0800	[thread overview]
Message-ID: <20211004032556.GA15650@dragon> (raw)
In-Reply-To: <1629451790-10507-1-git-send-email-haibo.chen@nxp.com>

On Fri, Aug 20, 2021 at 05:29:49PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Before commit 0e30f47232ab5 ("mtd: spi-nor: add support for DTR protocol"),
> for all PP command, it only support 1-1-1 mode, no matter the tx setting
> in dts. But after the upper commit, the logic change. It will choose
> the best mode(fastest mode) which flash device and spi-nor host controller
> both support.
> 
> Though the spi-nor device on imx6sx-sdb/imx6ul(l/z)-14x14-evk board
> do not support PP-1-4-4/PP-1-1-4, but if tx is 4 in dts file, it will also
> impact the read mode selection. For the spi-nor device on the upper mentioned
> boards, they support read 1-4-4 mode and read 1-1-4 mode according to the
> device internal sfdp register. But qspi host controller do not support
> read 1-4-4 mode. so need to set the tx to 1, let the common code finally
> select read 1-1-4 mode, PP-1-1-1 mode.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Applied both, thanks!

WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: haibo.chen@nxp.com
Cc: robh+dt@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/2] ARM: dts: imx: change the spi-nor tx
Date: Mon, 4 Oct 2021 11:25:57 +0800	[thread overview]
Message-ID: <20211004032556.GA15650@dragon> (raw)
In-Reply-To: <1629451790-10507-1-git-send-email-haibo.chen@nxp.com>

On Fri, Aug 20, 2021 at 05:29:49PM +0800, haibo.chen@nxp.com wrote:
> From: Haibo Chen <haibo.chen@nxp.com>
> 
> Before commit 0e30f47232ab5 ("mtd: spi-nor: add support for DTR protocol"),
> for all PP command, it only support 1-1-1 mode, no matter the tx setting
> in dts. But after the upper commit, the logic change. It will choose
> the best mode(fastest mode) which flash device and spi-nor host controller
> both support.
> 
> Though the spi-nor device on imx6sx-sdb/imx6ul(l/z)-14x14-evk board
> do not support PP-1-4-4/PP-1-1-4, but if tx is 4 in dts file, it will also
> impact the read mode selection. For the spi-nor device on the upper mentioned
> boards, they support read 1-4-4 mode and read 1-1-4 mode according to the
> device internal sfdp register. But qspi host controller do not support
> read 1-4-4 mode. so need to set the tx to 1, let the common code finally
> select read 1-1-4 mode, PP-1-1-1 mode.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Applied both, thanks!

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  parent reply	other threads:[~2021-10-04  3:26 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-20  9:29 [PATCH 1/2] ARM: dts: imx: change the spi-nor tx haibo.chen
2021-08-20  9:29 ` haibo.chen
2021-08-20  9:29 ` [PATCH 2/2] arm64: dts: imx8: " haibo.chen
2021-08-20  9:29   ` haibo.chen
2021-10-04  3:25 ` Shawn Guo [this message]
2021-10-04  3:25   ` [PATCH 1/2] ARM: dts: imx: " Shawn Guo

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