* [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version
@ 2021-10-20 0:23 José Roberto de Souza
2021-10-20 0:23 ` [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT José Roberto de Souza
` (7 more replies)
0 siblings, 8 replies; 22+ messages in thread
From: José Roberto de Souza @ 2021-10-20 0:23 UTC (permalink / raw)
To: intel-gfx; +Cc: Radhakrishna Sripada, Matt Atwood, José Roberto de Souza
Adding a structure to standardize access to IP versioning as future
platforms will have this information populated at runtime.
The constant platform display version is not using this new struct but
the runtime variant will definitely use it.
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------
drivers/gpu/drm/i915/i915_pci.c | 18 +++++++++---------
drivers/gpu/drm/i915/intel_device_info.c | 19 ++++++++++++-------
drivers/gpu/drm/i915/intel_device_info.h | 12 ++++++++----
.../gpu/drm/i915/selftests/mock_gem_device.c | 2 +-
6 files changed, 37 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1e5b75ae99329..bdf85d202c55c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -808,7 +808,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
return PTR_ERR(i915);
/* Disable nuclear pageflip by default on pre-ILK */
- if (!i915->params.nuclear_pageflip && match_info->graphics_ver < 5)
+ if (!i915->params.nuclear_pageflip && match_info->graphics.ver < 5)
i915->drm.driver_features &= ~DRIVER_ATOMIC;
/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 12256218634f4..26b6e2b8bb5e8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1327,15 +1327,15 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev)
#define IP_VER(ver, rel) ((ver) << 8 | (rel))
-#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics_ver)
-#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->graphics_ver, \
- INTEL_INFO(i915)->graphics_rel)
+#define GRAPHICS_VER(i915) (INTEL_INFO(i915)->graphics.ver)
+#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->graphics.ver, \
+ INTEL_INFO(i915)->graphics.rel)
#define IS_GRAPHICS_VER(i915, from, until) \
(GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until))
-#define MEDIA_VER(i915) (INTEL_INFO(i915)->media_ver)
-#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->media_ver, \
- INTEL_INFO(i915)->media_rel)
+#define MEDIA_VER(i915) (INTEL_INFO(i915)->media.ver)
+#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->media.arch, \
+ INTEL_INFO(i915)->media.rel)
#define IS_MEDIA_VER(i915, from, until) \
(MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until))
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 169837de395d3..5e6795853dc31 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -32,8 +32,8 @@
#define PLATFORM(x) .platform = (x)
#define GEN(x) \
- .graphics_ver = (x), \
- .media_ver = (x), \
+ .graphics.ver = (x), \
+ .media.ver = (x), \
.display.ver = (x)
#define I845_PIPE_OFFSETS \
@@ -899,7 +899,7 @@ static const struct intel_device_info rkl_info = {
static const struct intel_device_info dg1_info = {
GEN12_FEATURES,
DGFX_FEATURES,
- .graphics_rel = 10,
+ .graphics.rel = 10,
PLATFORM(INTEL_DG1),
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
.require_force_probe = 1,
@@ -986,8 +986,8 @@ static const struct intel_device_info adl_p_info = {
I915_GTT_PAGE_SIZE_2M
#define XE_HP_FEATURES \
- .graphics_ver = 12, \
- .graphics_rel = 50, \
+ .graphics.ver = 12, \
+ .graphics.rel = 50, \
XE_HP_PAGE_SIZES, \
.dma_mask_size = 46, \
.has_64bit_reloc = 1, \
@@ -1005,8 +1005,8 @@ static const struct intel_device_info adl_p_info = {
.ppgtt_type = INTEL_PPGTT_FULL
#define XE_HPM_FEATURES \
- .media_ver = 12, \
- .media_rel = 50
+ .media.ver = 12, \
+ .media.rel = 50
__maybe_unused
static const struct intel_device_info xehpsdv_info = {
@@ -1030,8 +1030,8 @@ static const struct intel_device_info dg2_info = {
XE_HPM_FEATURES,
XE_LPD_FEATURES,
DGFX_FEATURES,
- .graphics_rel = 55,
- .media_rel = 55,
+ .graphics.rel = 55,
+ .media.rel = 55,
PLATFORM(INTEL_DG2),
.platform_engine_mask =
BIT(RCS0) | BIT(BCS0) |
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 305facedd2841..6e6b317bc33ce 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -97,17 +97,22 @@ static const char *iommu_name(void)
void intel_device_info_print_static(const struct intel_device_info *info,
struct drm_printer *p)
{
- if (info->graphics_rel)
- drm_printf(p, "graphics version: %u.%02u\n", info->graphics_ver, info->graphics_rel);
+ if (info->graphics.rel)
+ drm_printf(p, "graphics version: %u.%02u\n", info->graphics.ver,
+ info->graphics.rel);
else
- drm_printf(p, "graphics version: %u\n", info->graphics_ver);
+ drm_printf(p, "graphics version: %u\n", info->graphics.ver);
- if (info->media_rel)
- drm_printf(p, "media version: %u.%02u\n", info->media_ver, info->media_rel);
+ if (info->media.rel)
+ drm_printf(p, "media version: %u.%02u\n", info->media.ver, info->media.rel);
else
- drm_printf(p, "media version: %u\n", info->media_ver);
+ drm_printf(p, "media version: %u\n", info->media.ver);
+
+ if (info->display.rel)
+ drm_printf(p, "display version: %u.%02u\n", info->display.ver, info->display.rel);
+ else
+ drm_printf(p, "display version: %u\n", info->display.ver);
- drm_printf(p, "display version: %u\n", info->display.ver);
drm_printf(p, "gt: %d\n", info->gt);
drm_printf(p, "iommu: %s\n", iommu_name());
drm_printf(p, "memory-regions: %x\n", info->memory_regions);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 8e6f48d1eb7bc..669f0d26c3c38 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -166,11 +166,14 @@ enum intel_ppgtt_type {
func(overlay_needs_physical); \
func(supports_tv);
+struct ip_version {
+ u8 ver;
+ u8 rel;
+};
+
struct intel_device_info {
- u8 graphics_ver;
- u8 graphics_rel;
- u8 media_ver;
- u8 media_rel;
+ struct ip_version graphics;
+ struct ip_version media;
intel_engine_mask_t platform_engine_mask; /* Engines supported by the HW */
@@ -200,6 +203,7 @@ struct intel_device_info {
struct {
u8 ver;
+ u8 rel;
#define DEFINE_FLAG(name) u8 name:1
DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG);
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
index 4f81801468881..9ab3f284d1dd9 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c
@@ -165,7 +165,7 @@ struct drm_i915_private *mock_gem_device(void)
/* Using the global GTT may ask questions about KMS users, so prepare */
drm_mode_config_init(&i915->drm);
- mkwrite_device_info(i915)->graphics_ver = -1;
+ mkwrite_device_info(i915)->graphics.ver = -1;
mkwrite_device_info(i915)->page_sizes =
I915_GTT_PAGE_SIZE_4K |
--
2.33.1
^ permalink raw reply related [flat|nested] 22+ messages in thread* [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza @ 2021-10-20 0:23 ` José Roberto de Souza 2021-11-02 7:30 ` Lucas De Marchi 2021-10-20 0:23 ` [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP José Roberto de Souza ` (6 subsequent siblings) 7 siblings, 1 reply; 22+ messages in thread From: José Roberto de Souza @ 2021-10-20 0:23 UTC (permalink / raw) To: intel-gfx; +Cc: Radhakrishna Sripada, Matt Atwood, José Roberto de Souza Graphics and media IPs can have different stepping so a new field is needed in intel_step_info. The next patch will take care of rename gt_step to graphics_step. Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 5 +++ drivers/gpu/drm/i915/intel_step.c | 69 ++++++++++++++++--------------- drivers/gpu/drm/i915/intel_step.h | 1 + 3 files changed, 41 insertions(+), 34 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 26b6e2b8bb5e8..9559cda7382f2 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1349,6 +1349,7 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step) #define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_step) +#define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)->step.media_step) #define IS_DISPLAY_STEP(__i915, since, until) \ (drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \ @@ -1358,6 +1359,10 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) (drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \ INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) < (until)) +#define IS_MEDIA_STEP(__i915, since, until) \ + (drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == STEP_NONE), \ + INTEL_MEDIA_STEP(__i915) >= (since) && INTEL_MEDIA_STEP(__i915) < (until)) + static __always_inline unsigned int __platform_mask_index(const struct intel_runtime_info *info, enum intel_platform p) diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c index 6cf9676313959..1cf8f0bb0b5e5 100644 --- a/drivers/gpu/drm/i915/intel_step.c +++ b/drivers/gpu/drm/i915/intel_step.c @@ -23,7 +23,8 @@ * use a macro to define these to make it easier to identify the platforms * where the two steppings can deviate. */ -#define COMMON_STEP(x) .gt_step = STEP_##x, .display_step = STEP_##x +#define COMMON_STEP(x) .gt_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x +#define COMMON_GT_MEDIA_STEP(x) .gt_step = STEP_##x, .media_step = STEP_##x static const struct intel_step_info skl_revids[] = { [0x6] = { COMMON_STEP(G0) }, @@ -33,13 +34,13 @@ static const struct intel_step_info skl_revids[] = { }; static const struct intel_step_info kbl_revids[] = { - [1] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, - [2] = { .gt_step = STEP_C0, .display_step = STEP_B0 }, - [3] = { .gt_step = STEP_D0, .display_step = STEP_B0 }, - [4] = { .gt_step = STEP_F0, .display_step = STEP_C0 }, - [5] = { .gt_step = STEP_C0, .display_step = STEP_B1 }, - [6] = { .gt_step = STEP_D1, .display_step = STEP_B1 }, - [7] = { .gt_step = STEP_G0, .display_step = STEP_C0 }, + [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, + [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, + [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 }, + [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 }, + [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 }, + [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 }, + [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 }, }; static const struct intel_step_info bxt_revids[] = { @@ -63,16 +64,16 @@ static const struct intel_step_info jsl_ehl_revids[] = { }; static const struct intel_step_info tgl_uy_revids[] = { - [0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, - [1] = { .gt_step = STEP_B0, .display_step = STEP_C0 }, - [2] = { .gt_step = STEP_B1, .display_step = STEP_C0 }, - [3] = { .gt_step = STEP_C0, .display_step = STEP_D0 }, + [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, + [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, + [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, + [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, }; /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ static const struct intel_step_info tgl_revids[] = { - [0] = { .gt_step = STEP_A0, .display_step = STEP_B0 }, - [1] = { .gt_step = STEP_B0, .display_step = STEP_D0 }, + [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, + [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 }, }; static const struct intel_step_info rkl_revids[] = { @@ -87,38 +88,38 @@ static const struct intel_step_info dg1_revids[] = { }; static const struct intel_step_info adls_revids[] = { - [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, - [0x1] = { .gt_step = STEP_A0, .display_step = STEP_A2 }, - [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, - [0x8] = { .gt_step = STEP_C0, .display_step = STEP_B0 }, - [0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 }, + [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, + [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, + [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, + [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, }; static const struct intel_step_info adlp_revids[] = { - [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, - [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, - [0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 }, - [0xC] = { .gt_step = STEP_C0, .display_step = STEP_D0 }, + [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, + [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, + [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, }; static const struct intel_step_info xehpsdv_revids[] = { - [0x0] = { .gt_step = STEP_A0 }, - [0x1] = { .gt_step = STEP_A1 }, - [0x4] = { .gt_step = STEP_B0 }, - [0x8] = { .gt_step = STEP_C0 }, + [0x0] = { COMMON_GT_MEDIA_STEP(A0) }, + [0x1] = { COMMON_GT_MEDIA_STEP(A1) }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0) }, + [0x8] = { COMMON_GT_MEDIA_STEP(C0) }, }; static const struct intel_step_info dg2_g10_revid_step_tbl[] = { - [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, - [0x1] = { .gt_step = STEP_A1, .display_step = STEP_A0 }, - [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, - [0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 }, + [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, + [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, + [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, }; static const struct intel_step_info dg2_g11_revid_step_tbl[] = { - [0x0] = { .gt_step = STEP_A0, .display_step = STEP_B0 }, - [0x4] = { .gt_step = STEP_B0, .display_step = STEP_C0 }, - [0x5] = { .gt_step = STEP_B1, .display_step = STEP_C0 }, + [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, + [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, + [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, }; void intel_step_init(struct drm_i915_private *i915) diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h index f6641e2a3c776..b6ff41b7bcf59 100644 --- a/drivers/gpu/drm/i915/intel_step.h +++ b/drivers/gpu/drm/i915/intel_step.h @@ -13,6 +13,7 @@ struct drm_i915_private; struct intel_step_info { u8 gt_step; u8 display_step; + u8 media_step; }; #define STEP_ENUM_VAL(name) STEP_##name, -- 2.33.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT 2021-10-20 0:23 ` [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT José Roberto de Souza @ 2021-11-02 7:30 ` Lucas De Marchi 0 siblings, 0 replies; 22+ messages in thread From: Lucas De Marchi @ 2021-11-02 7:30 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx On Tue, Oct 19, 2021 at 05:23:52PM -0700, Jose Souza wrote: >Graphics and media IPs can have different stepping so a new field is >needed in intel_step_info. > >The next patch will take care of rename gt_step to graphics_step. > >Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> >Cc: Matt Atwood <matthew.s.atwood@intel.com> >Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza 2021-10-20 0:23 ` [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT José Roberto de Souza @ 2021-10-20 0:23 ` José Roberto de Souza 2021-10-20 15:06 ` Yokoyama, Caz 2021-11-02 7:27 ` Lucas De Marchi 2021-10-20 0:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add struct to hold IP version Patchwork ` (5 subsequent siblings) 7 siblings, 2 replies; 22+ messages in thread From: José Roberto de Souza @ 2021-10-20 0:23 UTC (permalink / raw) To: intel-gfx; +Cc: Matt Atwood, Radhakrishna Sripada, José Roberto de Souza As now graphics and media can have different steppings this patch is renaming all _GT_STEP macros to _GRAPHICS_STEP. Future platforms will properly choose between _MEDIA_STEP and _GRAPHICS_STEP for each new workaround. Cc: Matt Atwood <matthew.s.atwood@intel.com> Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> --- drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +- drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- drivers/gpu/drm/i915/gt/intel_workarounds.c | 31 +++++++------- drivers/gpu/drm/i915/i915_drv.h | 46 ++++++++++----------- drivers/gpu/drm/i915/intel_pm.c | 6 +-- drivers/gpu/drm/i915/intel_step.c | 12 +++--- drivers/gpu/drm/i915/intel_step.h | 2 +- 8 files changed, 51 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c index 461844dffd7ed..e320610dd0b81 100644 --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c @@ -42,7 +42,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, u32 mode) vf_flush_wa = true; /* WaForGAMHang:kbl */ - if (IS_KBL_GT_STEP(rq->engine->i915, 0, STEP_C0)) + if (IS_KBL_GRAPHICS_STEP(rq->engine->i915, 0, STEP_C0)) dc_flush_wa = true; } diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c index 15f9ada28a7ab..9c253ba593c65 100644 --- a/drivers/gpu/drm/i915/gt/intel_mocs.c +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c @@ -424,7 +424,7 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915, table->unused_entries_index = I915_MOCS_PTE; if (IS_DG2(i915)) { - if (IS_DG2_GT_STEP(i915, G10, STEP_A0, STEP_B0)) { + if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0)) { table->size = ARRAY_SIZE(dg2_mocs_table_g10_ax); table->table = dg2_mocs_table_g10_ax; } else { diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c index afb35d2e5c734..aec838ecb2ef2 100644 --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c @@ -158,7 +158,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt) static bool get_legacy_lowmem_region(struct intel_uncore *uncore, u64 *start, u32 *size) { - if (!IS_DG1_GT_STEP(uncore->i915, STEP_A0, STEP_C0)) + if (!IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0)) return false; *start = 0; diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index e1f3625308891..37bec83e4750c 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -482,7 +482,7 @@ static void kbl_ctx_workarounds_init(struct intel_engine_cs *engine, gen9_ctx_workarounds_init(engine, wal); /* WaToEnableHwFixForPushConstHWBug:kbl */ - if (IS_KBL_GT_STEP(i915, STEP_C0, STEP_FOREVER)) + if (IS_KBL_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER)) wa_masked_en(wal, COMMON_SLICE_CHICKEN2, GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION); @@ -916,7 +916,7 @@ skl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE); /* WaInPlaceDecompressionHang:skl */ - if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0)) + if (IS_SKL_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0)) wa_write_or(wal, GEN9_GAMT_ECO_REG_RW_IA, GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); @@ -928,7 +928,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) gen9_gt_workarounds_init(gt, wal); /* WaDisableDynamicCreditSharing:kbl */ - if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0)) + if (IS_KBL_GRAPHICS_STEP(gt->i915, 0, STEP_C0)) wa_write_or(wal, GAMT_CHKN_BIT_REG, GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING); @@ -1136,7 +1136,7 @@ icl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) /* Wa_1607087056:icl,ehl,jsl */ if (IS_ICELAKE(i915) || - IS_JSL_EHL_GT_STEP(i915, STEP_A0, STEP_B0)) + IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) wa_write_or(wal, SLICE_UNIT_LEVEL_CLKGATE, L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); @@ -1190,19 +1190,19 @@ tgl_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) gen12_gt_workarounds_init(gt, wal); /* Wa_1409420604:tgl */ - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) wa_write_or(wal, SUBSLICE_UNIT_LEVEL_CLKGATE2, CPSSUNIT_CLKGATE_DIS); /* Wa_1607087056:tgl also know as BUG:1409180338 */ - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) wa_write_or(wal, SLICE_UNIT_LEVEL_CLKGATE, L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); /* Wa_1408615072:tgl[a0] */ - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2, VSUNIT_CLKGATE_DIS_TGL); } @@ -1215,7 +1215,7 @@ dg1_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal) gen12_gt_workarounds_init(gt, wal); /* Wa_1607087056:dg1 */ - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0)) + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) wa_write_or(wal, SLICE_UNIT_LEVEL_CLKGATE, L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); @@ -1623,7 +1623,7 @@ static void dg1_whitelist_build(struct intel_engine_cs *engine) tgl_whitelist_build(engine); /* GEN:BUG:1409280441:dg1 */ - if (IS_DG1_GT_STEP(engine->i915, STEP_A0, STEP_B0) && + if (IS_DG1_GRAPHICS_STEP(engine->i915, STEP_A0, STEP_B0) && (engine->class == RENDER_CLASS || engine->class == COPY_ENGINE_CLASS)) whitelist_reg_ext(w, RING_ID(engine->mmio_base), @@ -1716,8 +1716,8 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) { struct drm_i915_private *i915 = engine->i915; - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || - IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) { + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || + IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) { /* * Wa_1607138336:tgl[a0],dg1[a0] * Wa_1607063988:tgl[a0],dg1[a0] @@ -1727,7 +1727,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) GEN12_DISABLE_POSH_BUSY_FF_DOP_CG); } - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) { + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) { /* * Wa_1606679103:tgl * (see also Wa_1606682166:icl) @@ -1762,7 +1762,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) } if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || - IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || + IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { /* Wa_1409804808:tgl,rkl,dg1[a0],adl-s,adl-p */ wa_masked_en(wal, GEN7_ROW_CHICKEN2, @@ -1775,8 +1775,7 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH); } - - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { /* * Wa_1607030317:tgl @@ -2138,7 +2137,7 @@ xcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) struct drm_i915_private *i915 = engine->i915; /* WaKBLVECSSemaphoreWaitPoll:kbl */ - if (IS_KBL_GT_STEP(i915, STEP_A0, STEP_F0)) { + if (IS_KBL_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) { wa_write(wal, RING_SEMA_WAIT_POLL(engine->mmio_base), 1); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9559cda7382f2..73cd66064f014 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1348,16 +1348,16 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step) -#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_step) +#define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step) #define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)->step.media_step) #define IS_DISPLAY_STEP(__i915, since, until) \ (drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == STEP_NONE), \ INTEL_DISPLAY_STEP(__i915) >= (since) && INTEL_DISPLAY_STEP(__i915) < (until)) -#define IS_GT_STEP(__i915, since, until) \ - (drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == STEP_NONE), \ - INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) < (until)) +#define IS_GRAPHICS_STEP(__i915, since, until) \ + (drm_WARN_ON(&(__i915)->drm, INTEL_GRAPHICS_STEP(__i915) == STEP_NONE), \ + INTEL_GRAPHICS_STEP(__i915) >= (since) && INTEL_GRAPHICS_STEP(__i915) < (until)) #define IS_MEDIA_STEP(__i915, since, until) \ (drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == STEP_NONE), \ @@ -1535,15 +1535,15 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define IS_TGL_Y(dev_priv) \ IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, INTEL_SUBPLATFORM_ULX) -#define IS_SKL_GT_STEP(p, since, until) (IS_SKYLAKE(p) && IS_GT_STEP(p, since, until)) +#define IS_SKL_GRAPHICS_STEP(p, since, until) (IS_SKYLAKE(p) && IS_GRAPHICS_STEP(p, since, until)) -#define IS_KBL_GT_STEP(dev_priv, since, until) \ - (IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until)) +#define IS_KBL_GRAPHICS_STEP(dev_priv, since, until) \ + (IS_KABYLAKE(dev_priv) && IS_GRAPHICS_STEP(dev_priv, since, until)) #define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \ (IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, until)) -#define IS_JSL_EHL_GT_STEP(p, since, until) \ - (IS_JSL_EHL(p) && IS_GT_STEP(p, since, until)) +#define IS_JSL_EHL_GRAPHICS_STEP(p, since, until) \ + (IS_JSL_EHL(p) && IS_GRAPHICS_STEP(p, since, until)) #define IS_JSL_EHL_DISPLAY_STEP(p, since, until) \ (IS_JSL_EHL(p) && IS_DISPLAY_STEP(p, since, until)) @@ -1551,19 +1551,19 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, (IS_TIGERLAKE(__i915) && \ IS_DISPLAY_STEP(__i915, since, until)) -#define IS_TGL_UY_GT_STEP(__i915, since, until) \ +#define IS_TGL_UY_GRAPHICS_STEP(__i915, since, until) \ ((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ - IS_GT_STEP(__i915, since, until)) + IS_GRAPHICS_STEP(__i915, since, until)) -#define IS_TGL_GT_STEP(__i915, since, until) \ +#define IS_TGL_GRAPHICS_STEP(__i915, since, until) \ (IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ - IS_GT_STEP(__i915, since, until)) + IS_GRAPHICS_STEP(__i915, since, until)) #define IS_RKL_DISPLAY_STEP(p, since, until) \ (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until)) -#define IS_DG1_GT_STEP(p, since, until) \ - (IS_DG1(p) && IS_GT_STEP(p, since, until)) +#define IS_DG1_GRAPHICS_STEP(p, since, until) \ + (IS_DG1(p) && IS_GRAPHICS_STEP(p, since, until)) #define IS_DG1_DISPLAY_STEP(p, since, until) \ (IS_DG1(p) && IS_DISPLAY_STEP(p, since, until)) @@ -1571,20 +1571,20 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, (IS_ALDERLAKE_S(__i915) && \ IS_DISPLAY_STEP(__i915, since, until)) -#define IS_ADLS_GT_STEP(__i915, since, until) \ +#define IS_ADLS_GRAPHICS_STEP(__i915, since, until) \ (IS_ALDERLAKE_S(__i915) && \ - IS_GT_STEP(__i915, since, until)) + IS_GRAPHICS_STEP(__i915, since, until)) #define IS_ADLP_DISPLAY_STEP(__i915, since, until) \ (IS_ALDERLAKE_P(__i915) && \ IS_DISPLAY_STEP(__i915, since, until)) -#define IS_ADLP_GT_STEP(__i915, since, until) \ +#define IS_ADLP_GRAPHICS_STEP(__i915, since, until) \ (IS_ALDERLAKE_P(__i915) && \ - IS_GT_STEP(__i915, since, until)) + IS_GRAPHICS_STEP(__i915, since, until)) -#define IS_XEHPSDV_GT_STEP(__i915, since, until) \ - (IS_XEHPSDV(__i915) && IS_GT_STEP(__i915, since, until)) +#define IS_XEHPSDV_GRAPHICS_STEP(__i915, since, until) \ + (IS_XEHPSDV(__i915) && IS_GRAPHICS_STEP(__i915, since, until)) /* * DG2 hardware steppings are a bit unusual. The hardware design was forked @@ -1600,9 +1600,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, * and stepping-specific logic will be applied with a general DG2-wide stepping * number. */ -#define IS_DG2_GT_STEP(__i915, variant, since, until) \ +#define IS_DG2_GRAPHICS_STEP(__i915, variant, since, until) \ (IS_SUBPLATFORM(__i915, INTEL_DG2, INTEL_SUBPLATFORM_##variant) && \ - IS_GT_STEP(__i915, since, until)) + IS_GRAPHICS_STEP(__i915, since, until)) #define IS_DG2_DISP_STEP(__i915, since, until) \ (IS_DG2(__i915) && \ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 201477ca408a5..fcc25f0fefc7a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -7473,7 +7473,7 @@ static void dg1_init_clock_gating(struct drm_i915_private *dev_priv) gen12lp_init_clock_gating(dev_priv); /* Wa_1409836686:dg1[a0] */ - if (IS_DG1_GT_STEP(dev_priv, STEP_A0, STEP_B0)) + if (IS_DG1_GRAPHICS_STEP(dev_priv, STEP_A0, STEP_B0)) intel_uncore_write(&dev_priv->uncore, GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, GEN9_CLKGATE_DIS_3) | DPT_GATING_DIS); } @@ -7521,12 +7521,12 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv) FBC_LLC_FULLY_OPEN); /* WaDisableSDEUnitClockGating:kbl */ - if (IS_KBL_GT_STEP(dev_priv, 0, STEP_C0)) + if (IS_KBL_GRAPHICS_STEP(dev_priv, 0, STEP_C0)) intel_uncore_write(&dev_priv->uncore, GEN8_UCGCTL6, intel_uncore_read(&dev_priv->uncore, GEN8_UCGCTL6) | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); /* WaDisableGamClockGating:kbl */ - if (IS_KBL_GT_STEP(dev_priv, 0, STEP_C0)) + if (IS_KBL_GRAPHICS_STEP(dev_priv, 0, STEP_C0)) intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL1, intel_uncore_read(&dev_priv->uncore, GEN6_UCGCTL1) | GEN6_GAMUNIT_CLOCK_GATE_DISABLE); diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c index 1cf8f0bb0b5e5..a4b16b9e2e55d 100644 --- a/drivers/gpu/drm/i915/intel_step.c +++ b/drivers/gpu/drm/i915/intel_step.c @@ -23,8 +23,8 @@ * use a macro to define these to make it easier to identify the platforms * where the two steppings can deviate. */ -#define COMMON_STEP(x) .gt_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x -#define COMMON_GT_MEDIA_STEP(x) .gt_step = STEP_##x, .media_step = STEP_##x +#define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x +#define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x static const struct intel_step_info skl_revids[] = { [0x6] = { COMMON_STEP(G0) }, @@ -180,7 +180,7 @@ void intel_step_init(struct drm_i915_private *i915) if (!revids) return; - if (revid < size && revids[revid].gt_step != STEP_NONE) { + if (revid < size && revids[revid].graphics_step != STEP_NONE) { step = revids[revid]; } else { drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); @@ -193,7 +193,7 @@ void intel_step_init(struct drm_i915_private *i915) * steppings in the array are not monotonically increasing, but * it's better than defaulting to 0. */ - while (revid < size && revids[revid].gt_step == STEP_NONE) + while (revid < size && revids[revid].graphics_step == STEP_NONE) revid++; if (revid < size) { @@ -202,12 +202,12 @@ void intel_step_init(struct drm_i915_private *i915) step = revids[revid]; } else { drm_dbg(&i915->drm, "Using future steppings\n"); - step.gt_step = STEP_FUTURE; + step.graphics_step = STEP_FUTURE; step.display_step = STEP_FUTURE; } } - if (drm_WARN_ON(&i915->drm, step.gt_step == STEP_NONE)) + if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) return; RUNTIME_INFO(i915)->step = step; diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h index b6ff41b7bcf59..d71a99bd51793 100644 --- a/drivers/gpu/drm/i915/intel_step.h +++ b/drivers/gpu/drm/i915/intel_step.h @@ -11,7 +11,7 @@ struct drm_i915_private; struct intel_step_info { - u8 gt_step; + u8 graphics_step; u8 display_step; u8 media_step; }; -- 2.33.1 ^ permalink raw reply related [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP 2021-10-20 0:23 ` [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP José Roberto de Souza @ 2021-10-20 15:06 ` Yokoyama, Caz 2021-11-02 7:27 ` Lucas De Marchi 1 sibling, 0 replies; 22+ messages in thread From: Yokoyama, Caz @ 2021-10-20 15:06 UTC (permalink / raw) To: intel-gfx, Souza, Jose; +Cc: Sripada, Radhakrishna, Atwood, Matthew S Looks good to me. Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> -caz On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote: > As now graphics and media can have different steppings this patch is > renaming all _GT_STEP macros to _GRAPHICS_STEP. > > Future platforms will properly choose between _MEDIA_STEP and > _GRAPHICS_STEP for each new workaround. > > Cc: Matt Atwood <matthew.s.atwood@intel.com> > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +- > drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +- > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 31 +++++++------- > drivers/gpu/drm/i915/i915_drv.h | 46 ++++++++++--------- > -- > drivers/gpu/drm/i915/intel_pm.c | 6 +-- > drivers/gpu/drm/i915/intel_step.c | 12 +++--- > drivers/gpu/drm/i915/intel_step.h | 2 +- > 8 files changed, 51 insertions(+), 52 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > index 461844dffd7ed..e320610dd0b81 100644 > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > @@ -42,7 +42,7 @@ int gen8_emit_flush_rcs(struct i915_request *rq, > u32 mode) > vf_flush_wa = true; > > /* WaForGAMHang:kbl */ > - if (IS_KBL_GT_STEP(rq->engine->i915, 0, STEP_C0)) > + if (IS_KBL_GRAPHICS_STEP(rq->engine->i915, 0, STEP_C0)) > dc_flush_wa = true; > } > > diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c > b/drivers/gpu/drm/i915/gt/intel_mocs.c > index 15f9ada28a7ab..9c253ba593c65 100644 > --- a/drivers/gpu/drm/i915/gt/intel_mocs.c > +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c > @@ -424,7 +424,7 @@ static unsigned int get_mocs_settings(const > struct drm_i915_private *i915, > > table->unused_entries_index = I915_MOCS_PTE; > if (IS_DG2(i915)) { > - if (IS_DG2_GT_STEP(i915, G10, STEP_A0, STEP_B0)) { > + if (IS_DG2_GRAPHICS_STEP(i915, G10, STEP_A0, STEP_B0)) > { > table->size = > ARRAY_SIZE(dg2_mocs_table_g10_ax); > table->table = dg2_mocs_table_g10_ax; > } else { > diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c > b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > index afb35d2e5c734..aec838ecb2ef2 100644 > --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c > +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > @@ -158,7 +158,7 @@ intel_gt_setup_fake_lmem(struct intel_gt *gt) > static bool get_legacy_lowmem_region(struct intel_uncore *uncore, > u64 *start, u32 *size) > { > - if (!IS_DG1_GT_STEP(uncore->i915, STEP_A0, STEP_C0)) > + if (!IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0)) > return false; > > *start = 0; > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c > b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index e1f3625308891..37bec83e4750c 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -482,7 +482,7 @@ static void kbl_ctx_workarounds_init(struct > intel_engine_cs *engine, > gen9_ctx_workarounds_init(engine, wal); > > /* WaToEnableHwFixForPushConstHWBug:kbl */ > - if (IS_KBL_GT_STEP(i915, STEP_C0, STEP_FOREVER)) > + if (IS_KBL_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER)) > wa_masked_en(wal, COMMON_SLICE_CHICKEN2, > GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION); > > @@ -916,7 +916,7 @@ skl_gt_workarounds_init(struct intel_gt *gt, > struct i915_wa_list *wal) > GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE); > > /* WaInPlaceDecompressionHang:skl */ > - if (IS_SKL_GT_STEP(gt->i915, STEP_A0, STEP_H0)) > + if (IS_SKL_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0)) > wa_write_or(wal, > GEN9_GAMT_ECO_REG_RW_IA, > GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS); > @@ -928,7 +928,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt, > struct i915_wa_list *wal) > gen9_gt_workarounds_init(gt, wal); > > /* WaDisableDynamicCreditSharing:kbl */ > - if (IS_KBL_GT_STEP(gt->i915, 0, STEP_C0)) > + if (IS_KBL_GRAPHICS_STEP(gt->i915, 0, STEP_C0)) > wa_write_or(wal, > GAMT_CHKN_BIT_REG, > GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING); > @@ -1136,7 +1136,7 @@ icl_gt_workarounds_init(struct intel_gt *gt, > struct i915_wa_list *wal) > > /* Wa_1607087056:icl,ehl,jsl */ > if (IS_ICELAKE(i915) || > - IS_JSL_EHL_GT_STEP(i915, STEP_A0, STEP_B0)) > + IS_JSL_EHL_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) > wa_write_or(wal, > SLICE_UNIT_LEVEL_CLKGATE, > L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); > @@ -1190,19 +1190,19 @@ tgl_gt_workarounds_init(struct intel_gt *gt, > struct i915_wa_list *wal) > gen12_gt_workarounds_init(gt, wal); > > /* Wa_1409420604:tgl */ > - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) > + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) > wa_write_or(wal, > SUBSLICE_UNIT_LEVEL_CLKGATE2, > CPSSUNIT_CLKGATE_DIS); > > /* Wa_1607087056:tgl also know as BUG:1409180338 */ > - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) > + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) > wa_write_or(wal, > SLICE_UNIT_LEVEL_CLKGATE, > L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); > > /* Wa_1408615072:tgl[a0] */ > - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) > + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) > wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2, > VSUNIT_CLKGATE_DIS_TGL); > } > @@ -1215,7 +1215,7 @@ dg1_gt_workarounds_init(struct intel_gt *gt, > struct i915_wa_list *wal) > gen12_gt_workarounds_init(gt, wal); > > /* Wa_1607087056:dg1 */ > - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0)) > + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) > wa_write_or(wal, > SLICE_UNIT_LEVEL_CLKGATE, > L3_CLKGATE_DIS | L3_CR2X_CLKGATE_DIS); > @@ -1623,7 +1623,7 @@ static void dg1_whitelist_build(struct > intel_engine_cs *engine) > tgl_whitelist_build(engine); > > /* GEN:BUG:1409280441:dg1 */ > - if (IS_DG1_GT_STEP(engine->i915, STEP_A0, STEP_B0) && > + if (IS_DG1_GRAPHICS_STEP(engine->i915, STEP_A0, STEP_B0) && > (engine->class == RENDER_CLASS || > engine->class == COPY_ENGINE_CLASS)) > whitelist_reg_ext(w, RING_ID(engine->mmio_base), > @@ -1716,8 +1716,8 @@ rcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > { > struct drm_i915_private *i915 = engine->i915; > > - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || > - IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) { > + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || > + IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) { > /* > * Wa_1607138336:tgl[a0],dg1[a0] > * Wa_1607063988:tgl[a0],dg1[a0] > @@ -1727,7 +1727,7 @@ rcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > GEN12_DISABLE_POSH_BUSY_FF_DOP_CG); > } > > - if (IS_TGL_UY_GT_STEP(i915, STEP_A0, STEP_B0)) { > + if (IS_TGL_UY_GRAPHICS_STEP(i915, STEP_A0, STEP_B0)) { > /* > * Wa_1606679103:tgl > * (see also Wa_1606682166:icl) > @@ -1762,7 +1762,7 @@ rcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > } > > if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || > - IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || > + IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || > IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { > /* Wa_1409804808:tgl,rkl,dg1[a0],adl-s,adl-p */ > wa_masked_en(wal, GEN7_ROW_CHICKEN2, > @@ -1775,8 +1775,7 @@ rcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > wa_masked_en(wal, GEN9_ROW_CHICKEN4, > GEN12_DISABLE_TDL_PUSH); > } > > - > - if (IS_DG1_GT_STEP(i915, STEP_A0, STEP_B0) || > + if (IS_DG1_GRAPHICS_STEP(i915, STEP_A0, STEP_B0) || > IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) { > /* > * Wa_1607030317:tgl > @@ -2138,7 +2137,7 @@ xcs_engine_wa_init(struct intel_engine_cs > *engine, struct i915_wa_list *wal) > struct drm_i915_private *i915 = engine->i915; > > /* WaKBLVECSSemaphoreWaitPoll:kbl */ > - if (IS_KBL_GT_STEP(i915, STEP_A0, STEP_F0)) { > + if (IS_KBL_GRAPHICS_STEP(i915, STEP_A0, STEP_F0)) { > wa_write(wal, > RING_SEMA_WAIT_POLL(engine->mmio_base), > 1); > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index 9559cda7382f2..73cd66064f014 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1348,16 +1348,16 @@ static inline struct drm_i915_private > *pdev_to_i915(struct pci_dev *pdev) > #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb) > > #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)- > >step.display_step) > -#define INTEL_GT_STEP(__i915) (RUNTIME_INFO(__i915)->step.gt_step) > +#define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)- > >step.graphics_step) > #define INTEL_MEDIA_STEP(__i915) (RUNTIME_INFO(__i915)- > >step.media_step) > > #define IS_DISPLAY_STEP(__i915, since, until) \ > (drm_WARN_ON(&(__i915)->drm, INTEL_DISPLAY_STEP(__i915) == > STEP_NONE), \ > INTEL_DISPLAY_STEP(__i915) >= (since) && > INTEL_DISPLAY_STEP(__i915) < (until)) > > -#define IS_GT_STEP(__i915, since, until) \ > - (drm_WARN_ON(&(__i915)->drm, INTEL_GT_STEP(__i915) == > STEP_NONE), \ > - INTEL_GT_STEP(__i915) >= (since) && INTEL_GT_STEP(__i915) < > (until)) > +#define IS_GRAPHICS_STEP(__i915, since, until) \ > + (drm_WARN_ON(&(__i915)->drm, INTEL_GRAPHICS_STEP(__i915) == > STEP_NONE), \ > + INTEL_GRAPHICS_STEP(__i915) >= (since) && > INTEL_GRAPHICS_STEP(__i915) < (until)) > > #define IS_MEDIA_STEP(__i915, since, until) \ > (drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == > STEP_NONE), \ > @@ -1535,15 +1535,15 @@ IS_SUBPLATFORM(const struct drm_i915_private > *i915, > #define IS_TGL_Y(dev_priv) \ > IS_SUBPLATFORM(dev_priv, INTEL_TIGERLAKE, > INTEL_SUBPLATFORM_ULX) > > -#define IS_SKL_GT_STEP(p, since, until) (IS_SKYLAKE(p) && > IS_GT_STEP(p, since, until)) > +#define IS_SKL_GRAPHICS_STEP(p, since, until) (IS_SKYLAKE(p) && > IS_GRAPHICS_STEP(p, since, until)) > > -#define IS_KBL_GT_STEP(dev_priv, since, until) \ > - (IS_KABYLAKE(dev_priv) && IS_GT_STEP(dev_priv, since, until)) > +#define IS_KBL_GRAPHICS_STEP(dev_priv, since, until) \ > + (IS_KABYLAKE(dev_priv) && IS_GRAPHICS_STEP(dev_priv, since, > until)) > #define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \ > (IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since, > until)) > > -#define IS_JSL_EHL_GT_STEP(p, since, until) \ > - (IS_JSL_EHL(p) && IS_GT_STEP(p, since, until)) > +#define IS_JSL_EHL_GRAPHICS_STEP(p, since, until) \ > + (IS_JSL_EHL(p) && IS_GRAPHICS_STEP(p, since, until)) > #define IS_JSL_EHL_DISPLAY_STEP(p, since, until) \ > (IS_JSL_EHL(p) && IS_DISPLAY_STEP(p, since, until)) > > @@ -1551,19 +1551,19 @@ IS_SUBPLATFORM(const struct drm_i915_private > *i915, > (IS_TIGERLAKE(__i915) && \ > IS_DISPLAY_STEP(__i915, since, until)) > > -#define IS_TGL_UY_GT_STEP(__i915, since, until) \ > +#define IS_TGL_UY_GRAPHICS_STEP(__i915, since, until) \ > ((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ > - IS_GT_STEP(__i915, since, until)) > + IS_GRAPHICS_STEP(__i915, since, until)) > > -#define IS_TGL_GT_STEP(__i915, since, until) \ > +#define IS_TGL_GRAPHICS_STEP(__i915, since, until) \ > (IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || > IS_TGL_Y(__i915)) && \ > - IS_GT_STEP(__i915, since, until)) > + IS_GRAPHICS_STEP(__i915, since, until)) > > #define IS_RKL_DISPLAY_STEP(p, since, until) \ > (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until)) > > -#define IS_DG1_GT_STEP(p, since, until) \ > - (IS_DG1(p) && IS_GT_STEP(p, since, until)) > +#define IS_DG1_GRAPHICS_STEP(p, since, until) \ > + (IS_DG1(p) && IS_GRAPHICS_STEP(p, since, until)) > #define IS_DG1_DISPLAY_STEP(p, since, until) \ > (IS_DG1(p) && IS_DISPLAY_STEP(p, since, until)) > > @@ -1571,20 +1571,20 @@ IS_SUBPLATFORM(const struct drm_i915_private > *i915, > (IS_ALDERLAKE_S(__i915) && \ > IS_DISPLAY_STEP(__i915, since, until)) > > -#define IS_ADLS_GT_STEP(__i915, since, until) \ > +#define IS_ADLS_GRAPHICS_STEP(__i915, since, until) \ > (IS_ALDERLAKE_S(__i915) && \ > - IS_GT_STEP(__i915, since, until)) > + IS_GRAPHICS_STEP(__i915, since, until)) > > #define IS_ADLP_DISPLAY_STEP(__i915, since, until) \ > (IS_ALDERLAKE_P(__i915) && \ > IS_DISPLAY_STEP(__i915, since, until)) > > -#define IS_ADLP_GT_STEP(__i915, since, until) \ > +#define IS_ADLP_GRAPHICS_STEP(__i915, since, until) \ > (IS_ALDERLAKE_P(__i915) && \ > - IS_GT_STEP(__i915, since, until)) > + IS_GRAPHICS_STEP(__i915, since, until)) > > -#define IS_XEHPSDV_GT_STEP(__i915, since, until) \ > - (IS_XEHPSDV(__i915) && IS_GT_STEP(__i915, since, until)) > +#define IS_XEHPSDV_GRAPHICS_STEP(__i915, since, until) \ > + (IS_XEHPSDV(__i915) && IS_GRAPHICS_STEP(__i915, since, until)) > > /* > * DG2 hardware steppings are a bit unusual. The hardware design > was forked > @@ -1600,9 +1600,9 @@ IS_SUBPLATFORM(const struct drm_i915_private > *i915, > * and stepping-specific logic will be applied with a general DG2- > wide stepping > * number. > */ > -#define IS_DG2_GT_STEP(__i915, variant, since, until) \ > +#define IS_DG2_GRAPHICS_STEP(__i915, variant, since, until) \ > (IS_SUBPLATFORM(__i915, INTEL_DG2, INTEL_SUBPLATFORM_##variant) > && \ > - IS_GT_STEP(__i915, since, until)) > + IS_GRAPHICS_STEP(__i915, since, until)) > > #define IS_DG2_DISP_STEP(__i915, since, until) \ > (IS_DG2(__i915) && \ > diff --git a/drivers/gpu/drm/i915/intel_pm.c > b/drivers/gpu/drm/i915/intel_pm.c > index 201477ca408a5..fcc25f0fefc7a 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -7473,7 +7473,7 @@ static void dg1_init_clock_gating(struct > drm_i915_private *dev_priv) > gen12lp_init_clock_gating(dev_priv); > > /* Wa_1409836686:dg1[a0] */ > - if (IS_DG1_GT_STEP(dev_priv, STEP_A0, STEP_B0)) > + if (IS_DG1_GRAPHICS_STEP(dev_priv, STEP_A0, STEP_B0)) > intel_uncore_write(&dev_priv->uncore, > GEN9_CLKGATE_DIS_3, intel_uncore_read(&dev_priv->uncore, > GEN9_CLKGATE_DIS_3) | > DPT_GATING_DIS); > } > @@ -7521,12 +7521,12 @@ static void kbl_init_clock_gating(struct > drm_i915_private *dev_priv) > FBC_LLC_FULLY_OPEN); > > /* WaDisableSDEUnitClockGating:kbl */ > - if (IS_KBL_GT_STEP(dev_priv, 0, STEP_C0)) > + if (IS_KBL_GRAPHICS_STEP(dev_priv, 0, STEP_C0)) > intel_uncore_write(&dev_priv->uncore, GEN8_UCGCTL6, > intel_uncore_read(&dev_priv->uncore, GEN8_UCGCTL6) | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > > /* WaDisableGamClockGating:kbl */ > - if (IS_KBL_GT_STEP(dev_priv, 0, STEP_C0)) > + if (IS_KBL_GRAPHICS_STEP(dev_priv, 0, STEP_C0)) > intel_uncore_write(&dev_priv->uncore, GEN6_UCGCTL1, > intel_uncore_read(&dev_priv->uncore, GEN6_UCGCTL1) | > GEN6_GAMUNIT_CLOCK_GATE_DISABLE); > > diff --git a/drivers/gpu/drm/i915/intel_step.c > b/drivers/gpu/drm/i915/intel_step.c > index 1cf8f0bb0b5e5..a4b16b9e2e55d 100644 > --- a/drivers/gpu/drm/i915/intel_step.c > +++ b/drivers/gpu/drm/i915/intel_step.c > @@ -23,8 +23,8 @@ > * use a macro to define these to make it easier to identify the > platforms > * where the two steppings can deviate. > */ > -#define COMMON_STEP(x) .gt_step = STEP_##x, .display_step = > STEP_##x, .media_step = STEP_##x > -#define COMMON_GT_MEDIA_STEP(x) .gt_step = STEP_##x, .media_step = > STEP_##x > +#define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = > STEP_##x, .media_step = STEP_##x > +#define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, > .media_step = STEP_##x > > static const struct intel_step_info skl_revids[] = { > [0x6] = { COMMON_STEP(G0) }, > @@ -180,7 +180,7 @@ void intel_step_init(struct drm_i915_private > *i915) > if (!revids) > return; > > - if (revid < size && revids[revid].gt_step != STEP_NONE) { > + if (revid < size && revids[revid].graphics_step != STEP_NONE) { > step = revids[revid]; > } else { > drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); > @@ -193,7 +193,7 @@ void intel_step_init(struct drm_i915_private > *i915) > * steppings in the array are not monotonically > increasing, but > * it's better than defaulting to 0. > */ > - while (revid < size && revids[revid].gt_step == > STEP_NONE) > + while (revid < size && revids[revid].graphics_step == > STEP_NONE) > revid++; > > if (revid < size) { > @@ -202,12 +202,12 @@ void intel_step_init(struct drm_i915_private > *i915) > step = revids[revid]; > } else { > drm_dbg(&i915->drm, "Using future > steppings\n"); > - step.gt_step = STEP_FUTURE; > + step.graphics_step = STEP_FUTURE; > step.display_step = STEP_FUTURE; > } > } > > - if (drm_WARN_ON(&i915->drm, step.gt_step == STEP_NONE)) > + if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) > return; > > RUNTIME_INFO(i915)->step = step; > diff --git a/drivers/gpu/drm/i915/intel_step.h > b/drivers/gpu/drm/i915/intel_step.h > index b6ff41b7bcf59..d71a99bd51793 100644 > --- a/drivers/gpu/drm/i915/intel_step.h > +++ b/drivers/gpu/drm/i915/intel_step.h > @@ -11,7 +11,7 @@ > struct drm_i915_private; > > struct intel_step_info { > - u8 gt_step; > + u8 graphics_step; > u8 display_step; > u8 media_step; > }; ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP 2021-10-20 0:23 ` [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP José Roberto de Souza 2021-10-20 15:06 ` Yokoyama, Caz @ 2021-11-02 7:27 ` Lucas De Marchi 1 sibling, 0 replies; 22+ messages in thread From: Lucas De Marchi @ 2021-11-02 7:27 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx On Tue, Oct 19, 2021 at 05:23:53PM -0700, Jose Souza wrote: >As now graphics and media can have different steppings this patch is >renaming all _GT_STEP macros to _GRAPHICS_STEP. > >Future platforms will properly choose between _MEDIA_STEP and >_GRAPHICS_STEP for each new workaround. > >Cc: Matt Atwood <matthew.s.atwood@intel.com> >Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> >Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza 2021-10-20 0:23 ` [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT José Roberto de Souza 2021-10-20 0:23 ` [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP José Roberto de Souza @ 2021-10-20 0:37 ` Patchwork 2021-10-20 1:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork ` (4 subsequent siblings) 7 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2021-10-20 0:37 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx == Series Details == Series: series starting with [1/3] drm/i915: Add struct to hold IP version URL : https://patchwork.freedesktop.org/series/96038/ State : warning == Summary == $ dim checkpatch origin/drm-tip 41a0609f8b33 drm/i915: Add struct to hold IP version -:44: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #44: FILE: drivers/gpu/drm/i915/i915_drv.h:1331: +#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->graphics.ver, \ + INTEL_INFO(i915)->graphics.rel) -:53: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'i915' - possible side-effects? #53: FILE: drivers/gpu/drm/i915/i915_drv.h:1337: +#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)->media.arch, \ + INTEL_INFO(i915)->media.rel) total: 0 errors, 0 warnings, 2 checks, 139 lines checked bd6fdf51759f drm/i915: Track media IP stepping separated from GT -:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #34: FILE: drivers/gpu/drm/i915/i915_drv.h:1362: +#define IS_MEDIA_STEP(__i915, since, until) \ + (drm_WARN_ON(&(__i915)->drm, INTEL_MEDIA_STEP(__i915) == STEP_NONE), \ + INTEL_MEDIA_STEP(__i915) >= (since) && INTEL_MEDIA_STEP(__i915) < (until)) total: 0 errors, 0 warnings, 1 checks, 133 lines checked 92310e925ccb drm/i915: Rename GT_STEP to GRAPHICS_STEP -:206: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #206: FILE: drivers/gpu/drm/i915/i915_drv.h:1358: +#define IS_GRAPHICS_STEP(__i915, since, until) \ + (drm_WARN_ON(&(__i915)->drm, INTEL_GRAPHICS_STEP(__i915) == STEP_NONE), \ + INTEL_GRAPHICS_STEP(__i915) >= (since) && INTEL_GRAPHICS_STEP(__i915) < (until)) -:217: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p' - possible side-effects? #217: FILE: drivers/gpu/drm/i915/i915_drv.h:1538: +#define IS_SKL_GRAPHICS_STEP(p, since, until) (IS_SKYLAKE(p) && IS_GRAPHICS_STEP(p, since, until)) -:221: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects? #221: FILE: drivers/gpu/drm/i915/i915_drv.h:1540: +#define IS_KBL_GRAPHICS_STEP(dev_priv, since, until) \ + (IS_KABYLAKE(dev_priv) && IS_GRAPHICS_STEP(dev_priv, since, until)) -:228: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p' - possible side-effects? #228: FILE: drivers/gpu/drm/i915/i915_drv.h:1545: +#define IS_JSL_EHL_GRAPHICS_STEP(p, since, until) \ + (IS_JSL_EHL(p) && IS_GRAPHICS_STEP(p, since, until)) -:238: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #238: FILE: drivers/gpu/drm/i915/i915_drv.h:1554: +#define IS_TGL_UY_GRAPHICS_STEP(__i915, since, until) \ ((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ + IS_GRAPHICS_STEP(__i915, since, until)) -:244: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #244: FILE: drivers/gpu/drm/i915/i915_drv.h:1558: +#define IS_TGL_GRAPHICS_STEP(__i915, since, until) \ (IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \ + IS_GRAPHICS_STEP(__i915, since, until)) -:254: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'p' - possible side-effects? #254: FILE: drivers/gpu/drm/i915/i915_drv.h:1565: +#define IS_DG1_GRAPHICS_STEP(p, since, until) \ + (IS_DG1(p) && IS_GRAPHICS_STEP(p, since, until)) -:264: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #264: FILE: drivers/gpu/drm/i915/i915_drv.h:1574: +#define IS_ADLS_GRAPHICS_STEP(__i915, since, until) \ (IS_ALDERLAKE_S(__i915) && \ + IS_GRAPHICS_STEP(__i915, since, until)) -:274: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #274: FILE: drivers/gpu/drm/i915/i915_drv.h:1582: +#define IS_ADLP_GRAPHICS_STEP(__i915, since, until) \ (IS_ALDERLAKE_P(__i915) && \ + IS_GRAPHICS_STEP(__i915, since, until)) -:281: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #281: FILE: drivers/gpu/drm/i915/i915_drv.h:1586: +#define IS_XEHPSDV_GRAPHICS_STEP(__i915, since, until) \ + (IS_XEHPSDV(__i915) && IS_GRAPHICS_STEP(__i915, since, until)) -:291: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #291: FILE: drivers/gpu/drm/i915/i915_drv.h:1603: +#define IS_DG2_GRAPHICS_STEP(__i915, variant, since, until) \ (IS_SUBPLATFORM(__i915, INTEL_DG2, INTEL_SUBPLATFORM_##variant) && \ + IS_GRAPHICS_STEP(__i915, since, until)) total: 0 errors, 0 warnings, 11 checks, 309 lines checked ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza ` (2 preceding siblings ...) 2021-10-20 0:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add struct to hold IP version Patchwork @ 2021-10-20 1:08 ` Patchwork 2021-10-20 5:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork ` (3 subsequent siblings) 7 siblings, 0 replies; 22+ messages in thread From: Patchwork @ 2021-10-20 1:08 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 6405 bytes --] == Series Details == Series: series starting with [1/3] drm/i915: Add struct to hold IP version URL : https://patchwork.freedesktop.org/series/96038/ State : success == Summary == CI Bug Log - changes from CI_DRM_10762 -> Patchwork_21385 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/index.html Known issues ------------ Here are the changes found in Patchwork_21385 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_basic@query-info: - fi-ilk-650: NOTRUN -> [SKIP][1] ([fdo#109271]) +35 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-ilk-650/igt@amdgpu/amd_basic@query-info.html - fi-tgl-1115g4: NOTRUN -> [SKIP][2] ([fdo#109315]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@amdgpu/amd_basic@query-info.html * igt@amdgpu/amd_cs_nop@nop-gfx0: - fi-tgl-1115g4: NOTRUN -> [SKIP][3] ([fdo#109315] / [i915#2575]) +16 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@amdgpu/amd_cs_nop@nop-gfx0.html * igt@gem_huc_copy@huc-copy: - fi-tgl-1115g4: NOTRUN -> [SKIP][4] ([i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@gem_huc_copy@huc-copy.html * igt@i915_pm_backlight@basic-brightness: - fi-tgl-1115g4: NOTRUN -> [SKIP][5] ([i915#1155]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@i915_pm_backlight@basic-brightness.html * igt@i915_selftest@live@hangcheck: - fi-snb-2600: [PASS][6] -> [INCOMPLETE][7] ([i915#3921]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/fi-snb-2600/igt@i915_selftest@live@hangcheck.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-snb-2600/igt@i915_selftest@live@hangcheck.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-tgl-1115g4: NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [PASS][9] -> [FAIL][10] ([i915#1372]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html * igt@kms_chamelium@dp-hpd-fast: - fi-ilk-650: NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-tgl-1115g4: NOTRUN -> [SKIP][12] ([i915#4103]) +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html * igt@kms_force_connector_basic@force-load-detect: - fi-tgl-1115g4: NOTRUN -> [SKIP][13] ([fdo#109285]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@kms_force_connector_basic@force-load-detect.html * igt@kms_psr@primary_mmap_gtt: - fi-tgl-1115g4: NOTRUN -> [SKIP][14] ([i915#1072]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@kms_psr@primary_mmap_gtt.html * igt@prime_vgem@basic-userptr: - fi-tgl-1115g4: NOTRUN -> [SKIP][15] ([i915#3301]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-tgl-1115g4/igt@prime_vgem@basic-userptr.html #### Possible fixes #### * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [DMESG-WARN][16] ([i915#4269]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html #### Warnings #### * igt@runner@aborted: - fi-icl-u2: [FAIL][18] ([i915#3363]) -> [FAIL][19] ([i915#3363] / [i915#4312]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/fi-icl-u2/igt@runner@aborted.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/fi-icl-u2/igt@runner@aborted.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155 [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363 [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 Participating hosts (36 -> 35) ------------------------------ Additional (2): fi-tgl-1115g4 fi-ilk-650 Missing (3): fi-icl-y fi-bsw-cyan bat-dg1-6 Build changes ------------- * Linux: CI_DRM_10762 -> Patchwork_21385 CI-20190529: 20190529 CI_DRM_10762: 448b23374caeafa59d2a057fdc1a7c069b934960 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6255: 9b0881254557edeaf273b2196309fc4e22ea0312 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_21385: 92310e925ccb118cd2a0fcb89b2fc9e9ca1a42c2 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 92310e925ccb drm/i915: Rename GT_STEP to GRAPHICS_STEP bd6fdf51759f drm/i915: Track media IP stepping separated from GT 41a0609f8b33 drm/i915: Add struct to hold IP version == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/index.html [-- Attachment #2: Type: text/html, Size: 7640 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza ` (3 preceding siblings ...) 2021-10-20 1:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork @ 2021-10-20 5:10 ` Patchwork 2021-11-02 20:04 ` Souza, Jose 2021-10-20 9:47 ` [Intel-gfx] [PATCH 1/3] " Jani Nikula ` (2 subsequent siblings) 7 siblings, 1 reply; 22+ messages in thread From: Patchwork @ 2021-10-20 5:10 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30289 bytes --] == Series Details == Series: series starting with [1/3] drm/i915: Add struct to hold IP version URL : https://patchwork.freedesktop.org/series/96038/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10762_full -> Patchwork_21385_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_21385_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_21385_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_21385_full: ### IGT changes ### #### Possible regressions #### * igt@sysfs_heartbeat_interval@precise@vcs1: - shard-tglb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb5/igt@sysfs_heartbeat_interval@precise@vcs1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@sysfs_heartbeat_interval@precise@vcs1.html Known issues ------------ Here are the changes found in Patchwork_21385_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_create@create-massive: - shard-snb: NOTRUN -> [DMESG-WARN][3] ([i915#3002]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb7/igt@gem_create@create-massive.html * igt@gem_ctx_isolation@preservation-s3@bcs0: - shard-apl: [PASS][4] -> [DMESG-WARN][5] ([i915#180]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-apl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html * igt@gem_ctx_persistence@legacy-engines-hostile-preempt: - shard-snb: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1099]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb6/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html * igt@gem_ctx_sseu@mmap-args: - shard-tglb: NOTRUN -> [SKIP][7] ([i915#280]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb8/igt@gem_ctx_sseu@mmap-args.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-tglb: NOTRUN -> [FAIL][8] ([i915#2842]) +5 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@gem_exec_fair@basic-none-vip@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][9] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html * igt@gem_exec_whisper@basic-queues-forked: - shard-glk: [PASS][10] -> [DMESG-WARN][11] ([i915#118]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-glk6/igt@gem_exec_whisper@basic-queues-forked.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-glk7/igt@gem_exec_whisper@basic-queues-forked.html * igt@gem_huc_copy@huc-copy: - shard-apl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#2190]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@gem_huc_copy@huc-copy.html * igt@gem_pxp@create-regular-context-1: - shard-tglb: NOTRUN -> [SKIP][13] ([i915#4270]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@gem_pxp@create-regular-context-1.html * igt@gem_userptr_blits@input-checking: - shard-apl: NOTRUN -> [DMESG-WARN][14] ([i915#3002]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@gem_userptr_blits@input-checking.html * igt@gem_userptr_blits@vma-merge: - shard-snb: NOTRUN -> [FAIL][15] ([i915#2724]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb7/igt@gem_userptr_blits@vma-merge.html - shard-apl: NOTRUN -> [FAIL][16] ([i915#3318]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl2/igt@gem_userptr_blits@vma-merge.html * igt@gen7_exec_parse@chained-batch: - shard-tglb: NOTRUN -> [SKIP][17] ([fdo#109289]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@gen7_exec_parse@chained-batch.html * igt@gen9_exec_parse@bb-start-out: - shard-tglb: NOTRUN -> [SKIP][18] ([i915#2856]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@gen9_exec_parse@bb-start-out.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-tglb: NOTRUN -> [WARN][19] ([i915#2681] / [i915#2684]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@i915_pm_rc6_residency@rc6-idle.html * igt@kms_async_flips@crc: - shard-skl: NOTRUN -> [FAIL][20] ([i915#4272]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl6/igt@kms_async_flips@crc.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3777]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl2/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip: - shard-skl: NOTRUN -> [FAIL][22] ([i915#3743]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3777]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_big_fb@y-tiled-8bpp-rotate-270: - shard-tglb: NOTRUN -> [SKIP][24] ([fdo#111614]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html * igt@kms_big_fb@yf-tiled-addfb-size-overflow: - shard-tglb: NOTRUN -> [SKIP][25] ([fdo#111615]) +2 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html * igt@kms_big_joiner@basic: - shard-tglb: NOTRUN -> [SKIP][26] ([i915#2705]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_big_joiner@basic.html * igt@kms_bw@linear-tiling-1-displays-3840x2160p: - shard-tglb: NOTRUN -> [FAIL][27] ([i915#1385] / [i915#4299]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html * igt@kms_bw@linear-tiling-2-displays-1920x1080p: - shard-apl: NOTRUN -> [DMESG-FAIL][28] ([i915#4298]) +1 similar issue [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_bw@linear-tiling-2-displays-1920x1080p.html * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-iclb: NOTRUN -> [SKIP][29] ([fdo#109278] / [i915#3886]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb1/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#3886]) +3 similar issues [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl2/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: - shard-tglb: NOTRUN -> [SKIP][31] ([i915#3689] / [i915#3886]) +2 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs: - shard-skl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3886]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl10/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-apl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +6 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl2/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][34] ([i915#3689]) +6 similar issues [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs.html * igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs: - shard-snb: NOTRUN -> [SKIP][35] ([fdo#109271]) +232 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb6/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs.html * igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs: - shard-apl: NOTRUN -> [SKIP][36] ([fdo#109271]) +167 similar issues [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs.html * igt@kms_chamelium@hdmi-hpd-enable-disable-mode: - shard-snb: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +10 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb7/igt@kms_chamelium@hdmi-hpd-enable-disable-mode.html * igt@kms_chamelium@vga-hpd-fast: - shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +2 similar issues [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl1/igt@kms_chamelium@vga-hpd-fast.html * igt@kms_chamelium@vga-hpd-for-each-pipe: - shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827]) +11 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl2/igt@kms_chamelium@vga-hpd-for-each-pipe.html * igt@kms_color_chamelium@pipe-a-ctm-0-5: - shard-apl: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +16 similar issues [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_color_chamelium@pipe-a-ctm-0-5.html * igt@kms_color_chamelium@pipe-a-ctm-0-75: - shard-iclb: NOTRUN -> [SKIP][41] ([fdo#109284] / [fdo#111827]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb6/igt@kms_color_chamelium@pipe-a-ctm-0-75.html * igt@kms_color_chamelium@pipe-d-ctm-red-to-blue: - shard-tglb: NOTRUN -> [SKIP][42] ([fdo#109284] / [fdo#111827]) +8 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_color_chamelium@pipe-d-ctm-red-to-blue.html * igt@kms_content_protection@dp-mst-type-1: - shard-tglb: NOTRUN -> [SKIP][43] ([i915#3116]) [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_content_protection@mei_interface: - shard-tglb: NOTRUN -> [SKIP][44] ([fdo#111828]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_content_protection@mei_interface.html * igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement: - shard-tglb: NOTRUN -> [SKIP][45] ([i915#3319]) +2 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement.html * igt@kms_cursor_crc@pipe-b-cursor-32x10-random: - shard-tglb: NOTRUN -> [SKIP][46] ([i915#3359]) +2 similar issues [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html * igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen: - shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271]) +16 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html * igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement: - shard-iclb: NOTRUN -> [SKIP][48] ([fdo#109278]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb5/igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement.html * igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen: - shard-tglb: NOTRUN -> [SKIP][49] ([fdo#109279] / [i915#3359]) +2 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-skl: NOTRUN -> [FAIL][50] ([i915#2346]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_cursor_legacy@pipe-d-torture-bo: - shard-apl: NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#533]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl8/igt@kms_cursor_legacy@pipe-d-torture-bo.html * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle: - shard-tglb: NOTRUN -> [SKIP][52] ([i915#4103]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html * igt@kms_flip@flip-vs-expired-vblank@c-edp1: - shard-skl: NOTRUN -> [FAIL][53] ([i915#79]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1: - shard-skl: [PASS][54] -> [FAIL][55] ([i915#2122]) +1 similar issue [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl1/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl2/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][56] -> [DMESG-WARN][57] ([i915#180]) +3 similar issues [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html - shard-tglb: [PASS][58] -> [INCOMPLETE][59] ([i915#2411] / [i915#456]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-suspend.html [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: - shard-tglb: NOTRUN -> [SKIP][60] ([fdo#111825]) +21 similar issues [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu: - shard-iclb: NOTRUN -> [SKIP][61] ([fdo#109280]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-apl: NOTRUN -> [DMESG-WARN][62] ([i915#180]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: - shard-apl: NOTRUN -> [FAIL][63] ([fdo#108145] / [i915#265]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl2/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html * igt@kms_plane_alpha_blend@pipe-b-alpha-basic: - shard-kbl: NOTRUN -> [FAIL][64] ([fdo#108145] / [i915#265]) +3 similar issues [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl1/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][65] ([i915#265]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-tglb: NOTRUN -> [SKIP][66] ([i915#3536]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5: - shard-skl: NOTRUN -> [SKIP][67] ([fdo#109271] / [i915#658]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5: - shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#658]) +2 similar issues [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5.html * igt@kms_psr2_sf@plane-move-sf-dmg-area-2: - shard-tglb: NOTRUN -> [SKIP][69] ([i915#2920]) [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: - shard-kbl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#658]) +2 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5.html * igt@kms_psr2_su@page_flip: - shard-tglb: NOTRUN -> [SKIP][71] ([i915#1911]) [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_sprite_mmap_gtt: - shard-iclb: [PASS][72] -> [SKIP][73] ([fdo#109441]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html * igt@kms_psr@psr2_sprite_render: - shard-tglb: NOTRUN -> [FAIL][74] ([i915#132] / [i915#3467]) +1 similar issue [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_psr@psr2_sprite_render.html * igt@kms_universal_plane@disable-primary-vs-flip-pipe-d: - shard-kbl: NOTRUN -> [SKIP][75] ([fdo#109271]) +144 similar issues [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl4/igt@kms_universal_plane@disable-primary-vs-flip-pipe-d.html * igt@kms_writeback@writeback-fb-id: - shard-kbl: NOTRUN -> [SKIP][76] ([fdo#109271] / [i915#2437]) +1 similar issue [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl1/igt@kms_writeback@writeback-fb-id.html * igt@nouveau_crc@pipe-a-source-outp-complete: - shard-tglb: NOTRUN -> [SKIP][77] ([i915#2530]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@nouveau_crc@pipe-a-source-outp-complete.html * igt@perf@polling-parameterized: - shard-skl: [PASS][78] -> [FAIL][79] ([i915#1542]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl5/igt@perf@polling-parameterized.html [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl10/igt@perf@polling-parameterized.html * igt@prime_nv_api@nv_self_import: - shard-tglb: NOTRUN -> [SKIP][80] ([fdo#109291]) +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@prime_nv_api@nv_self_import.html * igt@prime_nv_api@nv_self_import_to_different_fd: - shard-iclb: NOTRUN -> [SKIP][81] ([fdo#109291]) +1 similar issue [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb1/igt@prime_nv_api@nv_self_import_to_different_fd.html * igt@prime_vgem@fence-write-hang: - shard-tglb: NOTRUN -> [SKIP][82] ([fdo#109295]) [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@prime_vgem@fence-write-hang.html * igt@sysfs_clients@fair-7: - shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2994]) +1 similar issue [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl8/igt@sysfs_clients@fair-7.html * igt@sysfs_clients@recycle: - shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#2994]) +1 similar issue [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl4/igt@sysfs_clients@recycle.html * igt@sysfs_clients@sema-50: - shard-tglb: NOTRUN -> [SKIP][85] ([i915#2994]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@sysfs_clients@sema-50.html * igt@sysfs_clients@split-10: - shard-iclb: NOTRUN -> [SKIP][86] ([i915#2994]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb6/igt@sysfs_clients@split-10.html #### Possible fixes #### * igt@gem_eio@unwedge-stress: - shard-tglb: [TIMEOUT][87] ([i915#2369] / [i915#3063] / [i915#3648]) -> [PASS][88] [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb7/igt@gem_eio@unwedge-stress.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb7/igt@gem_eio@unwedge-stress.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [FAIL][89] ([i915#2842]) -> [PASS][90] +2 similar issues [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb7/igt@gem_exec_fair@basic-none-share@rcs0.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb7/igt@gem_exec_fair@basic-none-share@rcs0.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [FAIL][91] ([i915#2842]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_whisper@basic-queues-priority: - shard-iclb: [INCOMPLETE][93] ([i915#1895]) -> [PASS][94] [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-iclb7/igt@gem_exec_whisper@basic-queues-priority.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb1/igt@gem_exec_whisper@basic-queues-priority.html * igt@gem_spin_batch@resubmit-new-all@vecs0: - shard-skl: [DMESG-WARN][95] ([i915#1982]) -> [PASS][96] +1 similar issue [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl5/igt@gem_spin_batch@resubmit-new-all@vecs0.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl7/igt@gem_spin_batch@resubmit-new-all@vecs0.html * igt@gem_workarounds@suspend-resume: - shard-skl: [INCOMPLETE][97] ([i915#198]) -> [PASS][98] [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl2/igt@gem_workarounds@suspend-resume.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl6/igt@gem_workarounds@suspend-resume.html * igt@i915_selftest@live@hangcheck: - shard-snb: [INCOMPLETE][99] ([i915#3921]) -> [PASS][100] [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-snb7/igt@i915_selftest@live@hangcheck.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb6/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@perf@region: - shard-iclb: [INCOMPLETE][101] -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-iclb4/igt@i915_selftest@perf@region.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb5/igt@i915_selftest@perf@region.html * igt@kms_big_fb@x-tiled-32bpp-rotate-180: - shard-glk: [DMESG-WARN][103] ([i915#118]) -> [PASS][104] [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-glk6/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-glk7/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180: - shard-snb: [SKIP][105] ([fdo#109271]) -> [PASS][106] +1 similar issue [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-snb7/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-snb6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-tglb: [INCOMPLETE][107] ([i915#2411] / [i915#456]) -> [PASS][108] [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_crc@pipe-d-cursor-suspend: - shard-tglb: [INCOMPLETE][109] ([i915#2411] / [i915#4211]) -> [PASS][110] [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb7/igt@kms_cursor_crc@pipe-d-cursor-suspend.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb1/igt@kms_cursor_crc@pipe-d-cursor-suspend.html * igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][111] ([i915#2122]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-glk9/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [FAIL][113] ([i915#79]) -> [PASS][114] [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [DMESG-WARN][115] ([i915#180]) -> [PASS][116] +6 similar issues [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html - shard-apl: [DMESG-WARN][117] ([i915#180]) -> [PASS][118] +2 similar issues [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html * igt@kms_flip@plain-flip-fb-recreate@c-edp1: - shard-skl: [FAIL][119] ([i915#2122]) -> [PASS][120] [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [FAIL][121] ([i915#1188]) -> [PASS][122] +1 similar issue [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][123] ([fdo#108145] / [i915#265]) -> [PASS][124] +1 similar issue [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [SKIP][125] ([fdo#109441]) -> [PASS][126] +3 similar issues [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html * igt@perf@polling-parameterized: - shard-glk: [FAIL][127] ([i915#1542]) -> [PASS][128] [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-glk8/igt@perf@polling-parameterized.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-glk6/igt@perf@polling-parameterized.html #### Warnings #### * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [FAIL][129] ([i915#2842]) -> [SKIP][130] ([fdo#109271]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-kbl7/igt@gem_exec_fair@basic-pace@vcs1.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html * igt@kms_bw@linear-tiling-5-displays-2560x1440p: - shard-tglb: [FAIL][131] ([i915#1385]) -> [FAIL][132] ([i915#1385] / [i915#4299]) +10 similar issues [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10762/shard-tglb3/igt@kms_bw@linear-tiling-5-displays-2560x1440p.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/shard-tglb5/igt@kms_bw@linear-tiling-5-displays-2560x1440p.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1: - shard-iclb: [SKIP][133] ([i915#2920]) -> [SKIP][134] ([i == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/index.html [-- Attachment #2: Type: text/html, Size: 33713 bytes --] ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: Add struct to hold IP version 2021-10-20 5:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2021-11-02 20:04 ` Souza, Jose 0 siblings, 0 replies; 22+ messages in thread From: Souza, Jose @ 2021-11-02 20:04 UTC (permalink / raw) To: intel-gfx On Wed, 2021-10-20 at 05:10 +0000, Patchwork wrote: > Patch Details > Series: series starting with [1/3] drm/i915: Add struct to hold IP version > URL: https://patchwork.freedesktop.org/series/96038/ > State: failure > Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21385/index.html > CI Bug Log - changes from CI_DRM_10762_full -> Patchwork_21385_full > > Summary > > FAILURE > > Serious unknown changes coming with Patchwork_21385_full absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_21385_full, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > Possible new issues > > Here are the unknown changes that may have been introduced in Patchwork_21385_full: > > IGT changes > > Possible regressions > > igt@sysfs_heartbeat_interval@precise@vcs1: > shard-tglb: PASS -> INCOMPLETE Not related. Patches pushed to drm-intel-gt-next, thanks for the reviews Caz and Lucas. > Known issues > > Here are the changes found in Patchwork_21385_full that come from known issues: > > IGT changes > > Issues hit > > igt@gem_create@create-massive: > > shard-snb: NOTRUN -> DMESG-WARN ([i915#3002]) > igt@gem_ctx_isolation@preservation-s3@bcs0: > > shard-apl: PASS -> DMESG-WARN ([i915#180]) > igt@gem_ctx_persistence@legacy-engines-hostile-preempt: > > shard-snb: NOTRUN -> SKIP ([fdo#109271] / [i915#1099]) +3 similar issues > igt@gem_ctx_sseu@mmap-args: > > shard-tglb: NOTRUN -> SKIP ([i915#280]) +1 similar issue > igt@gem_exec_fair@basic-none-vip@rcs0: > > shard-tglb: NOTRUN -> FAIL ([i915#2842]) +5 similar issues > igt@gem_exec_fair@basic-pace@vcs1: > > shard-iclb: NOTRUN -> FAIL ([i915#2842]) > igt@gem_exec_whisper@basic-queues-forked: > > shard-glk: PASS -> DMESG-WARN ([i915#118]) +1 similar issue > igt@gem_huc_copy@huc-copy: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#2190]) > igt@gem_pxp@create-regular-context-1: > > shard-tglb: NOTRUN -> SKIP ([i915#4270]) > igt@gem_userptr_blits@input-checking: > > shard-apl: NOTRUN -> DMESG-WARN ([i915#3002]) +1 similar issue > igt@gem_userptr_blits@vma-merge: > > shard-snb: NOTRUN -> FAIL ([i915#2724]) > > shard-apl: NOTRUN -> FAIL ([i915#3318]) > > igt@gen7_exec_parse@chained-batch: > > shard-tglb: NOTRUN -> SKIP ([fdo#109289]) > igt@gen9_exec_parse@bb-start-out: > > shard-tglb: NOTRUN -> SKIP ([i915#2856]) > igt@i915_pm_rc6_residency@rc6-idle: > > shard-tglb: NOTRUN -> WARN ([i915#2681] / [i915#2684]) > igt@kms_async_flips@crc: > > shard-skl: NOTRUN -> FAIL ([i915#4272]) > igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [i915#3777]) +1 similar issue > igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip: > > shard-skl: NOTRUN -> FAIL ([i915#3743]) > igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#3777]) > igt@kms_big_fb@y-tiled-8bpp-rotate-270: > > shard-tglb: NOTRUN -> SKIP ([fdo#111614]) > igt@kms_big_fb@yf-tiled-addfb-size-overflow: > > shard-tglb: NOTRUN -> SKIP ([fdo#111615]) +2 similar issues > igt@kms_big_joiner@basic: > > shard-tglb: NOTRUN -> SKIP ([i915#2705]) > igt@kms_bw@linear-tiling-1-displays-3840x2160p: > > shard-tglb: NOTRUN -> FAIL ([i915#1385] / [i915#4299]) > igt@kms_bw@linear-tiling-2-displays-1920x1080p: > > shard-apl: NOTRUN -> DMESG-FAIL ([i915#4298]) +1 similar issue > igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: > > shard-iclb: NOTRUN -> SKIP ([fdo#109278] / [i915#3886]) > igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [i915#3886]) +3 similar issues > igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs: > > shard-tglb: NOTRUN -> SKIP ([i915#3689] / [i915#3886]) +2 similar issues > igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_mc_ccs: > > shard-skl: NOTRUN -> SKIP ([fdo#109271] / [i915#3886]) > igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#3886]) +6 similar issues > igt@kms_ccs@pipe-c-crc-sprite-planes-basic-yf_tiled_ccs: > > shard-tglb: NOTRUN -> SKIP ([i915#3689]) +6 similar issues > igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_ccs: > > shard-snb: NOTRUN -> SKIP ([fdo#109271]) +232 similar issues > igt@kms_ccs@pipe-d-crc-primary-rotation-180-yf_tiled_ccs: > > shard-apl: NOTRUN -> SKIP ([fdo#109271]) +167 similar issues > igt@kms_chamelium@hdmi-hpd-enable-disable-mode: > > shard-snb: NOTRUN -> SKIP ([fdo#109271] / [fdo#111827]) +10 similar issues > igt@kms_chamelium@vga-hpd-fast: > > shard-skl: NOTRUN -> SKIP ([fdo#109271] / [fdo#111827]) +2 similar issues > igt@kms_chamelium@vga-hpd-for-each-pipe: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [fdo#111827]) +11 similar issues > igt@kms_color_chamelium@pipe-a-ctm-0-5: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [fdo#111827]) +16 similar issues > igt@kms_color_chamelium@pipe-a-ctm-0-75: > > shard-iclb: NOTRUN -> SKIP ([fdo#109284] / [fdo#111827]) > igt@kms_color_chamelium@pipe-d-ctm-red-to-blue: > > shard-tglb: NOTRUN -> SKIP ([fdo#109284] / [fdo#111827]) +8 similar issues > igt@kms_content_protection@dp-mst-type-1: > > shard-tglb: NOTRUN -> SKIP ([i915#3116]) > igt@kms_content_protection@mei_interface: > > shard-tglb: NOTRUN -> SKIP ([fdo#111828]) > igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement: > > shard-tglb: NOTRUN -> SKIP ([i915#3319]) +2 similar issues > igt@kms_cursor_crc@pipe-b-cursor-32x10-random: > > shard-tglb: NOTRUN -> SKIP ([i915#3359]) +2 similar issues > igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen: > > shard-skl: NOTRUN -> SKIP ([fdo#109271]) +16 similar issues > igt@kms_cursor_crc@pipe-c-cursor-32x10-rapid-movement: > > shard-iclb: NOTRUN -> SKIP ([fdo#109278]) > igt@kms_cursor_crc@pipe-d-cursor-512x512-offscreen: > > shard-tglb: NOTRUN -> SKIP ([fdo#109279] / [i915#3359]) +2 similar issues > igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: > > shard-skl: NOTRUN -> FAIL ([i915#2346]) > igt@kms_cursor_legacy@pipe-d-torture-bo: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#533]) > igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle: > > shard-tglb: NOTRUN -> SKIP ([i915#4103]) > igt@kms_flip@flip-vs-expired-vblank@c-edp1: > > shard-skl: NOTRUN -> FAIL ([i915#79]) > igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1: > > shard-skl: PASS -> FAIL ([i915#2122]) +1 similar issue > igt@kms_frontbuffer_tracking@fbc-suspend: > > shard-kbl: PASS -> DMESG-WARN ([i915#180]) +3 similar issues > > shard-tglb: PASS -> INCOMPLETE ([i915#2411] / [i915#456]) > > igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-shrfb-plflip-blt: > > shard-tglb: NOTRUN -> SKIP ([fdo#111825]) +21 similar issues > igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-cpu: > > shard-iclb: NOTRUN -> SKIP ([fdo#109280]) > igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: > > shard-apl: NOTRUN -> DMESG-WARN ([i915#180]) > igt@kms_plane_alpha_blend@pipe-a-alpha-7efc: > > shard-apl: NOTRUN -> FAIL ([fdo#108145] / [i915#265]) > igt@kms_plane_alpha_blend@pipe-b-alpha-basic: > > shard-kbl: NOTRUN -> FAIL ([fdo#108145] / [i915#265]) +3 similar issues > igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb: > > shard-apl: NOTRUN -> FAIL ([i915#265]) > igt@kms_plane_lowres@pipe-a-tiling-x: > > shard-tglb: NOTRUN -> SKIP ([i915#3536]) > igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5: > > shard-skl: NOTRUN -> SKIP ([fdo#109271] / [i915#658]) > igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-5: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#658]) +2 similar issues > igt@kms_psr2_sf@plane-move-sf-dmg-area-2: > > shard-tglb: NOTRUN -> SKIP ([i915#2920]) > igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-5: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [i915#658]) +2 similar issues > igt@kms_psr2_su@page_flip: > > shard-tglb: NOTRUN -> SKIP ([i915#1911]) > igt@kms_psr@psr2_sprite_mmap_gtt: > > shard-iclb: PASS -> SKIP ([fdo#109441]) > igt@kms_psr@psr2_sprite_render: > > shard-tglb: NOTRUN -> FAIL ([i915#132] / [i915#3467]) +1 similar issue > igt@kms_universal_plane@disable-primary-vs-flip-pipe-d: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271]) +144 similar issues > igt@kms_writeback@writeback-fb-id: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [i915#2437]) +1 similar issue > igt@nouveau_crc@pipe-a-source-outp-complete: > > shard-tglb: NOTRUN -> SKIP ([i915#2530]) > igt@perf@polling-parameterized: > > shard-skl: PASS -> FAIL ([i915#1542]) > igt@prime_nv_api@nv_self_import: > > shard-tglb: NOTRUN -> SKIP ([fdo#109291]) +1 similar issue > igt@prime_nv_api@nv_self_import_to_different_fd: > > shard-iclb: NOTRUN -> SKIP ([fdo#109291]) +1 similar issue > igt@prime_vgem@fence-write-hang: > > shard-tglb: NOTRUN -> SKIP ([fdo#109295]) > igt@sysfs_clients@fair-7: > > shard-apl: NOTRUN -> SKIP ([fdo#109271] / [i915#2994]) +1 similar issue > igt@sysfs_clients@recycle: > > shard-kbl: NOTRUN -> SKIP ([fdo#109271] / [i915#2994]) +1 similar issue > igt@sysfs_clients@sema-50: > > shard-tglb: NOTRUN -> SKIP ([i915#2994]) > igt@sysfs_clients@split-10: > > shard-iclb: NOTRUN -> SKIP ([i915#2994]) > Possible fixes > > igt@gem_eio@unwedge-stress: > > shard-tglb: TIMEOUT ([i915#2369] / [i915#3063] / [i915#3648]) -> PASS > igt@gem_exec_fair@basic-none-share@rcs0: > > shard-tglb: FAIL ([i915#2842]) -> PASS +2 similar issues > igt@gem_exec_fair@basic-throttle@rcs0: > > shard-iclb: FAIL ([i915#2842]) -> PASS > igt@gem_exec_whisper@basic-queues-priority: > > shard-iclb: INCOMPLETE ([i915#1895]) -> PASS > igt@gem_spin_batch@resubmit-new-all@vecs0: > > shard-skl: DMESG-WARN ([i915#1982]) -> PASS +1 similar issue > igt@gem_workarounds@suspend-resume: > > shard-skl: INCOMPLETE ([i915#198]) -> PASS > igt@i915_selftest@live@hangcheck: > > shard-snb: INCOMPLETE ([i915#3921]) -> PASS > igt@i915_selftest@perf@region: > > shard-iclb: INCOMPLETE -> PASS > igt@kms_big_fb@x-tiled-32bpp-rotate-180: > > shard-glk: DMESG-WARN ([i915#118]) -> PASS > igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180: > > shard-snb: SKIP ([fdo#109271]) -> PASS +1 similar issue > igt@kms_cursor_crc@pipe-c-cursor-suspend: > > shard-tglb: INCOMPLETE ([i915#2411] / [i915#456]) -> PASS > igt@kms_cursor_crc@pipe-d-cursor-suspend: > > shard-tglb: INCOMPLETE ([i915#2411] / [i915#4211]) -> PASS > igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2: > > shard-glk: FAIL ([i915#2122]) -> PASS > igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: > > shard-skl: FAIL ([i915#79]) -> PASS > igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: > > shard-kbl: DMESG-WARN ([i915#180]) -> PASS +6 similar issues > > shard-apl: DMESG-WARN ([i915#180]) -> PASS +2 similar issues > > igt@kms_flip@plain-flip-fb-recreate@c-edp1: > > shard-skl: FAIL ([i915#2122]) -> PASS > igt@kms_hdr@bpc-switch-dpms: > > shard-skl: FAIL ([i915#1188]) -> PASS +1 similar issue > igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: > > shard-skl: FAIL ([fdo#108145] / [i915#265]) -> PASS +1 similar issue > igt@kms_psr@psr2_sprite_plane_move: > > shard-iclb: SKIP ([fdo#109441]) -> PASS +3 similar issues > igt@perf@polling-parameterized: > > shard-glk: FAIL ([i915#1542]) -> PASS > Warnings > > igt@gem_exec_fair@basic-pace@vcs1: > > shard-kbl: FAIL ([i915#2842]) -> SKIP ([fdo#109271]) > igt@kms_bw@linear-tiling-5-displays-2560x1440p: > > shard-tglb: FAIL ([i915#1385]) -> FAIL ([i915#1385] / [i915#4299]) +10 similar issues > igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1: > > shard-iclb: [SKIP][133] ([i915#2920]) -> [SKIP][134] ([i ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza ` (4 preceding siblings ...) 2021-10-20 5:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork @ 2021-10-20 9:47 ` Jani Nikula 2021-10-20 19:29 ` Souza, Jose 2021-10-20 15:00 ` Yokoyama, Caz 2021-11-02 7:32 ` Lucas De Marchi 7 siblings, 1 reply; 22+ messages in thread From: Jani Nikula @ 2021-10-20 9:47 UTC (permalink / raw) To: José Roberto de Souza, intel-gfx Cc: Radhakrishna Sripada, Matt Atwood, José Roberto de Souza, Joonas Lahtinen, Rodrigo Vivi, ville.syrjala, Daniel Vetter, Tvrtko Ursulin On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: > The constant platform display version is not using this new struct but > the runtime variant will definitely use it. Cc: Some more folks to hijack this thread. Sorry! ;) We added runtime info to i915, because we had this idea and goal of turning the device info to a truly const pointer to the info structures in i915_pci.c that are stored in rodata. The idea was that we'll have a complete split of mutable and immutable device data, with all the mutable data in runtime info. Alas, we never got there. More and more data that was mostly const but sometimes needed tweaking kept piling up. mkwrite_device_info() was supposed to be a clue not to modify device info runtime, but instead it proliferated. Now we have places like intel_fbc_init() disabling FBC through that. But most importantly, we have fusing that considerably changes the device info, and the copying all of that data over to runtime info probably isn't worth it. Should we just acknowledge that the runtime info is useless, and move some of that data to intel_device_info and some of it elsewhere in i915? BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 9:47 ` [Intel-gfx] [PATCH 1/3] " Jani Nikula @ 2021-10-20 19:29 ` Souza, Jose 2021-10-21 13:11 ` Jani Nikula 0 siblings, 1 reply; 22+ messages in thread From: Souza, Jose @ 2021-10-20 19:29 UTC (permalink / raw) To: intel-gfx, jani.nikula Cc: Sripada, Radhakrishna, joonas.lahtinen, Vivi, Rodrigo, ville.syrjala, Atwood, Matthew S, daniel.vetter, tvrtko.ursulin On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote: > On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: > > The constant platform display version is not using this new struct but > > the runtime variant will definitely use it. > > Cc: Some more folks to hijack this thread. Sorry! ;) > > We added runtime info to i915, because we had this idea and goal of > turning the device info to a truly const pointer to the info structures > in i915_pci.c that are stored in rodata. The idea was that we'll have a > complete split of mutable and immutable device data, with all the > mutable data in runtime info. > > Alas, we never got there. More and more data that was mostly const but > sometimes needed tweaking kept piling up. mkwrite_device_info() was > supposed to be a clue not to modify device info runtime, but instead it > proliferated. Now we have places like intel_fbc_init() disabling FBC > through that. But most importantly, we have fusing that considerably > changes the device info, and the copying all of that data over to > runtime info probably isn't worth it. > > Should we just acknowledge that the runtime info is useless, and move > some of that data to intel_device_info and some of it elsewhere in i915? With newer platforms getting more and more modular, I believe we will need to store even more mutable platform information. In my opinion a separation of immutable and mutable platform information is cleaner and easier to maintain. > > > BR, > Jani. > ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 19:29 ` Souza, Jose @ 2021-10-21 13:11 ` Jani Nikula 2021-10-22 20:15 ` Lucas De Marchi 0 siblings, 1 reply; 22+ messages in thread From: Jani Nikula @ 2021-10-21 13:11 UTC (permalink / raw) To: Souza, Jose, intel-gfx Cc: Sripada, Radhakrishna, joonas.lahtinen, Vivi, Rodrigo, ville.syrjala, Atwood, Matthew S, daniel.vetter, tvrtko.ursulin On Wed, 20 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote: > On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote: >> On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: >> > The constant platform display version is not using this new struct but >> > the runtime variant will definitely use it. >> >> Cc: Some more folks to hijack this thread. Sorry! ;) >> >> We added runtime info to i915, because we had this idea and goal of >> turning the device info to a truly const pointer to the info structures >> in i915_pci.c that are stored in rodata. The idea was that we'll have a >> complete split of mutable and immutable device data, with all the >> mutable data in runtime info. >> >> Alas, we never got there. More and more data that was mostly const but >> sometimes needed tweaking kept piling up. mkwrite_device_info() was >> supposed to be a clue not to modify device info runtime, but instead it >> proliferated. Now we have places like intel_fbc_init() disabling FBC >> through that. But most importantly, we have fusing that considerably >> changes the device info, and the copying all of that data over to >> runtime info probably isn't worth it. >> >> Should we just acknowledge that the runtime info is useless, and move >> some of that data to intel_device_info and some of it elsewhere in i915? > > With newer platforms getting more and more modular, I believe we will > need to store even more mutable platform information. > > In my opinion a separation of immutable and mutable platform > information is cleaner and easier to maintain. Yeah, that's kind of what the original point was with device and runtime info split. It's just that a lot of the supposedly immutable platform info has turned into mutable information. I think either we need to properly follow through with that idea, and only store a const struct intel_device_info * to the rodata in i915_pci.c, or just scrap it. None of this "almost immutable" business that we currently have. "Almost immutable" means "mutable". The main problem is that we'll still want to have the initial values in static data. One idea is something like this: struct intel_device_info { const struct intel_runtime_info *runtime_info; /* ... */ }; static const struct intel_device_info i965g_info = { .runtime_info = &i965g_initial_runtime_info; /* ... */ }; And things like .pipe_mask would be part of struct intel_runtime_info. You'd copy the stuff over from intel_device_info runtime_info member to i915->__runtime, but i915->__info would be a const pointer to the device info. You'd never access the runtime_info member after of intel_device_info after probe. It's just really painful, for instance because we already have two sets of flags, display and non-display, and those would be multiplied to mutable/immutable. And we should probably increase, not decrease, the split between display and non-display. The macro horror show of i915_pci.c would just grow worse. BR, Jani. > >> >> >> BR, >> Jani. >> > -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-21 13:11 ` Jani Nikula @ 2021-10-22 20:15 ` Lucas De Marchi 2021-10-25 9:04 ` Jani Nikula 0 siblings, 1 reply; 22+ messages in thread From: Lucas De Marchi @ 2021-10-22 20:15 UTC (permalink / raw) To: Jani Nikula Cc: Souza, Jose, intel-gfx, Sripada, Radhakrishna, joonas.lahtinen, Vivi, Rodrigo, ville.syrjala, Atwood, Matthew S, daniel.vetter, tvrtko.ursulin On Thu, Oct 21, 2021 at 04:11:26PM +0300, Jani Nikula wrote: >On Wed, 20 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote: >> On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote: >>> On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: >>> > The constant platform display version is not using this new struct but >>> > the runtime variant will definitely use it. >>> >>> Cc: Some more folks to hijack this thread. Sorry! ;) >>> >>> We added runtime info to i915, because we had this idea and goal of >>> turning the device info to a truly const pointer to the info structures >>> in i915_pci.c that are stored in rodata. The idea was that we'll have a >>> complete split of mutable and immutable device data, with all the >>> mutable data in runtime info. >>> >>> Alas, we never got there. More and more data that was mostly const but >>> sometimes needed tweaking kept piling up. mkwrite_device_info() was >>> supposed to be a clue not to modify device info runtime, but instead it >>> proliferated. Now we have places like intel_fbc_init() disabling FBC >>> through that. But most importantly, we have fusing that considerably >>> changes the device info, and the copying all of that data over to >>> runtime info probably isn't worth it. >>> >>> Should we just acknowledge that the runtime info is useless, and move >>> some of that data to intel_device_info and some of it elsewhere in i915? >> >> With newer platforms getting more and more modular, I believe we will >> need to store even more mutable platform information. >> >> In my opinion a separation of immutable and mutable platform >> information is cleaner and easier to maintain. > >Yeah, that's kind of what the original point was with device and runtime >info split. It's just that a lot of the supposedly immutable platform >info has turned into mutable information. > >I think either we need to properly follow through with that idea, and >only store a const struct intel_device_info * to the rodata in >i915_pci.c, or just scrap it. None of this "almost immutable" business >that we currently have. "Almost immutable" means "mutable". > >The main problem is that we'll still want to have the initial values in >static data. One idea is something like this: > >struct intel_device_info { > const struct intel_runtime_info *runtime_info; > /* ... */ >}; > >static const struct intel_device_info i965g_info = { > .runtime_info = &i965g_initial_runtime_info; > /* ... */ >}; > >And things like .pipe_mask would be part of struct >intel_runtime_info. You'd copy the stuff over from intel_device_info >runtime_info member to i915->__runtime, but i915->__info would be a >const pointer to the device info. You'd never access the runtime_info >member after of intel_device_info after probe. I like this approach. I think the only problem would be that if someone inadvertently do a i915->__info->runtime_info they will be accessing the wrong data. So maybe to be clear do struct intel_device_info { const void *initial_runtime_info; /* ... */ }; static const struct intel_device_info i965g_info = { .initial_runtime_info = &i965g_initial_runtime_info; /* ... */ }; this would make it opaque and even hint by the name so the developer is not tempted to add a cast. Lucas De Marchi > >It's just really painful, for instance because we already have two sets >of flags, display and non-display, and those would be multiplied to >mutable/immutable. And we should probably increase, not decrease, the >split between display and non-display. The macro horror show of >i915_pci.c would just grow worse. > > >BR, >Jani. > > > >> >>> >>> >>> BR, >>> Jani. >>> >> > >-- >Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-22 20:15 ` Lucas De Marchi @ 2021-10-25 9:04 ` Jani Nikula 2021-11-02 5:33 ` Souza, Jose 0 siblings, 1 reply; 22+ messages in thread From: Jani Nikula @ 2021-10-25 9:04 UTC (permalink / raw) To: Lucas De Marchi Cc: Souza, Jose, intel-gfx, Sripada, Radhakrishna, joonas.lahtinen, Vivi, Rodrigo, ville.syrjala, Atwood, Matthew S, daniel.vetter, tvrtko.ursulin On Fri, 22 Oct 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > On Thu, Oct 21, 2021 at 04:11:26PM +0300, Jani Nikula wrote: >>On Wed, 20 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote: >>> On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote: >>>> On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: >>>> > The constant platform display version is not using this new struct but >>>> > the runtime variant will definitely use it. >>>> >>>> Cc: Some more folks to hijack this thread. Sorry! ;) >>>> >>>> We added runtime info to i915, because we had this idea and goal of >>>> turning the device info to a truly const pointer to the info structures >>>> in i915_pci.c that are stored in rodata. The idea was that we'll have a >>>> complete split of mutable and immutable device data, with all the >>>> mutable data in runtime info. >>>> >>>> Alas, we never got there. More and more data that was mostly const but >>>> sometimes needed tweaking kept piling up. mkwrite_device_info() was >>>> supposed to be a clue not to modify device info runtime, but instead it >>>> proliferated. Now we have places like intel_fbc_init() disabling FBC >>>> through that. But most importantly, we have fusing that considerably >>>> changes the device info, and the copying all of that data over to >>>> runtime info probably isn't worth it. >>>> >>>> Should we just acknowledge that the runtime info is useless, and move >>>> some of that data to intel_device_info and some of it elsewhere in i915? >>> >>> With newer platforms getting more and more modular, I believe we will >>> need to store even more mutable platform information. >>> >>> In my opinion a separation of immutable and mutable platform >>> information is cleaner and easier to maintain. >> >>Yeah, that's kind of what the original point was with device and runtime >>info split. It's just that a lot of the supposedly immutable platform >>info has turned into mutable information. >> >>I think either we need to properly follow through with that idea, and >>only store a const struct intel_device_info * to the rodata in >>i915_pci.c, or just scrap it. None of this "almost immutable" business >>that we currently have. "Almost immutable" means "mutable". >> >>The main problem is that we'll still want to have the initial values in >>static data. One idea is something like this: >> >>struct intel_device_info { >> const struct intel_runtime_info *runtime_info; >> /* ... */ >>}; >> >>static const struct intel_device_info i965g_info = { >> .runtime_info = &i965g_initial_runtime_info; >> /* ... */ >>}; >> >>And things like .pipe_mask would be part of struct >>intel_runtime_info. You'd copy the stuff over from intel_device_info >>runtime_info member to i915->__runtime, but i915->__info would be a >>const pointer to the device info. You'd never access the runtime_info >>member after of intel_device_info after probe. > > > I like this approach. I think the only problem would be that if someone > inadvertently do a i915->__info->runtime_info they will be accessing the > wrong data. So maybe to be clear do > > struct intel_device_info { > const void *initial_runtime_info; > /* ... */ > }; > > static const struct intel_device_info i965g_info = { > .initial_runtime_info = &i965g_initial_runtime_info; > /* ... */ > }; > > this would make it opaque and even hint by the name so the developer is > not tempted to add a cast. I think that's all fairly straightforward. Any ideas on how to do the flags split cleanly, though? I already dislike the DEV_INFO_FOR_EACH_FLAG() and DEV_INFO_DISPLAY_FOR_EACH_FLAG() split. BR, Jani. > > Lucas De Marchi > >> >>It's just really painful, for instance because we already have two sets >>of flags, display and non-display, and those would be multiplied to >>mutable/immutable. And we should probably increase, not decrease, the >>split between display and non-display. The macro horror show of >>i915_pci.c would just grow worse. >> >> >>BR, >>Jani. >> >> >> >>> >>>> >>>> >>>> BR, >>>> Jani. >>>> >>> >> >>-- >>Jani Nikula, Intel Open Source Graphics Center -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-25 9:04 ` Jani Nikula @ 2021-11-02 5:33 ` Souza, Jose 0 siblings, 0 replies; 22+ messages in thread From: Souza, Jose @ 2021-11-02 5:33 UTC (permalink / raw) To: jani.nikula, De Marchi, Lucas; +Cc: daniel.vetter, intel-gfx On Mon, 2021-10-25 at 12:04 +0300, Jani Nikula wrote: > On Fri, 22 Oct 2021, Lucas De Marchi <lucas.demarchi@intel.com> wrote: > > On Thu, Oct 21, 2021 at 04:11:26PM +0300, Jani Nikula wrote: > > > On Wed, 20 Oct 2021, "Souza, Jose" <jose.souza@intel.com> wrote: > > > > On Wed, 2021-10-20 at 12:47 +0300, Jani Nikula wrote: > > > > > On Tue, 19 Oct 2021, José Roberto de Souza <jose.souza@intel.com> wrote: > > > > > > The constant platform display version is not using this new struct but > > > > > > the runtime variant will definitely use it. > > > > > > > > > > Cc: Some more folks to hijack this thread. Sorry! ;) > > > > > > > > > > We added runtime info to i915, because we had this idea and goal of > > > > > turning the device info to a truly const pointer to the info structures > > > > > in i915_pci.c that are stored in rodata. The idea was that we'll have a > > > > > complete split of mutable and immutable device data, with all the > > > > > mutable data in runtime info. > > > > > > > > > > Alas, we never got there. More and more data that was mostly const but > > > > > sometimes needed tweaking kept piling up. mkwrite_device_info() was > > > > > supposed to be a clue not to modify device info runtime, but instead it > > > > > proliferated. Now we have places like intel_fbc_init() disabling FBC > > > > > through that. But most importantly, we have fusing that considerably > > > > > changes the device info, and the copying all of that data over to > > > > > runtime info probably isn't worth it. > > > > > > > > > > Should we just acknowledge that the runtime info is useless, and move > > > > > some of that data to intel_device_info and some of it elsewhere in i915? > > > > > > > > With newer platforms getting more and more modular, I believe we will > > > > need to store even more mutable platform information. > > > > > > > > In my opinion a separation of immutable and mutable platform > > > > information is cleaner and easier to maintain. > > > > > > Yeah, that's kind of what the original point was with device and runtime > > > info split. It's just that a lot of the supposedly immutable platform > > > info has turned into mutable information. > > > > > > I think either we need to properly follow through with that idea, and > > > only store a const struct intel_device_info * to the rodata in > > > i915_pci.c, or just scrap it. None of this "almost immutable" business > > > that we currently have. "Almost immutable" means "mutable". > > > > > > The main problem is that we'll still want to have the initial values in > > > static data. One idea is something like this: > > > > > > struct intel_device_info { > > > const struct intel_runtime_info *runtime_info; > > > /* ... */ > > > }; > > > > > > static const struct intel_device_info i965g_info = { > > > .runtime_info = &i965g_initial_runtime_info; > > > /* ... */ > > > }; > > > > > > And things like .pipe_mask would be part of struct > > > intel_runtime_info. You'd copy the stuff over from intel_device_info > > > runtime_info member to i915->__runtime, but i915->__info would be a > > > const pointer to the device info. You'd never access the runtime_info > > > member after of intel_device_info after probe. > > > > > > I like this approach. I think the only problem would be that if someone > > inadvertently do a i915->__info->runtime_info they will be accessing the > > wrong data. So maybe to be clear do > > > > struct intel_device_info { > > const void *initial_runtime_info; > > /* ... */ > > }; > > > > static const struct intel_device_info i965g_info = { > > .initial_runtime_info = &i965g_initial_runtime_info; > > /* ... */ > > }; > > > > this would make it opaque and even hint by the name so the developer is > > not tempted to add a cast. > > I think that's all fairly straightforward. Any ideas on how to do the > flags split cleanly, though? I already dislike the > DEV_INFO_FOR_EACH_FLAG() and DEV_INFO_DISPLAY_FOR_EACH_FLAG() split. Just to be sure, this discussion that Jani started can be build on top of this patch right? Will try to get someone to review the remaining patch of this series to merge it. > > BR, > Jani. > > > > > > > Lucas De Marchi > > > > > > > > It's just really painful, for instance because we already have two sets > > > of flags, display and non-display, and those would be multiplied to > > > mutable/immutable. And we should probably increase, not decrease, the > > > split between display and non-display. The macro horror show of > > > i915_pci.c would just grow worse. > > > > > > > > > BR, > > > Jani. > > > > > > > > > > > > > > > > > > > > > > > > > > > > BR, > > > > > Jani. > > > > > > > > > > > > > > > -- > > > Jani Nikula, Intel Open Source Graphics Center > ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza ` (5 preceding siblings ...) 2021-10-20 9:47 ` [Intel-gfx] [PATCH 1/3] " Jani Nikula @ 2021-10-20 15:00 ` Yokoyama, Caz 2021-10-20 19:19 ` Souza, Jose 2021-11-02 7:32 ` Lucas De Marchi 7 siblings, 1 reply; 22+ messages in thread From: Yokoyama, Caz @ 2021-10-20 15:00 UTC (permalink / raw) To: intel-gfx, Souza, Jose; +Cc: Sripada, Radhakrishna, Atwood, Matthew S On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote: > Adding a structure to standardize access to IP versioning as future > platforms will have this information populated at runtime. > > The constant platform display version is not using this new struct > but > the runtime variant will definitely use it. > > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > Cc: Matt Atwood <matthew.s.atwood@intel.com> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > --- > drivers/gpu/drm/i915/i915_drv.c | 2 +- > drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------ > drivers/gpu/drm/i915/i915_pci.c | 18 +++++++++------ > --- > drivers/gpu/drm/i915/intel_device_info.c | 19 ++++++++++++----- > -- > drivers/gpu/drm/i915/intel_device_info.h | 12 ++++++++---- > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 +- > 6 files changed, 37 insertions(+), 28 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > b/drivers/gpu/drm/i915/i915_drv.c > index 1e5b75ae99329..bdf85d202c55c 100644 > --- a/drivers/gpu/drm/i915/i915_drv.c > +++ b/drivers/gpu/drm/i915/i915_drv.c > @@ -808,7 +808,7 @@ int i915_driver_probe(struct pci_dev *pdev, const > struct pci_device_id *ent) > return PTR_ERR(i915); > > /* Disable nuclear pageflip by default on pre-ILK */ > - if (!i915->params.nuclear_pageflip && match_info->graphics_ver > < 5) > + if (!i915->params.nuclear_pageflip && match_info->graphics.ver > < 5) I don't find any difference on this and the similar modifications below. Am I missing something? -caz > i915->drm.driver_features &= ~DRIVER_ATOMIC; > > /* > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index 12256218634f4..26b6e2b8bb5e8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1327,15 +1327,15 @@ static inline struct drm_i915_private > *pdev_to_i915(struct pci_dev *pdev) > > #define IP_VER(ver, rel) ((ver) << 8 | (rel)) > > -#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > >graphics_ver) > -#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > ->graphics_ver, \ > - INTEL_INFO(i915)- > >graphics_rel) > +#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > >graphics.ver) > +#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > ->graphics.ver, \ > + INTEL_INFO(i915)- > >graphics.rel) > #define IS_GRAPHICS_VER(i915, from, until) \ > (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until)) > > -#define MEDIA_VER(i915) (INTEL_INFO(i915)- > >media_ver) > -#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > >media_ver, \ > - INTEL_INFO(i915)- > >media_rel) > +#define MEDIA_VER(i915) (INTEL_INFO(i915)- > >media.ver) > +#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > >media.arch, \ > + INTEL_INFO(i915)- > >media.rel) > #define IS_MEDIA_VER(i915, from, until) \ > (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until)) > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > b/drivers/gpu/drm/i915/i915_pci.c > index 169837de395d3..5e6795853dc31 100644 > --- a/drivers/gpu/drm/i915/i915_pci.c > +++ b/drivers/gpu/drm/i915/i915_pci.c > @@ -32,8 +32,8 @@ > > #define PLATFORM(x) .platform = (x) > #define GEN(x) \ > - .graphics_ver = (x), \ > - .media_ver = (x), \ > + .graphics.ver = (x), \ > + .media.ver = (x), \ > .display.ver = (x) > > #define I845_PIPE_OFFSETS \ > @@ -899,7 +899,7 @@ static const struct intel_device_info rkl_info = > { > static const struct intel_device_info dg1_info = { > GEN12_FEATURES, > DGFX_FEATURES, > - .graphics_rel = 10, > + .graphics.rel = 10, > PLATFORM(INTEL_DG1), > .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | > BIT(PIPE_D), > .require_force_probe = 1, > @@ -986,8 +986,8 @@ static const struct intel_device_info adl_p_info > = { > I915_GTT_PAGE_SIZE_2M > > #define XE_HP_FEATURES \ > - .graphics_ver = 12, \ > - .graphics_rel = 50, \ > + .graphics.ver = 12, \ > + .graphics.rel = 50, \ > XE_HP_PAGE_SIZES, \ > .dma_mask_size = 46, \ > .has_64bit_reloc = 1, \ > @@ -1005,8 +1005,8 @@ static const struct intel_device_info > adl_p_info = { > .ppgtt_type = INTEL_PPGTT_FULL > > #define XE_HPM_FEATURES \ > - .media_ver = 12, \ > - .media_rel = 50 > + .media.ver = 12, \ > + .media.rel = 50 > > __maybe_unused > static const struct intel_device_info xehpsdv_info = { > @@ -1030,8 +1030,8 @@ static const struct intel_device_info dg2_info > = { > XE_HPM_FEATURES, > XE_LPD_FEATURES, > DGFX_FEATURES, > - .graphics_rel = 55, > - .media_rel = 55, > + .graphics.rel = 55, > + .media.rel = 55, > PLATFORM(INTEL_DG2), > .platform_engine_mask = > BIT(RCS0) | BIT(BCS0) | > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > b/drivers/gpu/drm/i915/intel_device_info.c > index 305facedd2841..6e6b317bc33ce 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.c > +++ b/drivers/gpu/drm/i915/intel_device_info.c > @@ -97,17 +97,22 @@ static const char *iommu_name(void) > void intel_device_info_print_static(const struct intel_device_info > *info, > struct drm_printer *p) > { > - if (info->graphics_rel) > - drm_printf(p, "graphics version: %u.%02u\n", info- > >graphics_ver, info->graphics_rel); > + if (info->graphics.rel) > + drm_printf(p, "graphics version: %u.%02u\n", info- > >graphics.ver, > + info->graphics.rel); > else > - drm_printf(p, "graphics version: %u\n", info- > >graphics_ver); > + drm_printf(p, "graphics version: %u\n", info- > >graphics.ver); > > - if (info->media_rel) > - drm_printf(p, "media version: %u.%02u\n", info- > >media_ver, info->media_rel); > + if (info->media.rel) > + drm_printf(p, "media version: %u.%02u\n", info- > >media.ver, info->media.rel); > else > - drm_printf(p, "media version: %u\n", info->media_ver); > + drm_printf(p, "media version: %u\n", info->media.ver); > + > + if (info->display.rel) > + drm_printf(p, "display version: %u.%02u\n", info- > >display.ver, info->display.rel); > + else > + drm_printf(p, "display version: %u\n", info- > >display.ver); > > - drm_printf(p, "display version: %u\n", info->display.ver); > drm_printf(p, "gt: %d\n", info->gt); > drm_printf(p, "iommu: %s\n", iommu_name()); > drm_printf(p, "memory-regions: %x\n", info->memory_regions); > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > b/drivers/gpu/drm/i915/intel_device_info.h > index 8e6f48d1eb7bc..669f0d26c3c38 100644 > --- a/drivers/gpu/drm/i915/intel_device_info.h > +++ b/drivers/gpu/drm/i915/intel_device_info.h > @@ -166,11 +166,14 @@ enum intel_ppgtt_type { > func(overlay_needs_physical); \ > func(supports_tv); > > +struct ip_version { > + u8 ver; > + u8 rel; > +}; > + > struct intel_device_info { > - u8 graphics_ver; > - u8 graphics_rel; > - u8 media_ver; > - u8 media_rel; > + struct ip_version graphics; > + struct ip_version media; > > intel_engine_mask_t platform_engine_mask; /* Engines supported > by the HW */ > > @@ -200,6 +203,7 @@ struct intel_device_info { > > struct { > u8 ver; > + u8 rel; > > #define DEFINE_FLAG(name) u8 name:1 > DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); > diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > index 4f81801468881..9ab3f284d1dd9 100644 > --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > @@ -165,7 +165,7 @@ struct drm_i915_private *mock_gem_device(void) > /* Using the global GTT may ask questions about KMS users, so > prepare */ > drm_mode_config_init(&i915->drm); > > - mkwrite_device_info(i915)->graphics_ver = -1; > + mkwrite_device_info(i915)->graphics.ver = -1; > > mkwrite_device_info(i915)->page_sizes = > I915_GTT_PAGE_SIZE_4K | ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 15:00 ` Yokoyama, Caz @ 2021-10-20 19:19 ` Souza, Jose 2021-10-22 21:26 ` Yokoyama, Caz 0 siblings, 1 reply; 22+ messages in thread From: Souza, Jose @ 2021-10-20 19:19 UTC (permalink / raw) To: intel-gfx, Yokoyama, Caz; +Cc: Sripada, Radhakrishna, Atwood, Matthew S On Wed, 2021-10-20 at 15:00 +0000, Yokoyama, Caz wrote: > On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote: > > Adding a structure to standardize access to IP versioning as future > > platforms will have this information populated at runtime. > > > > The constant platform display version is not using this new struct > > but > > the runtime variant will definitely use it. > > > > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > > Cc: Matt Atwood <matthew.s.atwood@intel.com> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > --- > > drivers/gpu/drm/i915/i915_drv.c | 2 +- > > drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------ > > drivers/gpu/drm/i915/i915_pci.c | 18 +++++++++------ > > --- > > drivers/gpu/drm/i915/intel_device_info.c | 19 ++++++++++++----- > > -- > > drivers/gpu/drm/i915/intel_device_info.h | 12 ++++++++---- > > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 +- > > 6 files changed, 37 insertions(+), 28 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > > b/drivers/gpu/drm/i915/i915_drv.c > > index 1e5b75ae99329..bdf85d202c55c 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -808,7 +808,7 @@ int i915_driver_probe(struct pci_dev *pdev, const > > struct pci_device_id *ent) > > return PTR_ERR(i915); > > > > /* Disable nuclear pageflip by default on pre-ILK */ > > - if (!i915->params.nuclear_pageflip && match_info->graphics_ver > > < 5) > > + if (!i915->params.nuclear_pageflip && match_info->graphics.ver > > < 5) > I don't find any difference on this and the similar modifications > below. Am I missing something? Changing u8 graphics_ver to struct ip_version that contains a member called ver. So only changing '_' to '.' in most places. > -caz > > > i915->drm.driver_features &= ~DRIVER_ATOMIC; > > > > /* > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > b/drivers/gpu/drm/i915/i915_drv.h > > index 12256218634f4..26b6e2b8bb5e8 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.h > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > @@ -1327,15 +1327,15 @@ static inline struct drm_i915_private > > *pdev_to_i915(struct pci_dev *pdev) > > > > #define IP_VER(ver, rel) ((ver) << 8 | (rel)) > > > > -#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > graphics_ver) > > -#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > ->graphics_ver, \ > > - INTEL_INFO(i915)- > > > graphics_rel) > > +#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > graphics.ver) > > +#define GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > ->graphics.ver, \ > > + INTEL_INFO(i915)- > > > graphics.rel) > > #define IS_GRAPHICS_VER(i915, from, until) \ > > (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= (until)) > > > > -#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > media_ver) > > -#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > media_ver, \ > > - INTEL_INFO(i915)- > > > media_rel) > > +#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > media.ver) > > +#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > media.arch, \ > > + INTEL_INFO(i915)- > > > media.rel) > > #define IS_MEDIA_VER(i915, from, until) \ > > (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until)) > > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > > b/drivers/gpu/drm/i915/i915_pci.c > > index 169837de395d3..5e6795853dc31 100644 > > --- a/drivers/gpu/drm/i915/i915_pci.c > > +++ b/drivers/gpu/drm/i915/i915_pci.c > > @@ -32,8 +32,8 @@ > > > > #define PLATFORM(x) .platform = (x) > > #define GEN(x) \ > > - .graphics_ver = (x), \ > > - .media_ver = (x), \ > > + .graphics.ver = (x), \ > > + .media.ver = (x), \ > > .display.ver = (x) > > > > #define I845_PIPE_OFFSETS \ > > @@ -899,7 +899,7 @@ static const struct intel_device_info rkl_info = > > { > > static const struct intel_device_info dg1_info = { > > GEN12_FEATURES, > > DGFX_FEATURES, > > - .graphics_rel = 10, > > + .graphics.rel = 10, > > PLATFORM(INTEL_DG1), > > .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | > > BIT(PIPE_D), > > .require_force_probe = 1, > > @@ -986,8 +986,8 @@ static const struct intel_device_info adl_p_info > > = { > > I915_GTT_PAGE_SIZE_2M > > > > #define XE_HP_FEATURES \ > > - .graphics_ver = 12, \ > > - .graphics_rel = 50, \ > > + .graphics.ver = 12, \ > > + .graphics.rel = 50, \ > > XE_HP_PAGE_SIZES, \ > > .dma_mask_size = 46, \ > > .has_64bit_reloc = 1, \ > > @@ -1005,8 +1005,8 @@ static const struct intel_device_info > > adl_p_info = { > > .ppgtt_type = INTEL_PPGTT_FULL > > > > #define XE_HPM_FEATURES \ > > - .media_ver = 12, \ > > - .media_rel = 50 > > + .media.ver = 12, \ > > + .media.rel = 50 > > > > __maybe_unused > > static const struct intel_device_info xehpsdv_info = { > > @@ -1030,8 +1030,8 @@ static const struct intel_device_info dg2_info > > = { > > XE_HPM_FEATURES, > > XE_LPD_FEATURES, > > DGFX_FEATURES, > > - .graphics_rel = 55, > > - .media_rel = 55, > > + .graphics.rel = 55, > > + .media.rel = 55, > > PLATFORM(INTEL_DG2), > > .platform_engine_mask = > > BIT(RCS0) | BIT(BCS0) | > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > b/drivers/gpu/drm/i915/intel_device_info.c > > index 305facedd2841..6e6b317bc33ce 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > @@ -97,17 +97,22 @@ static const char *iommu_name(void) > > void intel_device_info_print_static(const struct intel_device_info > > *info, > > struct drm_printer *p) > > { > > - if (info->graphics_rel) > > - drm_printf(p, "graphics version: %u.%02u\n", info- > > > graphics_ver, info->graphics_rel); > > + if (info->graphics.rel) > > + drm_printf(p, "graphics version: %u.%02u\n", info- > > > graphics.ver, > > + info->graphics.rel); > > else > > - drm_printf(p, "graphics version: %u\n", info- > > > graphics_ver); > > + drm_printf(p, "graphics version: %u\n", info- > > > graphics.ver); > > > > - if (info->media_rel) > > - drm_printf(p, "media version: %u.%02u\n", info- > > > media_ver, info->media_rel); > > + if (info->media.rel) > > + drm_printf(p, "media version: %u.%02u\n", info- > > > media.ver, info->media.rel); > > else > > - drm_printf(p, "media version: %u\n", info->media_ver); > > + drm_printf(p, "media version: %u\n", info->media.ver); > > + > > + if (info->display.rel) > > + drm_printf(p, "display version: %u.%02u\n", info- > > > display.ver, info->display.rel); > > + else > > + drm_printf(p, "display version: %u\n", info- > > > display.ver); > > > > - drm_printf(p, "display version: %u\n", info->display.ver); > > drm_printf(p, "gt: %d\n", info->gt); > > drm_printf(p, "iommu: %s\n", iommu_name()); > > drm_printf(p, "memory-regions: %x\n", info->memory_regions); > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > > b/drivers/gpu/drm/i915/intel_device_info.h > > index 8e6f48d1eb7bc..669f0d26c3c38 100644 > > --- a/drivers/gpu/drm/i915/intel_device_info.h > > +++ b/drivers/gpu/drm/i915/intel_device_info.h > > @@ -166,11 +166,14 @@ enum intel_ppgtt_type { > > func(overlay_needs_physical); \ > > func(supports_tv); > > > > +struct ip_version { > > + u8 ver; > > + u8 rel; > > +}; > > + > > struct intel_device_info { > > - u8 graphics_ver; > > - u8 graphics_rel; > > - u8 media_ver; > > - u8 media_rel; > > + struct ip_version graphics; > > + struct ip_version media; > > > > intel_engine_mask_t platform_engine_mask; /* Engines supported > > by the HW */ > > > > @@ -200,6 +203,7 @@ struct intel_device_info { > > > > struct { > > u8 ver; > > + u8 rel; > > > > #define DEFINE_FLAG(name) u8 name:1 > > DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); > > diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > index 4f81801468881..9ab3f284d1dd9 100644 > > --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > @@ -165,7 +165,7 @@ struct drm_i915_private *mock_gem_device(void) > > /* Using the global GTT may ask questions about KMS users, so > > prepare */ > > drm_mode_config_init(&i915->drm); > > > > - mkwrite_device_info(i915)->graphics_ver = -1; > > + mkwrite_device_info(i915)->graphics.ver = -1; > > > > mkwrite_device_info(i915)->page_sizes = > > I915_GTT_PAGE_SIZE_4K | ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 19:19 ` Souza, Jose @ 2021-10-22 21:26 ` Yokoyama, Caz 2021-10-28 21:08 ` Souza, Jose 0 siblings, 1 reply; 22+ messages in thread From: Yokoyama, Caz @ 2021-10-22 21:26 UTC (permalink / raw) To: intel-gfx, Souza, Jose; +Cc: Sripada, Radhakrishna, Atwood, Matthew S On Wed, 2021-10-20 at 19:19 +0000, Souza, Jose wrote: > On Wed, 2021-10-20 at 15:00 +0000, Yokoyama, Caz wrote: > > On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote: > > > Adding a structure to standardize access to IP versioning as > > > future > > > platforms will have this information populated at runtime. > > > > > > The constant platform display version is not using this new > > > struct > > > but > > > the runtime variant will definitely use it. > > > > > > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > > > Cc: Matt Atwood <matthew.s.atwood@intel.com> > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > --- > > > drivers/gpu/drm/i915/i915_drv.c | 2 +- > > > drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------ > > > drivers/gpu/drm/i915/i915_pci.c | 18 +++++++++-- > > > ---- > > > --- > > > drivers/gpu/drm/i915/intel_device_info.c | 19 ++++++++++++- > > > ---- > > > -- > > > drivers/gpu/drm/i915/intel_device_info.h | 12 ++++++++---- > > > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 +- > > > 6 files changed, 37 insertions(+), 28 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > > > b/drivers/gpu/drm/i915/i915_drv.c > > > index 1e5b75ae99329..bdf85d202c55c 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.c > > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > > @@ -808,7 +808,7 @@ int i915_driver_probe(struct pci_dev *pdev, > > > const > > > struct pci_device_id *ent) > > > return PTR_ERR(i915); > > > > > > /* Disable nuclear pageflip by default on pre-ILK */ > > > - if (!i915->params.nuclear_pageflip && match_info- > > > >graphics_ver > > > < 5) > > > + if (!i915->params.nuclear_pageflip && match_info- > > > >graphics.ver > > > < 5) > > I don't find any difference on this and the similar modifications > > below. Am I missing something? > > Changing u8 graphics_ver to struct ip_version that contains a member > called ver. > So only changing '_' to '.' in most places. > > > -caz > > > > > i915->drm.driver_features &= ~DRIVER_ATOMIC; > > > > > > /* > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > b/drivers/gpu/drm/i915/i915_drv.h > > > index 12256218634f4..26b6e2b8bb5e8 100644 > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > @@ -1327,15 +1327,15 @@ static inline struct drm_i915_private > > > *pdev_to_i915(struct pci_dev *pdev) > > > > > > #define IP_VER(ver, rel) ((ver) << 8 | (rel)) > > > > > > -#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > > graphics_ver) > > > -#define > > > GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > > ->graphics_ver, \ > > > - INTEL_INFO(i915)- > > > > graphics_rel) > > > +#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > > graphics.ver) > > > +#define > > > GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > > ->graphics.ver, \ > > > + INTEL_INFO(i915)- > > > > graphics.rel) > > > #define IS_GRAPHICS_VER(i915, from, until) \ > > > (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= > > > (until)) > > > > > > -#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > > media_ver) > > > -#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > > media_ver, \ > > > - INTEL_INFO(i915)- > > > > media_rel) > > > +#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > > media.ver) > > > +#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > > media.arch, \ > > > + INTEL_INFO(i915)- > > > > media.rel) > > > #define IS_MEDIA_VER(i915, from, until) \ > > > (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until)) > > > > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > > > b/drivers/gpu/drm/i915/i915_pci.c > > > index 169837de395d3..5e6795853dc31 100644 > > > --- a/drivers/gpu/drm/i915/i915_pci.c > > > +++ b/drivers/gpu/drm/i915/i915_pci.c > > > @@ -32,8 +32,8 @@ > > > > > > #define PLATFORM(x) .platform = (x) > > > #define GEN(x) \ > > > - .graphics_ver = (x), \ > > > - .media_ver = (x), \ > > > + .graphics.ver = (x), \ > > > + .media.ver = (x), \ > > > .display.ver = (x) > > > > > > #define I845_PIPE_OFFSETS \ > > > @@ -899,7 +899,7 @@ static const struct intel_device_info > > > rkl_info = > > > { > > > static const struct intel_device_info dg1_info = { > > > GEN12_FEATURES, > > > DGFX_FEATURES, > > > - .graphics_rel = 10, > > > + .graphics.rel = 10, > > > PLATFORM(INTEL_DG1), > > > .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | > > > BIT(PIPE_D), > > > .require_force_probe = 1, > > > @@ -986,8 +986,8 @@ static const struct intel_device_info > > > adl_p_info > > > = { > > > I915_GTT_PAGE_SIZE_2M > > > > > > #define XE_HP_FEATURES \ > > > - .graphics_ver = 12, \ > > > - .graphics_rel = 50, \ > > > + .graphics.ver = 12, \ > > > + .graphics.rel = 50, \ > > > XE_HP_PAGE_SIZES, \ > > > .dma_mask_size = 46, \ > > > .has_64bit_reloc = 1, \ > > > @@ -1005,8 +1005,8 @@ static const struct intel_device_info > > > adl_p_info = { > > > .ppgtt_type = INTEL_PPGTT_FULL > > > > > > #define XE_HPM_FEATURES \ > > > - .media_ver = 12, \ > > > - .media_rel = 50 > > > + .media.ver = 12, \ > > > + .media.rel = 50 > > > > > > __maybe_unused > > > static const struct intel_device_info xehpsdv_info = { > > > @@ -1030,8 +1030,8 @@ static const struct intel_device_info > > > dg2_info > > > = { > > > XE_HPM_FEATURES, > > > XE_LPD_FEATURES, > > > DGFX_FEATURES, > > > - .graphics_rel = 55, > > > - .media_rel = 55, > > > + .graphics.rel = 55, > > > + .media.rel = 55, > > > PLATFORM(INTEL_DG2), > > > .platform_engine_mask = > > > BIT(RCS0) | BIT(BCS0) | > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > > b/drivers/gpu/drm/i915/intel_device_info.c > > > index 305facedd2841..6e6b317bc33ce 100644 > > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > > @@ -97,17 +97,22 @@ static const char *iommu_name(void) > > > void intel_device_info_print_static(const struct > > > intel_device_info > > > *info, > > > struct drm_printer *p) > > > { > > > - if (info->graphics_rel) > > > - drm_printf(p, "graphics version: %u.%02u\n", info- > > > > graphics_ver, info->graphics_rel); > > > + if (info->graphics.rel) > > > + drm_printf(p, "graphics version: %u.%02u\n", info- > > > > graphics.ver, > > > + info->graphics.rel); > > > else > > > - drm_printf(p, "graphics version: %u\n", info- > > > > graphics_ver); > > > + drm_printf(p, "graphics version: %u\n", info- > > > > graphics.ver); > > > > > > - if (info->media_rel) > > > - drm_printf(p, "media version: %u.%02u\n", info- > > > > media_ver, info->media_rel); > > > + if (info->media.rel) > > > + drm_printf(p, "media version: %u.%02u\n", info- > > > > media.ver, info->media.rel); > > > else > > > - drm_printf(p, "media version: %u\n", info- > > > >media_ver); > > > + drm_printf(p, "media version: %u\n", info- > > > >media.ver); > > > + > > > + if (info->display.rel) > > > + drm_printf(p, "display version: %u.%02u\n", info- > > > > display.ver, info->display.rel); > > > + else > > > + drm_printf(p, "display version: %u\n", info- > > > > display.ver); > > > > > > - drm_printf(p, "display version: %u\n", info->display.ver); > > > drm_printf(p, "gt: %d\n", info->gt); > > > drm_printf(p, "iommu: %s\n", iommu_name()); > > > drm_printf(p, "memory-regions: %x\n", info- > > > >memory_regions); > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > > > b/drivers/gpu/drm/i915/intel_device_info.h > > > index 8e6f48d1eb7bc..669f0d26c3c38 100644 > > > --- a/drivers/gpu/drm/i915/intel_device_info.h > > > +++ b/drivers/gpu/drm/i915/intel_device_info.h > > > @@ -166,11 +166,14 @@ enum intel_ppgtt_type { > > > func(overlay_needs_physical); \ > > > func(supports_tv); > > > > > > +struct ip_version { > > > + u8 ver; > > > + u8 rel; > > > +}; > > > + > > > struct intel_device_info { > > > - u8 graphics_ver; > > > - u8 graphics_rel; > > > - u8 media_ver; > > > - u8 media_rel; > > > + struct ip_version graphics; > > > + struct ip_version media; > > > > > > intel_engine_mask_t platform_engine_mask; /* Engines > > > supported > > > by the HW */ > > > > > > @@ -200,6 +203,7 @@ struct intel_device_info { > > > > > > struct { > > > u8 ver; > > > + u8 rel; Even this is mentioned in the comment as "need for runtime variant", I have no idea why it is needed because it is copied on i915_drv.c and shown by drm_printf() in intel_device_info.c. If it is really needed, Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> -caz > > > > > > #define DEFINE_FLAG(name) u8 name:1 > > > DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); > > > diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > index 4f81801468881..9ab3f284d1dd9 100644 > > > --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > @@ -165,7 +165,7 @@ struct drm_i915_private > > > *mock_gem_device(void) > > > /* Using the global GTT may ask questions about KMS users, > > > so > > > prepare */ > > > drm_mode_config_init(&i915->drm); > > > > > > - mkwrite_device_info(i915)->graphics_ver = -1; > > > + mkwrite_device_info(i915)->graphics.ver = -1; > > > > > > mkwrite_device_info(i915)->page_sizes = > > > I915_GTT_PAGE_SIZE_4K | ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-22 21:26 ` Yokoyama, Caz @ 2021-10-28 21:08 ` Souza, Jose 2021-11-01 14:29 ` Yokoyama, Caz 0 siblings, 1 reply; 22+ messages in thread From: Souza, Jose @ 2021-10-28 21:08 UTC (permalink / raw) To: intel-gfx, Yokoyama, Caz; +Cc: Sripada, Radhakrishna, Atwood, Matthew S On Fri, 2021-10-22 at 21:26 +0000, Yokoyama, Caz wrote: > On Wed, 2021-10-20 at 19:19 +0000, Souza, Jose wrote: > > On Wed, 2021-10-20 at 15:00 +0000, Yokoyama, Caz wrote: > > > On Tue, 2021-10-19 at 17:23 -0700, José Roberto de Souza wrote: > > > > Adding a structure to standardize access to IP versioning as > > > > future > > > > platforms will have this information populated at runtime. > > > > > > > > The constant platform display version is not using this new > > > > struct > > > > but > > > > the runtime variant will definitely use it. > > > > > > > > Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> > > > > Cc: Matt Atwood <matthew.s.atwood@intel.com> > > > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/i915_drv.c | 2 +- > > > > drivers/gpu/drm/i915/i915_drv.h | 12 ++++++------ > > > > drivers/gpu/drm/i915/i915_pci.c | 18 +++++++++-- > > > > ---- > > > > --- > > > > drivers/gpu/drm/i915/intel_device_info.c | 19 ++++++++++++- > > > > ---- > > > > -- > > > > drivers/gpu/drm/i915/intel_device_info.h | 12 ++++++++---- > > > > .../gpu/drm/i915/selftests/mock_gem_device.c | 2 +- > > > > 6 files changed, 37 insertions(+), 28 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.c > > > > b/drivers/gpu/drm/i915/i915_drv.c > > > > index 1e5b75ae99329..bdf85d202c55c 100644 > > > > --- a/drivers/gpu/drm/i915/i915_drv.c > > > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > > > @@ -808,7 +808,7 @@ int i915_driver_probe(struct pci_dev *pdev, > > > > const > > > > struct pci_device_id *ent) > > > > return PTR_ERR(i915); > > > > > > > > /* Disable nuclear pageflip by default on pre-ILK */ > > > > - if (!i915->params.nuclear_pageflip && match_info- > > > > > graphics_ver > > > > < 5) > > > > + if (!i915->params.nuclear_pageflip && match_info- > > > > > graphics.ver > > > > < 5) > > > I don't find any difference on this and the similar modifications > > > below. Am I missing something? > > > > Changing u8 graphics_ver to struct ip_version that contains a member > > called ver. > > So only changing '_' to '.' in most places. > > > > > -caz > > > > > > > i915->drm.driver_features &= ~DRIVER_ATOMIC; > > > > > > > > /* > > > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > > > > b/drivers/gpu/drm/i915/i915_drv.h > > > > index 12256218634f4..26b6e2b8bb5e8 100644 > > > > --- a/drivers/gpu/drm/i915/i915_drv.h > > > > +++ b/drivers/gpu/drm/i915/i915_drv.h > > > > @@ -1327,15 +1327,15 @@ static inline struct drm_i915_private > > > > *pdev_to_i915(struct pci_dev *pdev) > > > > > > > > #define IP_VER(ver, rel) ((ver) << 8 | (rel)) > > > > > > > > -#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > > > graphics_ver) > > > > -#define > > > > GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > > > ->graphics_ver, \ > > > > - INTEL_INFO(i915)- > > > > > graphics_rel) > > > > +#define GRAPHICS_VER(i915) (INTEL_INFO(i915)- > > > > > graphics.ver) > > > > +#define > > > > GRAPHICS_VER_FULL(i915) IP_VER(INTEL_INFO(i915) > > > > ->graphics.ver, \ > > > > + INTEL_INFO(i915)- > > > > > graphics.rel) > > > > #define IS_GRAPHICS_VER(i915, from, until) \ > > > > (GRAPHICS_VER(i915) >= (from) && GRAPHICS_VER(i915) <= > > > > (until)) > > > > > > > > -#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > > > media_ver) > > > > -#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > > > media_ver, \ > > > > - INTEL_INFO(i915)- > > > > > media_rel) > > > > +#define MEDIA_VER(i915) (INTEL_INFO(i915)- > > > > > media.ver) > > > > +#define MEDIA_VER_FULL(i915) IP_VER(INTEL_INFO(i915)- > > > > > media.arch, \ > > > > + INTEL_INFO(i915)- > > > > > media.rel) > > > > #define IS_MEDIA_VER(i915, from, until) \ > > > > (MEDIA_VER(i915) >= (from) && MEDIA_VER(i915) <= (until)) > > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c > > > > b/drivers/gpu/drm/i915/i915_pci.c > > > > index 169837de395d3..5e6795853dc31 100644 > > > > --- a/drivers/gpu/drm/i915/i915_pci.c > > > > +++ b/drivers/gpu/drm/i915/i915_pci.c > > > > @@ -32,8 +32,8 @@ > > > > > > > > #define PLATFORM(x) .platform = (x) > > > > #define GEN(x) \ > > > > - .graphics_ver = (x), \ > > > > - .media_ver = (x), \ > > > > + .graphics.ver = (x), \ > > > > + .media.ver = (x), \ > > > > .display.ver = (x) > > > > > > > > #define I845_PIPE_OFFSETS \ > > > > @@ -899,7 +899,7 @@ static const struct intel_device_info > > > > rkl_info = > > > > { > > > > static const struct intel_device_info dg1_info = { > > > > GEN12_FEATURES, > > > > DGFX_FEATURES, > > > > - .graphics_rel = 10, > > > > + .graphics.rel = 10, > > > > PLATFORM(INTEL_DG1), > > > > .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | > > > > BIT(PIPE_D), > > > > .require_force_probe = 1, > > > > @@ -986,8 +986,8 @@ static const struct intel_device_info > > > > adl_p_info > > > > = { > > > > I915_GTT_PAGE_SIZE_2M > > > > > > > > #define XE_HP_FEATURES \ > > > > - .graphics_ver = 12, \ > > > > - .graphics_rel = 50, \ > > > > + .graphics.ver = 12, \ > > > > + .graphics.rel = 50, \ > > > > XE_HP_PAGE_SIZES, \ > > > > .dma_mask_size = 46, \ > > > > .has_64bit_reloc = 1, \ > > > > @@ -1005,8 +1005,8 @@ static const struct intel_device_info > > > > adl_p_info = { > > > > .ppgtt_type = INTEL_PPGTT_FULL > > > > > > > > #define XE_HPM_FEATURES \ > > > > - .media_ver = 12, \ > > > > - .media_rel = 50 > > > > + .media.ver = 12, \ > > > > + .media.rel = 50 > > > > > > > > __maybe_unused > > > > static const struct intel_device_info xehpsdv_info = { > > > > @@ -1030,8 +1030,8 @@ static const struct intel_device_info > > > > dg2_info > > > > = { > > > > XE_HPM_FEATURES, > > > > XE_LPD_FEATURES, > > > > DGFX_FEATURES, > > > > - .graphics_rel = 55, > > > > - .media_rel = 55, > > > > + .graphics.rel = 55, > > > > + .media.rel = 55, > > > > PLATFORM(INTEL_DG2), > > > > .platform_engine_mask = > > > > BIT(RCS0) | BIT(BCS0) | > > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.c > > > > b/drivers/gpu/drm/i915/intel_device_info.c > > > > index 305facedd2841..6e6b317bc33ce 100644 > > > > --- a/drivers/gpu/drm/i915/intel_device_info.c > > > > +++ b/drivers/gpu/drm/i915/intel_device_info.c > > > > @@ -97,17 +97,22 @@ static const char *iommu_name(void) > > > > void intel_device_info_print_static(const struct > > > > intel_device_info > > > > *info, > > > > struct drm_printer *p) > > > > { > > > > - if (info->graphics_rel) > > > > - drm_printf(p, "graphics version: %u.%02u\n", info- > > > > > graphics_ver, info->graphics_rel); > > > > + if (info->graphics.rel) > > > > + drm_printf(p, "graphics version: %u.%02u\n", info- > > > > > graphics.ver, > > > > + info->graphics.rel); > > > > else > > > > - drm_printf(p, "graphics version: %u\n", info- > > > > > graphics_ver); > > > > + drm_printf(p, "graphics version: %u\n", info- > > > > > graphics.ver); > > > > > > > > - if (info->media_rel) > > > > - drm_printf(p, "media version: %u.%02u\n", info- > > > > > media_ver, info->media_rel); > > > > + if (info->media.rel) > > > > + drm_printf(p, "media version: %u.%02u\n", info- > > > > > media.ver, info->media.rel); > > > > else > > > > - drm_printf(p, "media version: %u\n", info- > > > > > media_ver); > > > > + drm_printf(p, "media version: %u\n", info- > > > > > media.ver); > > > > + > > > > + if (info->display.rel) > > > > + drm_printf(p, "display version: %u.%02u\n", info- > > > > > display.ver, info->display.rel); > > > > + else > > > > + drm_printf(p, "display version: %u\n", info- > > > > > display.ver); > > > > > > > > - drm_printf(p, "display version: %u\n", info->display.ver); > > > > drm_printf(p, "gt: %d\n", info->gt); > > > > drm_printf(p, "iommu: %s\n", iommu_name()); > > > > drm_printf(p, "memory-regions: %x\n", info- > > > > > memory_regions); > > > > diff --git a/drivers/gpu/drm/i915/intel_device_info.h > > > > b/drivers/gpu/drm/i915/intel_device_info.h > > > > index 8e6f48d1eb7bc..669f0d26c3c38 100644 > > > > --- a/drivers/gpu/drm/i915/intel_device_info.h > > > > +++ b/drivers/gpu/drm/i915/intel_device_info.h > > > > @@ -166,11 +166,14 @@ enum intel_ppgtt_type { > > > > func(overlay_needs_physical); \ > > > > func(supports_tv); > > > > > > > > +struct ip_version { > > > > + u8 ver; > > > > + u8 rel; > > > > +}; > > > > + > > > > struct intel_device_info { > > > > - u8 graphics_ver; > > > > - u8 graphics_rel; > > > > - u8 media_ver; > > > > - u8 media_rel; > > > > + struct ip_version graphics; > > > > + struct ip_version media; > > > > > > > > intel_engine_mask_t platform_engine_mask; /* Engines > > > > supported > > > > by the HW */ > > > > > > > > @@ -200,6 +203,7 @@ struct intel_device_info { > > > > > > > > struct { > > > > u8 ver; > > > > + u8 rel; > Even this is mentioned in the comment as "need for runtime variant", I > have no idea why it is needed because it is copied on i915_drv.c and > shown by drm_printf() in intel_device_info.c. It is to make standard access between every IP, right now we already graphics IP with ver and rel(DG2 graphics_rel = 55 while xehpsdv is graphics_rel=50) but not a display one. But that will change in future platforms, so making the access the same for every IP. > If it is really needed, > Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> > -caz > > > > > > > > > #define DEFINE_FLAG(name) u8 name:1 > > > > DEV_INFO_DISPLAY_FOR_EACH_FLAG(DEFINE_FLAG); > > > > diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > > b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > > index 4f81801468881..9ab3f284d1dd9 100644 > > > > --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > > +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c > > > > @@ -165,7 +165,7 @@ struct drm_i915_private > > > > *mock_gem_device(void) > > > > /* Using the global GTT may ask questions about KMS users, > > > > so > > > > prepare */ > > > > drm_mode_config_init(&i915->drm); > > > > > > > > - mkwrite_device_info(i915)->graphics_ver = -1; > > > > + mkwrite_device_info(i915)->graphics.ver = -1; > > > > > > > > mkwrite_device_info(i915)->page_sizes = > > > > I915_GTT_PAGE_SIZE_4K | ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-28 21:08 ` Souza, Jose @ 2021-11-01 14:29 ` Yokoyama, Caz 0 siblings, 0 replies; 22+ messages in thread From: Yokoyama, Caz @ 2021-11-01 14:29 UTC (permalink / raw) To: intel-gfx, Souza, Jose Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> -caz On Thu, 2021-10-28 at 21:08 +0000, Souza, Jose wrote: > Reviewed-by: Caz Yokoyama <caz.yokoyama@intel.com> ^ permalink raw reply [flat|nested] 22+ messages in thread
* Re: [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza ` (6 preceding siblings ...) 2021-10-20 15:00 ` Yokoyama, Caz @ 2021-11-02 7:32 ` Lucas De Marchi 7 siblings, 0 replies; 22+ messages in thread From: Lucas De Marchi @ 2021-11-02 7:32 UTC (permalink / raw) To: José Roberto de Souza; +Cc: intel-gfx On Tue, Oct 19, 2021 at 05:23:51PM -0700, Jose Souza wrote: >Adding a structure to standardize access to IP versioning as future >platforms will have this information populated at runtime. > >The constant platform display version is not using this new struct but >the runtime variant will definitely use it. > >Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com> >Cc: Matt Atwood <matthew.s.atwood@intel.com> >Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi ^ permalink raw reply [flat|nested] 22+ messages in thread
end of thread, other threads:[~2021-11-02 20:08 UTC | newest] Thread overview: 22+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-10-20 0:23 [Intel-gfx] [PATCH 1/3] drm/i915: Add struct to hold IP version José Roberto de Souza 2021-10-20 0:23 ` [Intel-gfx] [PATCH 2/3] drm/i915: Track media IP stepping separated from GT José Roberto de Souza 2021-11-02 7:30 ` Lucas De Marchi 2021-10-20 0:23 ` [Intel-gfx] [PATCH 3/3] drm/i915: Rename GT_STEP to GRAPHICS_STEP José Roberto de Souza 2021-10-20 15:06 ` Yokoyama, Caz 2021-11-02 7:27 ` Lucas De Marchi 2021-10-20 0:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add struct to hold IP version Patchwork 2021-10-20 1:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2021-10-20 5:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2021-11-02 20:04 ` Souza, Jose 2021-10-20 9:47 ` [Intel-gfx] [PATCH 1/3] " Jani Nikula 2021-10-20 19:29 ` Souza, Jose 2021-10-21 13:11 ` Jani Nikula 2021-10-22 20:15 ` Lucas De Marchi 2021-10-25 9:04 ` Jani Nikula 2021-11-02 5:33 ` Souza, Jose 2021-10-20 15:00 ` Yokoyama, Caz 2021-10-20 19:19 ` Souza, Jose 2021-10-22 21:26 ` Yokoyama, Caz 2021-10-28 21:08 ` Souza, Jose 2021-11-01 14:29 ` Yokoyama, Caz 2021-11-02 7:32 ` Lucas De Marchi
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