From: Sean Anderson <sean.anderson@seco.com>
To: u-boot@lists.denx.de, Peng Fan <peng.fan@nxp.com>,
Jaehoon Chung <jh80.chung@samsung.com>
Cc: Haibo Chen <haibo.chen@nxp.com>,
Fabio Estevam <festevam@gmail.com>, Yangbo Lu <yangbo.lu@nxp.com>,
Michael Walle <michael@walle.cc>,
Sean Anderson <sean.anderson@seco.com>
Subject: [PATCH v3 12/12] mmc: fsl_esdhc_imx: set sysctl register for clock initialization
Date: Tue, 23 Nov 2021 15:03:47 -0500 [thread overview]
Message-ID: <20211123200347.3772343-13-sean.anderson@seco.com> (raw)
In-Reply-To: <20211123200347.3772343-1-sean.anderson@seco.com>
[ fsl_esdhc commit 263ddfc3454ead3a988adef39b962479adce2b28 ]
The initial clock setting should be through sysctl register only,
while the mmc_set_clock() will call mmc_set_ios() introduce other
configurations like bus width, mode, and so on.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
(no changes since v1)
drivers/mmc/fsl_esdhc_imx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 25e912ba95..9299635f50 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -1020,7 +1020,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
esdhc_setbits32(®s->sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
/* Set the initial clock speed */
- mmc_set_clock(mmc, 400000, MMC_CLK_ENABLE);
+ set_sysctl(priv, mmc, 400000);
/* Disable the BRR and BWR bits in IRQSTAT */
esdhc_clrbits32(®s->irqstaten, IRQSTATEN_BRR | IRQSTATEN_BWR);
--
2.25.1
next prev parent reply other threads:[~2021-11-23 20:06 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20211123200412epcas1p32bd625558b9aa40fa49cd0b23039e59a@epcas1p3.samsung.com>
2021-11-23 20:03 ` [PATCH v3 00/12] fsl_esdhc_imx: port several patches from fsl_esdhc Sean Anderson
2021-11-23 20:03 ` [PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC Sean Anderson
2021-11-23 20:03 ` [PATCH v3 02/12] mmc: fsl_esdhc_imx: remove redundant DM_MMC checking Sean Anderson
2021-11-23 20:03 ` [PATCH v3 03/12] mmc: fsl_esdhc_imx: fix voltage validation Sean Anderson
2021-11-23 20:03 ` [PATCH v3 04/12] mmc: fsl_esdhc_imx: clean up bus width configuration code Sean Anderson
2021-11-23 20:03 ` [PATCH v3 05/12] mmc: fsl_esdhc_imx: drop redundant code for non-removable feature Sean Anderson
2021-11-23 20:03 ` [PATCH v3 06/12] mmc: fsl_esdhc_imx: fix mmc->clock with actual clock Sean Anderson
2021-11-23 20:03 ` [PATCH v3 07/12] mmc: fsl_esdhc_imx: simplify 64bit check for SDMA transfers Sean Anderson
2021-11-23 20:03 ` [PATCH v3 08/12] mmc: fsl_esdhc_imx: use dma-mapping API Sean Anderson
2021-11-23 20:03 ` [PATCH v3 09/12] mmc: fsl_esdhc_imx: simplify esdhc_setup_data() Sean Anderson
2021-11-23 20:03 ` [PATCH v3 10/12] mmc: fsl_esdhc_imx: replace most #ifdefs by IS_ENABLED() Sean Anderson
2021-11-23 20:03 ` [PATCH v3 11/12] mmc: fsl_esdhc_imx: Replace more #ifdefs by if Sean Anderson
2021-11-23 20:03 ` Sean Anderson [this message]
2022-01-03 23:19 ` [PATCH v3 00/12] fsl_esdhc_imx: port several patches from fsl_esdhc Jaehoon Chung
2022-01-04 16:16 ` [RESEND PATCH v3 01/12] mmc: fsl_esdhc_imx: make BLK as hard requirement of DM_MMC Sean Anderson
2022-01-11 1:14 ` Jaehoon Chung
2022-01-11 16:15 ` Sean Anderson
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