From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [RFC PATCH 5/6] crypto: xilinx: Add Xilinx SHA3 driver
Date: Wed, 01 Dec 2021 02:07:43 +0800 [thread overview]
Message-ID: <202112010135.ywERku7C-lkp@intel.com> (raw)
In-Reply-To: <1638262465-10790-6-git-send-email-harsha.harsha@xilinx.com>
[-- Attachment #1: Type: text/plain, Size: 3589 bytes --]
Hi Harsha,
[FYI, it's a private test report for your RFC patch.]
[auto build test ERROR on herbert-cryptodev-2.6/master]
[also build test ERROR on herbert-crypto-2.6/master v5.16-rc3]
[cannot apply to xilinx-xlnx/master next-20211130]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Harsha/crypto-Add-Xilinx-ZynqMP-SHA3-driver-support/20211130-165543
base: https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
config: arc-allyesconfig (https://download.01.org/0day-ci/archive/20211201/202112010135.ywERku7C-lkp(a)intel.com/config)
compiler: arceb-elf-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/bacee926fef236ebb8e1d353d89e3378e949d32e
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Harsha/crypto-Add-Xilinx-ZynqMP-SHA3-driver-support/20211130-165543
git checkout bacee926fef236ebb8e1d353d89e3378e949d32e
# save the config file to linux build tree
mkdir build_dir
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=arc SHELL=/bin/bash
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/crypto/xilinx/zynqmp-sha.c: In function 'zynqmp_sha_digest':
>> drivers/crypto/xilinx/zynqmp-sha.c:148:17: error: implicit declaration of function 'flush_icache_user_range'; did you mean 'flush_icache_range'? [-Werror=implicit-function-declaration]
148 | flush_icache_user_range((unsigned long)ubuf, (unsigned long)ubuf + update_size);
| ^~~~~~~~~~~~~~~~~~~~~~~
| flush_icache_range
cc1: some warnings being treated as errors
vim +148 drivers/crypto/xilinx/zynqmp-sha.c
127
128 static int zynqmp_sha_digest(struct shash_desc *desc, const u8 *data, unsigned int len, u8 *out)
129 {
130 int remaining_len = len;
131 int update_size;
132 int ret;
133
134 ret = zynqmp_pm_sha_hash(0, 0, ZYNQMP_SHA3_INIT);
135 if (ret)
136 return ret;
137
138 while (remaining_len != 0) {
139 memset(ubuf, 0, ZYNQMP_DMA_ALLOC_FIXED_SIZE);
140 if (remaining_len >= ZYNQMP_DMA_ALLOC_FIXED_SIZE) {
141 update_size = ZYNQMP_DMA_ALLOC_FIXED_SIZE;
142 remaining_len -= ZYNQMP_DMA_ALLOC_FIXED_SIZE;
143 } else {
144 update_size = remaining_len;
145 remaining_len = 0;
146 }
147 memcpy(ubuf, data, update_size);
> 148 flush_icache_user_range((unsigned long)ubuf, (unsigned long)ubuf + update_size);
149 ret = zynqmp_pm_sha_hash(update_dma_addr, update_size, ZYNQMP_SHA3_UPDATE);
150 if (ret)
151 return ret;
152
153 data += update_size;
154 }
155
156 ret = zynqmp_pm_sha_hash(final_dma_addr, SHA3_384_DIGEST_SIZE, ZYNQMP_SHA3_FINAL);
157 memcpy(out, fbuf, SHA3_384_DIGEST_SIZE);
158 memset(fbuf, 0, SHA3_384_DIGEST_SIZE);
159
160 return ret;
161 }
162
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
next prev parent reply other threads:[~2021-11-30 18:07 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 8:54 [RFC PATCH 0/6] crypto: Add Xilinx ZynqMP SHA3 driver support Harsha
2021-11-30 8:54 ` Harsha
2021-11-30 8:54 ` [RFC PATCH 1/6] drivers: crypto: Updated Makefile for xilinx subdirectory Harsha
2021-11-30 8:54 ` Harsha
2021-11-30 8:54 ` [RFC PATCH 2/6] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality Harsha
2021-11-30 8:54 ` Harsha
2021-11-30 8:54 ` [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver Harsha
2021-11-30 8:54 ` Harsha
2021-12-07 21:30 ` Rob Herring
2021-12-07 21:30 ` Rob Herring
2021-12-08 4:17 ` Harsha Harsha
2021-12-08 4:17 ` Harsha Harsha
2021-12-08 17:12 ` Rob Herring
2021-12-08 17:12 ` Rob Herring
2021-12-09 7:20 ` Harsha Harsha
2021-12-09 7:20 ` Harsha Harsha
2021-11-30 8:54 ` [RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node Harsha
2021-11-30 8:54 ` Harsha
2021-11-30 8:54 ` [RFC PATCH 5/6] crypto: xilinx: Add Xilinx SHA3 driver Harsha
2021-11-30 8:54 ` Harsha
2021-11-30 14:14 ` Randy Dunlap
2021-11-30 14:14 ` Randy Dunlap
2021-11-30 16:38 ` Harsha Harsha
2021-11-30 16:38 ` Harsha Harsha
2021-11-30 18:07 ` kernel test robot [this message]
2021-11-30 8:54 ` [RFC PATCH 6/6] MAINTAINERS: Add maintainer for Xilinx ZynqMP " Harsha
2021-11-30 8:54 ` Harsha
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