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From: Rob Herring <robh@kernel.org>
To: Harsha Harsha <harshah@xilinx.com>
Cc: "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Michal Simek <michals@xilinx.com>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Sarat Chand Savitala <saratcha@xilinx.com>,
	Harsh Jain <harshj@xilinx.com>
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
Date: Wed, 8 Dec 2021 11:12:28 -0600	[thread overview]
Message-ID: <CAL_Jsq+FWdOBB6YxUkK1rqGe-WiW6MAcKuQd=CXA4+7fRcF4xQ@mail.gmail.com> (raw)
In-Reply-To: <PH0PR02MB7271C9F92C667D80AB0A5CA8DE6F9@PH0PR02MB7271.namprd02.prod.outlook.com>

On Tue, Dec 7, 2021 at 10:17 PM Harsha Harsha <harshah@xilinx.com> wrote:
>
> Hi Rob,
>
> Thanks for your review.
>
>
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Wednesday, December 8, 2021 3:00 AM
> > To: Harsha Harsha <harshah@xilinx.com>
> > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; Michal
> > Simek <michals@xilinx.com>; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Sarat Chand Savitala
> > <saratcha@xilinx.com>; Harsh Jain <harshj@xilinx.com>
> > Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
> >
> > On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:
> > > This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
> > > bindings.
> > >
> > > Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> > > ---
> > >  .../bindings/crypto/xlnx,zynqmp-sha3.yaml          | 30 ++++++++++++++++++++++
> > >  1 file changed, 30 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > > new file mode 100644
> > > index 0000000..45a8022
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > > @@ -0,0 +1,30 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
> > > +
> > > +maintainers:
> > > +  - Harsha Harsha<harsha.harsha@xilinx.com>
> >
> > space               ^
>
> Accepted. Will remove space in next version of patch series.
>
> >
> > > +
> > > +description: |
> >
> > Don't need '|' if no formatting to preserve.
>
> Accepted. Will remove | in next version of patch series.
>
> >
> > > +  The ZynqMP SHA3 hardened cryptographic accelerator is used to
> > > +  calculate the SHA3 hash for the given user data.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: xlnx,zynqmp-sha3-384
> > > +
> > > +required:
> > > +  - compatible
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +    xlnx_sha3_384: sha3-384 {
> >
> > crypto {
> >
> > > +      compatible = "xlnx,zynqmp-sha3-384";
> >
> > You need some way to access this h/w.
>
> Accepted. Will add required details similar to https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml

Why do you need a node for each crypto algorithm? Can't your firmware
tell you what algorithms it supports? Worst case, try each possible
one and see what fails or not. None of this needs to be in DT.

Rob

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Harsha Harsha <harshah@xilinx.com>
Cc: "herbert@gondor.apana.org.au" <herbert@gondor.apana.org.au>,
	 "davem@davemloft.net" <davem@davemloft.net>,
	 "linux-crypto@vger.kernel.org" <linux-crypto@vger.kernel.org>,
	 "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Michal Simek <michals@xilinx.com>,
	 "linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	 "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Sarat Chand Savitala <saratcha@xilinx.com>,
	Harsh Jain <harshj@xilinx.com>
Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
Date: Wed, 8 Dec 2021 11:12:28 -0600	[thread overview]
Message-ID: <CAL_Jsq+FWdOBB6YxUkK1rqGe-WiW6MAcKuQd=CXA4+7fRcF4xQ@mail.gmail.com> (raw)
In-Reply-To: <PH0PR02MB7271C9F92C667D80AB0A5CA8DE6F9@PH0PR02MB7271.namprd02.prod.outlook.com>

On Tue, Dec 7, 2021 at 10:17 PM Harsha Harsha <harshah@xilinx.com> wrote:
>
> Hi Rob,
>
> Thanks for your review.
>
>
> > -----Original Message-----
> > From: Rob Herring <robh@kernel.org>
> > Sent: Wednesday, December 8, 2021 3:00 AM
> > To: Harsha Harsha <harshah@xilinx.com>
> > Cc: herbert@gondor.apana.org.au; davem@davemloft.net; linux-crypto@vger.kernel.org; linux-kernel@vger.kernel.org; Michal
> > Simek <michals@xilinx.com>; linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org; Sarat Chand Savitala
> > <saratcha@xilinx.com>; Harsh Jain <harshj@xilinx.com>
> > Subject: Re: [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver
> >
> > On Tue, Nov 30, 2021 at 02:24:22PM +0530, Harsha wrote:
> > > This patch adds documentation to describe Xilinx ZynqMP SHA3 driver
> > > bindings.
> > >
> > > Signed-off-by: Harsha <harsha.harsha@xilinx.com>
> > > ---
> > >  .../bindings/crypto/xlnx,zynqmp-sha3.yaml          | 30 ++++++++++++++++++++++
> > >  1 file changed, 30 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > >
> > > diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > > new file mode 100644
> > > index 0000000..45a8022
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-sha3.yaml
> > > @@ -0,0 +1,30 @@
> > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-sha3.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Xilinx ZynqMP SHA3 Hardware Accelerator Device Tree Bindings
> > > +
> > > +maintainers:
> > > +  - Harsha Harsha<harsha.harsha@xilinx.com>
> >
> > space               ^
>
> Accepted. Will remove space in next version of patch series.
>
> >
> > > +
> > > +description: |
> >
> > Don't need '|' if no formatting to preserve.
>
> Accepted. Will remove | in next version of patch series.
>
> >
> > > +  The ZynqMP SHA3 hardened cryptographic accelerator is used to
> > > +  calculate the SHA3 hash for the given user data.
> > > +
> > > +properties:
> > > +  compatible:
> > > +    const: xlnx,zynqmp-sha3-384
> > > +
> > > +required:
> > > +  - compatible
> > > +
> > > +additionalProperties: false
> > > +
> > > +examples:
> > > +  - |
> > > +    xlnx_sha3_384: sha3-384 {
> >
> > crypto {
> >
> > > +      compatible = "xlnx,zynqmp-sha3-384";
> >
> > You need some way to access this h/w.
>
> Accepted. Will add required details similar to https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml

Why do you need a node for each crypto algorithm? Can't your firmware
tell you what algorithms it supports? Worst case, try each possible
one and see what fails or not. None of this needs to be in DT.

Rob

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-12-08 17:12 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-30  8:54 [RFC PATCH 0/6] crypto: Add Xilinx ZynqMP SHA3 driver support Harsha
2021-11-30  8:54 ` Harsha
2021-11-30  8:54 ` [RFC PATCH 1/6] drivers: crypto: Updated Makefile for xilinx subdirectory Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 2/6] firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 3/6] dt-bindings: crypto: Add bindings for ZynqMP SHA3 driver Harsha
2021-11-30  8:54   ` Harsha
2021-12-07 21:30   ` Rob Herring
2021-12-07 21:30     ` Rob Herring
2021-12-08  4:17     ` Harsha Harsha
2021-12-08  4:17       ` Harsha Harsha
2021-12-08 17:12       ` Rob Herring [this message]
2021-12-08 17:12         ` Rob Herring
2021-12-09  7:20         ` Harsha Harsha
2021-12-09  7:20           ` Harsha Harsha
2021-11-30  8:54 ` [RFC PATCH 4/6] arm64: dts: zynqmp: Add Xilinx SHA3 node Harsha
2021-11-30  8:54   ` Harsha
2021-11-30  8:54 ` [RFC PATCH 5/6] crypto: xilinx: Add Xilinx SHA3 driver Harsha
2021-11-30  8:54   ` Harsha
2021-11-30 14:14   ` Randy Dunlap
2021-11-30 14:14     ` Randy Dunlap
2021-11-30 16:38     ` Harsha Harsha
2021-11-30 16:38       ` Harsha Harsha
2021-11-30 18:07   ` kernel test robot
2021-11-30  8:54 ` [RFC PATCH 6/6] MAINTAINERS: Add maintainer for Xilinx ZynqMP " Harsha
2021-11-30  8:54   ` Harsha

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