* [PATCH v2 0/3] Apple M1 power management controller support
@ 2021-12-23 21:34 Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
` (2 more replies)
0 siblings, 3 replies; 14+ messages in thread
From: Mark Kettenis @ 2021-12-23 21:34 UTC (permalink / raw)
To: u-boot; +Cc: sjg, jh80.chung, Mark Kettenis
This series adds support for the power management controller found on
Apple SoCs based on the device tree bindings submitted to upstream
Linux. This is needed to enable power domains for devices that
haven't been enabled by earlier boot stages.
ChangeLog:
v2: - Drop unrelated changes from device tree update
Mark Kettenis (3):
arm: dts: apple: Update Apple M1 device trees
arm: dts: apple: Add u-boot,dm-pre-reloc properties
power: domain: Add Apple pmgr driver
arch/arm/Kconfig | 3 +
arch/arm/dts/Makefile | 5 +-
arch/arm/dts/t8103-j274-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j274.dts | 122 +--
arch/arm/dts/t8103-j293-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j293.dts | 92 +--
arch/arm/dts/t8103-j313-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j313.dts | 57 ++
arch/arm/dts/t8103-j456-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j456.dts | 71 ++
arch/arm/dts/t8103-j457-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j457.dts | 59 ++
arch/arm/dts/t8103-jxxx.dtsi | 140 ++++
arch/arm/dts/t8103-pmgr.dtsi | 1136 +++++++++++++++++++++++++++
arch/arm/dts/t8103-u-boot.dtsi | 25 +
arch/arm/dts/t8103.dtsi | 585 +++++++-------
drivers/power/domain/Kconfig | 8 +
drivers/power/domain/Makefile | 1 +
drivers/power/domain/apple-pmgr.c | 113 +++
19 files changed, 1994 insertions(+), 428 deletions(-)
create mode 100644 arch/arm/dts/t8103-j274-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j293-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j313-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j313.dts
create mode 100644 arch/arm/dts/t8103-j456-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j456.dts
create mode 100644 arch/arm/dts/t8103-j457-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j457.dts
create mode 100644 arch/arm/dts/t8103-jxxx.dtsi
create mode 100644 arch/arm/dts/t8103-pmgr.dtsi
create mode 100644 arch/arm/dts/t8103-u-boot.dtsi
create mode 100644 drivers/power/domain/apple-pmgr.c
--
2.34.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees
2021-12-23 21:34 [PATCH v2 0/3] Apple M1 power management controller support Mark Kettenis
@ 2021-12-23 21:34 ` Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
2021-12-23 21:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 3/3] power: domain: Add Apple pmgr driver Mark Kettenis
2 siblings, 2 replies; 14+ messages in thread
From: Mark Kettenis @ 2021-12-23 21:34 UTC (permalink / raw)
To: u-boot; +Cc: sjg, jh80.chung, Mark Kettenis
This synchronizes the device trees with those that are in the
process of being upstreamed into Linux 5.16 or proposed for
Linux 5.17. This includes device trees for machines that were
still missing.
There are still some differences that will hopefully be resolved
soon.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
arch/arm/dts/Makefile | 5 +-
arch/arm/dts/t8103-j274.dts | 122 +---
arch/arm/dts/t8103-j293.dts | 92 +--
arch/arm/dts/t8103-j313.dts | 57 ++
arch/arm/dts/t8103-j456.dts | 71 +++
arch/arm/dts/t8103-j457.dts | 59 ++
arch/arm/dts/t8103-jxxx.dtsi | 140 +++++
arch/arm/dts/t8103-pmgr.dtsi | 1136 ++++++++++++++++++++++++++++++++++
arch/arm/dts/t8103.dtsi | 585 +++++++++--------
9 files changed, 1839 insertions(+), 428 deletions(-)
create mode 100644 arch/arm/dts/t8103-j313.dts
create mode 100644 arch/arm/dts/t8103-j456.dts
create mode 100644 arch/arm/dts/t8103-j457.dts
create mode 100644 arch/arm/dts/t8103-jxxx.dtsi
create mode 100644 arch/arm/dts/t8103-pmgr.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7f622fedbd..35872e1574 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -34,7 +34,10 @@ dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb
dtb-$(CONFIG_ARCH_APPLE) += \
t8103-j274.dtb \
- t8103-j293.dtb
+ t8103-j293.dtb \
+ t8103-j313.dtb \
+ t8103-j456.dtb \
+ t8103-j457.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-evm.dtb \
diff --git a/arch/arm/dts/t8103-j274.dts b/arch/arm/dts/t8103-j274.dts
index aef1ae29b6..2144768147 100644
--- a/arch/arm/dts/t8103-j274.dts
+++ b/arch/arm/dts/t8103-j274.dts
@@ -10,126 +10,48 @@
/dts-v1/;
#include "t8103.dtsi"
+#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j274", "apple,t8103", "apple,arm-platform";
model = "Apple Mac mini (M1, 2020)";
aliases {
- serial0 = &serial0;
- ethernet0 = ð0;
- wifi0 = &wifi0;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- stdout-path = "serial0";
-
- framebuffer0: framebuffer@0 {
- compatible = "apple,simple-framebuffer", "simple-framebuffer";
- reg = <0 0 0 0>; /* To be filled by loader */
- /* Format properties will be added by loader */
- status = "disabled";
- };
- };
-
- memory@800000000 {
- device_type = "memory";
- reg = <0x8 0 0x2 0>; /* To be filled by loader */
+ ethernet0 = ðernet0;
};
};
-&serial0 {
- status = "okay";
-};
-
-&pcie0_dart_0 {
- status = "okay";
-};
+/*
+ * Provide labels for the USB type C ports.
+ */
-&pcie0_dart_1 {
- status = "okay";
+&typec0 {
+ label = "USB-C Back-left";
};
-&pcie0_dart_2 {
- status = "okay";
+&typec1 {
+ label = "USB-C Back-right";
};
-&pcie0 {
- status = "okay";
-
- pci0: pci@0,0 {
- device_type = "pci";
- reg = <0x0 0x0 0x0 0x0 0x0>;
- pwren-gpios = <&smc 13 0>;
- reset-gpios = <&pinctrl_ap 152 0>;
- max-link-speed = <2>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
-
- pci1: pci@1,0 {
- device_type = "pci";
- reg = <0x800 0x0 0x0 0x0 0x0>;
- reset-gpios = <&pinctrl_ap 153 0>;
- max-link-speed = <2>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
-
- pci2: pci@2,0 {
- device_type = "pci";
- reg = <0x1000 0x0 0x0 0x0 0x0>;
- reset-gpios = <&pinctrl_ap 33 0>;
- max-link-speed = <1>;
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
+&port01 {
+ bus-range = <2 2>;
};
-&pci0 {
- wifi0: network@0,0 {
- reg = <0x10000 0x0 0x0 0x0 0x0>;
- local-mac-address = [00 00 00 00 00 00];
- };
-};
-
-&pci2 {
- eth0: ethernet@0,0 {
+&port02 {
+ bus-range = <3 3>;
+ ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
- local-mac-address = [00 00 00 00 00 00];
+ /* To be filled by the loader */
+ local-mac-address = [00 10 18 00 00 00];
};
};
-&dwc3_0_dart_0 {
- status = "okay";
-};
-
-&dwc3_0_dart_1 {
- status = "okay";
-};
-
-&dwc3_0 {
- status = "okay";
-};
-
-&dwc3_1_dart_0 {
- status = "okay";
-};
-
-&dwc3_1_dart_1 {
- status = "okay";
-};
-
-&dwc3_1 {
+&i2c2 {
status = "okay";
};
diff --git a/arch/arm/dts/t8103-j293.dts b/arch/arm/dts/t8103-j293.dts
index 4a22596cf4..cf92ee53e0 100644
--- a/arch/arm/dts/t8103-j293.dts
+++ b/arch/arm/dts/t8103-j293.dts
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
- * Apple Macbook Pro (M1, 2020)
+ * Apple MacBook Pro (13-inch, M1, 2020)
*
* target-type: J293
*
@@ -10,88 +10,56 @@
/dts-v1/;
#include "t8103.dtsi"
+#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j293", "apple,t8103", "apple,arm-platform";
- model = "Apple Macbook Pro (M1, 2020)";
-
- aliases {
- serial0 = &serial0;
- wifi0 = &wifi0;
- };
-
- chosen {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- stdout-path = "serial0";
-
- framebuffer0: framebuffer@0 {
- compatible = "apple,simple-framebuffer", "simple-framebuffer";
- reg = <0 0 0 0>; /* To be filled by loader */
- /* Format properties will be added by loader */
- status = "disabled";
- };
- };
-
- memory@800000000 {
- device_type = "memory";
- reg = <0x8 0 0x2 0>; /* To be filled by loader */
- };
+ model = "Apple MacBook Pro (13-inch, M1, 2020)";
};
-&serial0 {
- status = "okay";
-};
+/*
+ * Provide labels for the USB type C ports.
+ */
-&pcie0_dart_0 {
- status = "okay";
+&typec0 {
+ label = "USB-C Left-back";
};
-&pcie0 {
- status = "okay";
-
- pci0: pci@0,0 {
- device_type = "pci";
- reg = <0x0 0x0 0x0 0x0 0x0>;
- pwren-gpios = <&smc 13 0>;
- reset-gpios = <&pinctrl_ap 152 0>;
- max-link-speed = <2>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
- };
+&typec1 {
+ label = "USB-C Left-front";
};
-&pci0 {
- wifi0: network@0,0 {
- reg = <0x10000 0x0 0x0 0x0 0x0>;
- local-mac-address = [00 00 00 00 00 00];
- };
-};
+/*
+ * Remove unused PCIe ports and disable the associated DARTs.
+ */
-&dwc3_0_dart_0 {
- status = "okay";
+&pcie0_dart_1 {
+ status = "disabled";
};
-&dwc3_0_dart_1 {
- status = "okay";
+&pcie0_dart_2 {
+ status = "disabled";
};
-&dwc3_0 {
- status = "okay";
-};
+/delete-node/ &port01;
+/delete-node/ &port02;
-&dwc3_1_dart_0 {
+&i2c2 {
status = "okay";
};
-&dwc3_1_dart_1 {
+&i2c4 {
status = "okay";
};
-&dwc3_1 {
+&spi3 {
status = "okay";
+
+ keyboard@0 {
+ compatible = "apple,keyboard";
+ spi-max-frequency = <2000000>;
+ reg = <0>;
+ interrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;
+ spien-gpios = <&pinctrl_ap 195 GPIO_ACTIVE_HIGH>;
+ };
};
diff --git a/arch/arm/dts/t8103-j313.dts b/arch/arm/dts/t8103-j313.dts
new file mode 100644
index 0000000000..c8574d81c8
--- /dev/null
+++ b/arch/arm/dts/t8103-j313.dts
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple MacBook Air (M1, 2020)
+ *
+ * target-type: J313
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8103.dtsi"
+#include "t8103-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j313", "apple,t8103", "apple,arm-platform";
+ model = "Apple MacBook Air (M1, 2020)";
+};
+
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Left-back";
+};
+
+&typec1 {
+ label = "USB-C Left-front";
+};
+
+/*
+ * Remove unused PCIe ports and disable the associated DARTs.
+ */
+
+&pcie0_dart_1 {
+ status = "disabled";
+};
+
+&pcie0_dart_2 {
+ status = "disabled";
+};
+
+/delete-node/ &port01;
+/delete-node/ &port02;
+
+&spi3 {
+ status = "okay";
+
+ keyboard@0 {
+ compatible = "apple,keyboard";
+ spi-max-frequency = <2000000>;
+ reg = <0>;
+ interrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;
+ spien-gpios = <&pinctrl_ap 195 GPIO_ACTIVE_HIGH>;
+ };
+};
diff --git a/arch/arm/dts/t8103-j456.dts b/arch/arm/dts/t8103-j456.dts
new file mode 100644
index 0000000000..9814c97cd9
--- /dev/null
+++ b/arch/arm/dts/t8103-j456.dts
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple iMac (24-inch, 4x USB-C, M1, 2020)
+ *
+ * target-type: J456
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8103.dtsi"
+#include "t8103-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j456", "apple,t8103", "apple,arm-platform";
+ model = "Apple iMac (24-inch, 4x USB-C, M1, 2020)";
+
+ aliases {
+ ethernet0 = ðernet0;
+ };
+};
+
+&i2c0 {
+ hpm2: usb-pd@3b {
+ compatible = "apple,cd321x";
+ reg = <0x3b>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+ };
+
+ hpm3: usb-pd@3c {
+ compatible = "apple,cd321x";
+ reg = <0x3c>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+ };
+};
+
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Back-right";
+};
+
+&typec1 {
+ label = "USB-C Back-right-middle";
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+
+&port01 {
+ bus-range = <2 2>;
+};
+
+&port02 {
+ bus-range = <3 3>;
+ ethernet0: ethernet@0,0 {
+ reg = <0x30000 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-mac-address = [00 10 18 00 00 00];
+ };
+};
diff --git a/arch/arm/dts/t8103-j457.dts b/arch/arm/dts/t8103-j457.dts
new file mode 100644
index 0000000000..0f4cc64374
--- /dev/null
+++ b/arch/arm/dts/t8103-j457.dts
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple iMac (24-inch, 2x USB-C, M1, 2020)
+ *
+ * target-type: J457
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8103.dtsi"
+#include "t8103-jxxx.dtsi"
+
+/ {
+ compatible = "apple,j457", "apple,t8103", "apple,arm-platform";
+ model = "Apple iMac (24-inch, 2x USB-C, M1, 2020)";
+
+ aliases {
+ ethernet0 = ðernet0;
+ };
+};
+
+/*
+ * Provide labels for the USB type C ports.
+ */
+
+&typec0 {
+ label = "USB-C Back-right";
+};
+
+&typec1 {
+ label = "USB-C Back-left";
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+
+&port02 {
+ bus-range = <3 3>;
+ ethernet0: ethernet@0,0 {
+ reg = <0x30000 0x0 0x0 0x0 0x0>;
+ /* To be filled by the loader */
+ local-mac-address = [00 10 18 00 00 00];
+ };
+};
+
+/*
+ * Remove unused PCIe port and disable the associated DART.
+ */
+
+&pcie0_dart_1 {
+ status = "disabled";
+};
+
+/delete-node/ &port01;
diff --git a/arch/arm/dts/t8103-jxxx.dtsi b/arch/arm/dts/t8103-jxxx.dtsi
new file mode 100644
index 0000000000..8478090b34
--- /dev/null
+++ b/arch/arm/dts/t8103-jxxx.dtsi
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple M1 Mac mini, MacBook Air/Pro, iMac 24" (M1, 2020/2021)
+ *
+ * This file contains parts common to all Apple M1 devices using the t8103.
+ *
+ * target-type: J274, J293, J313, J456, J457
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+#include <dt-bindings/spmi/spmi.h>
+
+/ {
+ aliases {
+ serial0 = &serial0;
+ serial2 = &serial2;
+ wifi0 = &wifi0;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ stdout-path = "serial0";
+
+ framebuffer0: framebuffer@0 {
+ compatible = "apple,simple-framebuffer", "simple-framebuffer";
+ reg = <0 0 0 0>; /* To be filled by loader */
+ /* Format properties will be added by loader */
+ status = "disabled";
+ };
+ };
+
+ memory@800000000 {
+ device_type = "memory";
+ reg = <0x8 0 0x2 0>; /* To be filled by loader */
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&i2c0 {
+ hpm0: usb-pd@38 {
+ compatible = "apple,cd321x";
+ reg = <0x38>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+
+ typec0: connector {
+ compatible = "usb-c-connector";
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ typec0_con_hs: endpoint {
+ remote-endpoint = <&typec0_usb_hs>;
+ };
+ };
+ };
+ };
+ };
+
+ hpm1: usb-pd@3f {
+ compatible = "apple,cd321x";
+ reg = <0x3f>;
+ interrupt-parent = <&pinctrl_ap>;
+ interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "irq";
+
+ typec1: connector {
+ compatible = "usb-c-connector";
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ typec1_con_hs: endpoint {
+ remote-endpoint = <&typec1_usb_hs>;
+ };
+ };
+ };
+ };
+ };
+};
+
+/* USB controllers */
+&dwc3_0 {
+ port {
+ typec0_usb_hs: endpoint {
+ remote-endpoint = <&typec0_con_hs>;
+ };
+ };
+};
+
+&dwc3_1 {
+ port {
+ typec1_usb_hs: endpoint {
+ remote-endpoint = <&typec1_con_hs>;
+ };
+ };
+};
+
+/*
+ * Force the bus number assignments so that we can declare some of the
+ * on-board devices and properties that are populated by the bootloader
+ * (such as MAC addresses).
+ */
+&port00 {
+ bus-range = <1 1>;
+ pwren-gpios = <&smc 13 0>;
+ wifi0: network@0,0 {
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+};
+
+&spmi {
+ status = "okay";
+
+ pmu@f {
+ compatible = "apple,sera-pmu";
+ reg = <0xf SPMI_USID>;
+ };
+};
diff --git a/arch/arm/dts/t8103-pmgr.dtsi b/arch/arm/dts/t8103-pmgr.dtsi
new file mode 100644
index 0000000000..1310be74df
--- /dev/null
+++ b/arch/arm/dts/t8103-pmgr.dtsi
@@ -0,0 +1,1136 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * PMGR Power domains for the Apple T8103 "M1" SoC
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+
+&pmgr {
+ ps_sbr: power-controller@100 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x100 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sbr";
+ apple,always-on; /* Core device */
+ };
+
+ ps_aic: power-controller@108 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x108 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aic";
+ apple,always-on; /* Core device */
+ };
+
+ ps_dwi: power-controller@110 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x110 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dwi";
+ apple,always-on; /* Core device */
+ };
+
+ ps_soc_spmi0: power-controller@118 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x118 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_spmi0";
+ };
+
+ ps_soc_spmi1: power-controller@120 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x120 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_spmi1";
+ };
+
+ ps_soc_spmi2: power-controller@128 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x128 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_spmi2";
+ };
+
+ ps_gpio: power-controller@130 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x130 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "gpio";
+ };
+
+ ps_pms_busif: power-controller@138 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x138 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_busif";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pms: power-controller@140 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x140 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pms_fpwm0: power-controller@148 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x148 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_fpwm0";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_pms_fpwm1: power-controller@150 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x150 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_fpwm1";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_pms_fpwm2: power-controller@158 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x158 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_fpwm2";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_pms_fpwm3: power-controller@160 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x160 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_fpwm3";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_pms_fpwm4: power-controller@168 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x168 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_fpwm4";
+ power-domains = <&ps_pms>;
+ };
+
+ ps_soc_dpe: power-controller@170 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x170 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "soc_dpe";
+ apple,always-on; /* Core device */
+ };
+
+ ps_pmgr_soc_ocla: power-controller@178 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x178 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pmgr_soc_ocla";
+ };
+
+ ps_ispsens0: power-controller@180 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x180 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens0";
+ };
+
+ ps_ispsens1: power-controller@188 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x188 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens1";
+ };
+
+ ps_ispsens2: power-controller@190 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x190 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens2";
+ };
+
+ ps_ispsens3: power-controller@198 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x198 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ispsens3";
+ };
+
+ ps_pcie_ref: power-controller@1a0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1a0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pcie_ref";
+ };
+
+ ps_aft0: power-controller@1a8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aft0";
+ };
+
+ ps_devc0_ivdmc: power-controller@1b0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "devc0_ivdmc";
+ };
+
+ ps_imx: power-controller@1b8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1b8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "imx";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_sio_busif: power-controller@1c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_busif";
+ };
+
+ ps_sio: power-controller@1c8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio";
+ power-domains = <&ps_sio_busif>;
+ };
+
+ ps_sio_cpu: power-controller@1d0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1d0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_cpu";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_fpwm0: power-controller@1d8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm0";
+ };
+
+ ps_fpwm1: power-controller@1e0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm1";
+ };
+
+ ps_fpwm2: power-controller@1e8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "fpwm2";
+ };
+
+ ps_i2c0: power-controller@1f0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c0";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c1: power-controller@1f8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c1";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c2: power-controller@200 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x200 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c2";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c3: power-controller@208 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x208 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c3";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_i2c4: power-controller@210 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x210 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "i2c4";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_spi_p: power-controller@218 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x218 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_uart_p: power-controller@220 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x220 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_audio_p: power-controller@228 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x228 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "audio_p";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_sio_adma: power-controller@230 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x230 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sio_adma";
+ power-domains = <&ps_sio>, <&ps_pms>;
+ };
+
+ ps_aes: power-controller@238 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x238 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "aes";
+ power-domains = <&ps_sio>;
+ };
+
+ ps_spi0: power-controller@240 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x240 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi0";
+ power-domains = <&ps_sio>, <&ps_spi_p>;
+ };
+
+ ps_spi1: power-controller@248 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x248 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi1";
+ power-domains = <&ps_sio>, <&ps_spi_p>;
+ };
+
+ ps_spi2: power-controller@250 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x250 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi2";
+ power-domains = <&ps_sio>, <&ps_spi_p>;
+ };
+
+ ps_spi3: power-controller@258 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x258 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi3";
+ power-domains = <&ps_sio>, <&ps_spi_p>;
+ };
+
+ ps_uart_n: power-controller@268 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x268 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart_n";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart0: power-controller@270 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x270 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart0";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart1: power-controller@278 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x278 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart1";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart2: power-controller@280 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x280 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart2";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart3: power-controller@288 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x288 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart3";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart4: power-controller@290 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x290 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart4";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart5: power-controller@298 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x298 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart5";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart6: power-controller@2a0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2a0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart6";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart7: power-controller@2a8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart7";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart8: power-controller@2b0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "uart8";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_mca0: power-controller@2b8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2b8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca0";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_mca1: power-controller@2c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2c0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca1";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_mca2: power-controller@2c8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca2";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_mca3: power-controller@2d0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2d0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca3";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_mca4: power-controller@2d8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca4";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_mca5: power-controller@2e0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mca5";
+ power-domains = <&ps_audio_p>, <&ps_sio_adma>;
+ };
+
+ ps_dpa0: power-controller@2e8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dpa0";
+ power-domains = <&ps_audio_p>;
+ };
+
+ ps_dpa1: power-controller@2f0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dpa1";
+ power-domains = <&ps_audio_p>;
+ };
+
+ ps_mcc: power-controller@2f8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x2f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mcc";
+ apple,always-on; /* Memory controller */
+ };
+
+ ps_spi4: power-controller@260 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x260 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "spi4";
+ power-domains = <&ps_sio>, <&ps_spi_p>;
+ };
+
+ ps_dcs0: power-controller@300 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x300 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs0";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs1: power-controller@310 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x310 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs1";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs2: power-controller@308 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x308 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs2";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs3: power-controller@318 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x318 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs3";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_smx: power-controller@340 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x340 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "smx";
+ apple,always-on; /* Apple fabric, critical block */
+ };
+
+ ps_apcie: power-controller@348 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x348 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie";
+ power-domains = <&ps_imx>, <&ps_pcie_ref>;
+ };
+
+ ps_rmx: power-controller@350 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x350 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "rmx";
+ /* Apple Fabric, display/image stuff: this can power down */
+ };
+
+ ps_mmx: power-controller@358 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x358 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mmx";
+ /* Apple Fabric, media stuff: this can power down */
+ };
+
+ ps_disp0_fe: power-controller@360 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x360 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "disp0_fe";
+ power-domains = <&ps_rmx>;
+ apple,always-on; /* TODO: figure out if we can enable PM here */
+ };
+
+ ps_dispext_fe: power-controller@368 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x368 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispext_fe";
+ power-domains = <&ps_rmx>;
+ };
+
+ ps_dispext_cpu0: power-controller@378 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x378 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispext_cpu0";
+ power-domains = <&ps_dispext_fe>;
+ };
+
+ ps_jpg: power-controller@3c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3c0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "jpg";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_msr: power-controller@3c8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3c8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msr";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_msr_ase_core: power-controller@3d0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3d0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msr_ase_core";
+ };
+
+ ps_pmp: power-controller@3d8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3d8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pmp";
+ };
+
+ ps_pms_sram: power-controller@3e0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3e0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "pms_sram";
+ };
+
+ ps_apcie_gp: power-controller@3e8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3e8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie_gp";
+ power-domains = <&ps_apcie>;
+ };
+
+ ps_ans2: power-controller@3f0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3f0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ans2";
+ /*
+ * The ADT makes ps_apcie_st depend on ps_ans2 instead, but this
+ * doesn't make much sense since ANS2 uses APCIE_ST.
+ */
+ power-domains = <&ps_apcie_st>;
+ };
+
+ ps_gfx: power-controller@3f8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3f8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "gfx";
+ };
+
+ ps_dcs4: power-controller@320 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x320 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs4";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs5: power-controller@330 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x330 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs5";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs6: power-controller@328 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x328 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs6";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dcs7: power-controller@338 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x338 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dcs7";
+ apple,always-on; /* LPDDR4 interface */
+ };
+
+ ps_dispdfr_fe: power-controller@3a8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3a8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispdfr_fe";
+ power-domains = <&ps_rmx>;
+ };
+
+ ps_dispdfr_be: power-controller@3b0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3b0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "dispdfr_be";
+ power-domains = <&ps_dispdfr_fe>;
+ };
+
+ ps_mipi_dsi: power-controller@3b8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3b8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "mipi_dsi";
+ power-domains = <&ps_dispdfr_be>;
+ };
+
+ ps_isp_sys: power-controller@400 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x400 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "isp_sys";
+ power-domains = <&ps_rmx>;
+ };
+
+ ps_venc_sys: power-controller@408 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x408 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_sys";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_avd_sys: power-controller@410 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x410 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "avd_sys";
+ power-domains = <&ps_mmx>;
+ };
+
+ ps_apcie_st: power-controller@418 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x418 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "apcie_st";
+ power-domains = <&ps_apcie>;
+ };
+
+ ps_ane_sys: power-controller@470 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x470 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ane_sys";
+ };
+
+ ps_atc0_common: power-controller@420 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x420 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_common";
+ };
+
+ ps_atc0_pcie: power-controller@428 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x428 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_pcie";
+ power-domains = <&ps_atc0_common>;
+ };
+
+ ps_atc0_cio: power-controller@430 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x430 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio";
+ power-domains = <&ps_atc0_common>;
+ };
+
+ ps_atc0_cio_pcie: power-controller@438 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x438 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio_pcie";
+ power-domains = <&ps_atc0_cio>;
+ };
+
+ ps_atc0_cio_usb: power-controller@440 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x440 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_cio_usb";
+ power-domains = <&ps_atc0_cio>;
+ };
+
+ ps_atc1_common: power-controller@448 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x448 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_common";
+ };
+
+ ps_atc1_pcie: power-controller@450 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x450 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_pcie";
+ power-domains = <&ps_atc1_common>;
+ };
+
+ ps_atc1_cio: power-controller@458 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x458 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio";
+ power-domains = <&ps_atc1_common>;
+ };
+
+ ps_atc1_cio_pcie: power-controller@460 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x460 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio_pcie";
+ power-domains = <&ps_atc1_cio>;
+ };
+
+ ps_atc1_cio_usb: power-controller@468 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x468 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_cio_usb";
+ power-domains = <&ps_atc1_cio>;
+ };
+
+ ps_sep: power-controller@c00 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xc00 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "sep";
+ apple,always-on; /* Locked on */
+ };
+
+ ps_venc_dma: power-controller@8000 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8000 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_dma";
+ power-domains = <&ps_venc_sys>;
+ };
+
+ ps_venc_pipe4: power-controller@8008 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8008 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_pipe4";
+ power-domains = <&ps_venc_dma>;
+ };
+
+ ps_venc_pipe5: power-controller@8010 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8010 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_pipe5";
+ power-domains = <&ps_venc_dma>;
+ };
+
+ ps_venc_me0: power-controller@8018 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8018 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_me0";
+ power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
+ };
+
+ ps_venc_me1: power-controller@8020 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x8020 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "venc_me1";
+ power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
+ };
+
+ ps_ane_sys_cpu: power-controller@c000 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xc000 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "ane_sys_cpu";
+ power-domains = <&ps_ane_sys>;
+ };
+
+ ps_disp0_cpu0: power-controller@10018 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x10018 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "disp0_cpu0";
+ power-domains = <&ps_disp0_fe>;
+ apple,always-on; /* TODO: figure out if we can enable PM here */
+ };
+};
+
+&pmgr_mini {
+ ps_debug: power-controller@58 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x58 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "debug";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_spmi0: power-controller@60 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x60 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_spmi0";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_aon: power-controller@70 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x70 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_aon";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_gpio: power-controller@80 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x80 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_gpio";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_fabric: power-controller@a8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xa8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_fabric";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_nub_sram: power-controller@b0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xb0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_sram";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_debug_usb: power-controller@b8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xb8 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "debug_usb";
+ apple,always-on; /* Core AON device */
+ power-domains = <&ps_debug>;
+ };
+
+ ps_debug_auth: power-controller@c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xc0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "debug_auth";
+ apple,always-on; /* Core AON device */
+ power-domains = <&ps_debug>;
+ };
+
+ ps_nub_spmi1: power-controller@68 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x68 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "nub_spmi1";
+ apple,always-on; /* Core AON device */
+ };
+
+ ps_msg: power-controller@78 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x78 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "msg";
+ };
+
+ ps_atc0_usb_aon: power-controller@88 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x88 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_usb_aon";
+ };
+
+ ps_atc1_usb_aon: power-controller@90 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x90 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_usb_aon";
+ };
+
+ ps_atc0_usb: power-controller@98 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x98 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc0_usb";
+ power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
+ };
+
+ ps_atc1_usb: power-controller@a0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0xa0 4>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ label = "atc1_usb";
+ power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
+ };
+};
diff --git a/arch/arm/dts/t8103.dtsi b/arch/arm/dts/t8103.dtsi
index 03d8436fec..1f029cb8fd 100644
--- a/arch/arm/dts/t8103.dtsi
+++ b/arch/arm/dts/t8103.dtsi
@@ -11,7 +11,6 @@
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
-#include <dt-bindings/spmi/spmi.h>
/ {
compatible = "apple,t8103", "apple,arm-platform";
@@ -91,11 +90,11 @@
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&aic>;
- interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
- interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
- <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
- <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
- <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
+ interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
};
clkref: clock-ref {
@@ -111,18 +110,100 @@
#size-cells = <2>;
ranges;
- dma-ranges;
- dma-coherent;
nonposted-mmio;
+ i2c0: i2c@235010000 {
+ compatible = "apple,t8103-i2c", "apple,i2c";
+ reg = <0x2 0x35010000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c0>;
+ };
+
+ i2c1: i2c@235014000 {
+ compatible = "apple,t8103-i2c", "apple,i2c";
+ reg = <0x2 0x35014000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c1_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c1>;
+ };
+
+ i2c2: i2c@235018000 {
+ compatible = "apple,t8103-i2c", "apple,i2c";
+ reg = <0x2 0x35018000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c2>;
+ status = "disabled"; /* not used in all devices */
+ };
+
+ i2c3: i2c@23501c000 {
+ compatible = "apple,t8103-i2c", "apple,i2c";
+ reg = <0x2 0x3501c000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c3>;
+ };
+
+ i2c4: i2c@235020000 {
+ compatible = "apple,t8103-i2c", "apple,i2c";
+ reg = <0x2 0x35020000 0x0 0x4000>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&i2c4_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+ power-domains = <&ps_i2c4>;
+ status = "disabled"; /* only used in J293 */
+ };
+
+ spi3: spi@23510c000 {
+ compatible = "apple,t8103-spi", "apple,spi";
+ reg = <0x2 0x3510c000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkref>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_spi3>;
+ cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+ };
+
serial0: serial@235200000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x35200000 0x0 0x1000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkref>, <&clkref>, <&clkref>;
- clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
+ /*
+ * TODO: figure out the clocking properly, there may
+ * be a third selectable clock.
+ */
+ clocks = <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
@@ -133,8 +214,8 @@
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkref>, <&clkref>, <&clkref>;
- clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
+ clocks = <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart2>;
status = "disabled";
};
@@ -144,131 +225,28 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2 0x3b100000 0x0 0x8000>;
+ power-domains = <&ps_aic>;
};
- pmgr: power-controller@23b700000 {
+ pmgr: power-management@23b700000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0x2 0x3b700000 0x0 0x14000>;
-
- ps_pcie_ref: power-controller@1a0 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x1a0>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "pcie_ref";
- };
-
- ps_imx: power-controller@1b8 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x1b8>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "imx";
- apple,always-on;
- };
-
- ps_sio: power-controller@1c0 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x1c0>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "sio";
- };
-
- ps_uart_p: power-controller@220 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x220>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- power-domains = <&ps_sio>;
- apple,domain-name = "uart_p";
- };
-
- ps_uart0: power-controller@270 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x270>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- power-domains = <&ps_uart_p>;
- apple,domain-name = "uart0";
- };
-
- ps_uart1: power-controller@278 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x278>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "uart1";
- power-domains = <&ps_uart_p>;
- };
-
- ps_uart2: power-controller@280 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x280>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "uart2";
- power-domains = <&ps_uart_p>;
- };
-
- ps_uart3: power-controller@288 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x288>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "uart3";
- power-domains = <&ps_uart_p>;
- };
-
- ps_apcie: power-controller@348 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x348>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "apcie";
- power-domains = <&ps_imx>;
- };
-
- ps_apcie_gp: power-controller@3e8 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x3e8>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "apcie_gp";
- power-domains = <&ps_apcie>;
- };
-
- ps_ans2: power-controller@3f0 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x3f0>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "ans2";
- power-domains = <&ps_apcie_st>;
- };
-
- ps_apcie_st: power-controller@418 {
- compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
- reg = <0x418>;
- #power-domain-cells = <0>;
- #reset-cells = <0>;
- apple,domain-name = "apcie_st";
- power-domains = <&ps_apcie>;
- };
+ #size-cells = <1>;
+ reg = <0x2 0x3b700000 0 0x14000>;
};
pinctrl_ap: pinctrl@23c100000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3c100000 0x0 0x100000>;
+ power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_ap 0 0 212>;
+ apple,npins = <212>;
interrupt-controller;
+ #interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
@@ -278,18 +256,55 @@
<AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
- i2c0_pins: i2c0_pins {
- pinmux = <APPLE_PINMUX(188, 1)>,
- <APPLE_PINMUX(192, 1)>;
+ i2c0_pins: i2c0-pins {
+ pinmux = <APPLE_PINMUX(192, 1)>,
+ <APPLE_PINMUX(188, 1)>;
+ };
+
+ i2c1_pins: i2c1-pins {
+ pinmux = <APPLE_PINMUX(201, 1)>,
+ <APPLE_PINMUX(199, 1)>;
+ };
+
+ i2c2_pins: i2c2-pins {
+ pinmux = <APPLE_PINMUX(163, 1)>,
+ <APPLE_PINMUX(162, 1)>;
+ };
+
+ i2c3_pins: i2c3-pins {
+ pinmux = <APPLE_PINMUX(73, 1)>,
+ <APPLE_PINMUX(72, 1)>;
+ };
+
+ i2c4_pins: i2c4-pins {
+ pinmux = <APPLE_PINMUX(135, 1)>,
+ <APPLE_PINMUX(134, 1)>;
};
pcie_pins: pcie-pins {
pinmux = <APPLE_PINMUX(150, 1)>,
- <APPLE_PINMUX(151, 1)>,
+ <APPLE_PINMUX(151, 1)>,
<APPLE_PINMUX(32, 1)>;
};
};
+ spmi: spmi@23d0d9300 {
+ compatible = "apple,t8103-spmi", "apple,spmi";
+ reg = <0x2 0x3d0d9300 0x0 0x100>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ pmgr_mini: power-management@23d280000 {
+ compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x2 0x3d280000 0 0x4000>;
+ };
+
pinctrl_aop: pinctrl@24a820000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x4a820000 0x0 0x4000>;
@@ -297,8 +312,10 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_aop 0 0 42>;
+ apple,npins = <42>;
interrupt-controller;
+ #interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
@@ -312,12 +329,15 @@
pinctrl_nub: pinctrl@23d1f0000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3d1f0000 0x0 0x4000>;
+ power-domains = <&ps_nub_gpio>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_nub 0 0 23>;
+ apple,npins = <23>;
interrupt-controller;
+ #interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
@@ -343,8 +363,10 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_smc 0 0 16>;
+ apple,npins = <16>;
interrupt-controller;
+ #interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
@@ -355,100 +377,124 @@
<AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
};
- i2c0: i2c@20a110000 {
- compatible = "apple,i2c-v0";
- reg = <0x2 0x35010000 0x0 0x4000>;
+ smc_mbox: mbox@23e408000 {
+ compatible = "apple,t8103-asc-mailbox";
+ reg = <0x2 0x3e408000 0x0 0x4000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clkref>;
- pinctrl-0 = <&i2c0_pins>;
- pinctrl-names = "default";
- #address-cells = <0x1>;
- #size-cells = <0x0>;
+ interrupts = <AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 401 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 402 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 403 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "send-empty", "send-not-empty",
+ "recv-empty", "recv-not-empty";
+ #mbox-cells = <0>;
+ };
- hpm0: hpm@38 {
- compatible = "ti,tps6598x";
- reg = <0x38>;
- };
+ smc: smc@23e050000 {
+ compatible = "apple,smc-m1";
+ reg = <0x2 0x3e050000 0x0 0x4000>,
+ <0x2 0x3e400000 0x0 0x4000>;
+ reg-names = "smc", "coproc";
+ mboxes = <&smc_mbox>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-13 = <0x00800000>;
+ };
- hpm1: hpm@3f {
- compatible = "ti,tps6598x";
- reg = <0x3f>;
- };
- };
+ dwc3_0_dart_0: iommu@382f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f00000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc0_usb>;
+ };
- ans_mbox: mbox@277400000 {
- compatible = "apple,iop-mailbox-m1";
- reg = <0x2 0x77400000 0x0 0x20000>;
+ dwc3_0_dart_1: iommu@382f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
- <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&ps_ans2>;
- #mbox-cells = <1>;
- endpoints = <32>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ power-domains = <&ps_atc0_usb>;
};
- ans@27bcc0000 {
- compatible = "apple,nvme-m1";
- reg = <0x2 0x7bcc0000 0x0 0x40000>,
- <0x2 0x7bc50000 0x0 0x4000>;
+ dwc3_0: usb@382280000 {
+ compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
+ reg = <0x3 0x82280000 0x0 0x100000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&ps_apcie_st>;
- mboxes = <&ans_mbox 32>;
+ interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
+ usb-role-switch;
+ role-switch-default-mode = "host";
+ iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
+ power-domains = <&ps_atc0_usb>;
};
- pcie0_dart_0: iommu@681008000 {
- compatible = "apple,t8103-dart", "apple,dart-m1";
- reg = <0x6 0x81008000 0x0 0x4000>;
+ dwc3_1_dart_0: iommu@502f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f00000 0x0 0x4000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
- status = "disabled";
+ power-domains = <&ps_atc1_usb>;
};
- pcie0_dart_1: iommu@682008000 {
- compatible = "apple,t8103-dart", "apple,dart-m1";
- reg = <0x6 0x82008000 0x0 0x4000>;
+ dwc3_1_dart_1: iommu@502f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f80000 0x0 0x4000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
- status = "disabled";
+ power-domains = <&ps_atc1_usb>;
};
- pcie0_dart_2: iommu@683008000 {
- compatible = "apple,t8103-dart", "apple,dart-m1";
- reg = <0x6 0x83008000 0x0 0x4000>;
+ dwc3_1: usb@b02280000 {
+ compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
+ reg = <0x5 0x02280000 0x0 0x100000>;
interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
+ usb-role-switch;
+ role-switch-default-mode = "host";
+ iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
+ power-domains = <&ps_atc1_usb>;
+ };
+
+ pcie0_dart_0: dart@681008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x81008000 0x0 0x4000>;
#iommu-cells = <1>;
- status = "disabled";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
};
- smc_mbox: mbox@23e400000 {
- compatible = "apple,iop-mailbox-m1";
- reg = <0x2 0x3e400000 0x0 0x20000>;
- #mbox-cells = <1>;
- endpoints = <32>;
+ pcie0_dart_1: dart@682008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x82008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
};
- smc: smc@23e050000 {
- compatible = "apple,smc-m1";
- reg = <0x2 0x3e050000 0x0 0x4000>;
- mboxes = <&smc_mbox 32>;
- gpio-controller;
- #gpio-cells = <2>;
- gpio-13 = <0x00800000>;
+ pcie0_dart_2: dart@683008000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x6 0x83008000 0x0 0x4000>;
+ #iommu-cells = <1>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_gp>;
};
pcie0: pcie@690000000 {
compatible = "apple,t8103-pcie", "apple,pcie";
+ device_type = "pci";
reg = <0x6 0x90000000 0x0 0x1000000>,
- <0x6 0x80000000 0x0 0x4000>,
- <0x6 0x81000000 0x0 0x8000>,
- <0x6 0x82000000 0x0 0x8000>,
- <0x6 0x83000000 0x0 0x8000>;
+ <0x6 0x80000000 0x0 0x100000>,
+ <0x6 0x81000000 0x0 0x4000>,
+ <0x6 0x82000000 0x0 0x4000>,
+ <0x6 0x83000000 0x0 0x4000>;
reg-names = "config", "rc", "port0", "port1", "port2";
interrupt-parent = <&aic>;
@@ -460,6 +506,7 @@
msi-parent = <&pcie0>;
msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
+
iommu-map = <0x100 &pcie0_dart_0 1 1>,
<0x200 &pcie0_dart_1 1 1>,
<0x300 &pcie0_dart_2 1 1>;
@@ -468,96 +515,104 @@
bus-range = <0 3>;
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000
- 0x0 0x20000000>,
- <0x02000000 0x0 0xc0000000 0x6 0xc0000000
- 0x0 0x40000000>;
+ ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
+ <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
- power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
+ power-domains = <&ps_apcie_gp>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
- device_type = "pci";
- status = "disabled";
- };
+ port00: pci@0,0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
+ max-link-speed = <2>;
- dwc3_0_dart_0: iommu@382f00000 {
- compatible = "apple,t8103-dart";
- reg = <0x3 0x82f00000 0x0 0x4000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- dwc3_0_dart_1: iommu@382f80000 {
- compatible = "apple,t8103-dart";
- reg = <0x3 0x82f80000 0x0 0x4000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ interrupt-controller;
+ #interrupt-cells = <1>;
- dwc3_0: usb@382280000{
- compatible = "snps,dwc3";
- reg = <0x3 0x82280000 0x0 0x100000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
- status = "disabled";
- };
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
+ <0 0 0 2 &port00 0 0 0 1>,
+ <0 0 0 3 &port00 0 0 0 2>,
+ <0 0 0 4 &port00 0 0 0 3>;
+ };
- dwc3_1_dart_0: iommu@502f00000 {
- compatible = "apple,t8103-dart";
- reg = <0x5 0x02f00000 0x0 0x4000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ port01: pci@1,0 {
+ device_type = "pci";
+ reg = <0x800 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
+ max-link-speed = <2>;
- dwc3_1_dart_1: iommu@502f80000 {
- compatible = "apple,t8103-dart";
- reg = <0x5 0x02f80000 0x0 0x4000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
- };
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- dwc3_1: usb@502280000{
- compatible = "snps,dwc3";
- reg = <0x5 0x02280000 0x0 0x100000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
- status = "disabled";
- };
+ interrupt-controller;
+ #interrupt-cells = <1>;
- spi@23510c000 {
- compatible = "apple,t8103-spi", "apple,spi";
- reg = <0x2 0x3510c000 0x0 0x4000>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
- cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_HIGH>;
- };
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
+ <0 0 0 2 &port01 0 0 0 1>,
+ <0 0 0 3 &port01 0 0 0 2>,
+ <0 0 0 4 &port01 0 0 0 3>;
+ };
- spmi@23d0d8000 {
- compatible = "apple,t8103-spmi", "apple,spmi";
- reg = <0x2 0x3d0d9300 0x0 0x100>;
- interrupt-parent = <&aic>;
- interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
+ port02: pci@2,0 {
+ device_type = "pci";
+ reg = <0x1000 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
+ max-link-speed = <1>;
- #address-cells = <2>;
- #size-cells = <0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
- pmu@f {
- compatible = "apple,sera-pmu";
- reg = <0xf SPMI_USID>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
+ <0 0 0 2 &port02 0 0 0 1>,
+ <0 0 0 3 &port02 0 0 0 2>,
+ <0 0 0 4 &port02 0 0 0 3>;
};
};
+ ans: mbox@277408000 {
+ compatible = "apple,t8103-asc-mailbox";
+ reg = <0x2 0x77408000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "send-empty", "send-not-empty",
+ "recv-empty", "recv-not-empty";
+ #mbox-cells = <0>;
+ power-domains = <&ps_ans2>;
+ };
+
+ sart: sart@27bc50000 {
+ compatible = "apple,t8103-sart";
+ reg = <0x2 0x7bc50000 0x0 0x10000>;
+ power-domains = <&ps_ans2>;
+ };
+
+ ans2: nvme@27bcc0000 {
+ compatible = "apple,t8103-ans-nvme", "apple,nvme-m1";
+ reg = <0x2 0x7bcc0000 0x0 0x40000>, <0x2 0x77400000 0x0 0x4000>;
+ reg-names = "nvme", "coproc";
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
+ mboxes = <&ans>;
+ apple,sart = <&sart>;
+ power-domains = <&ps_ans2>;
+ };
};
};
+
+#include "t8103-pmgr.dtsi"
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties
2021-12-23 21:34 [PATCH v2 0/3] Apple M1 power management controller support Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
@ 2021-12-23 21:34 ` Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot, dm-pre-reloc properties Simon Glass
2021-12-23 21:34 ` [PATCH v2 3/3] power: domain: Add Apple pmgr driver Mark Kettenis
2 siblings, 2 replies; 14+ messages in thread
From: Mark Kettenis @ 2021-12-23 21:34 UTC (permalink / raw)
To: u-boot; +Cc: sjg, jh80.chung, Mark Kettenis
These are necessary to make sure the power domains needed for the
serial console are availble in the pre-relocation phase.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
arch/arm/dts/t8103-j274-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j293-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j313-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j456-u-boot.dtsi | 1 +
arch/arm/dts/t8103-j457-u-boot.dtsi | 1 +
arch/arm/dts/t8103-u-boot.dtsi | 25 +++++++++++++++++++++++++
6 files changed, 30 insertions(+)
create mode 100644 arch/arm/dts/t8103-j274-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j293-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j313-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j456-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-j457-u-boot.dtsi
create mode 100644 arch/arm/dts/t8103-u-boot.dtsi
diff --git a/arch/arm/dts/t8103-j274-u-boot.dtsi b/arch/arm/dts/t8103-j274-u-boot.dtsi
new file mode 100644
index 0000000000..6c8dd5a56f
--- /dev/null
+++ b/arch/arm/dts/t8103-j274-u-boot.dtsi
@@ -0,0 +1 @@
+#include "t8103-u-boot.dtsi"
diff --git a/arch/arm/dts/t8103-j293-u-boot.dtsi b/arch/arm/dts/t8103-j293-u-boot.dtsi
new file mode 100644
index 0000000000..6c8dd5a56f
--- /dev/null
+++ b/arch/arm/dts/t8103-j293-u-boot.dtsi
@@ -0,0 +1 @@
+#include "t8103-u-boot.dtsi"
diff --git a/arch/arm/dts/t8103-j313-u-boot.dtsi b/arch/arm/dts/t8103-j313-u-boot.dtsi
new file mode 100644
index 0000000000..6c8dd5a56f
--- /dev/null
+++ b/arch/arm/dts/t8103-j313-u-boot.dtsi
@@ -0,0 +1 @@
+#include "t8103-u-boot.dtsi"
diff --git a/arch/arm/dts/t8103-j456-u-boot.dtsi b/arch/arm/dts/t8103-j456-u-boot.dtsi
new file mode 100644
index 0000000000..6c8dd5a56f
--- /dev/null
+++ b/arch/arm/dts/t8103-j456-u-boot.dtsi
@@ -0,0 +1 @@
+#include "t8103-u-boot.dtsi"
diff --git a/arch/arm/dts/t8103-j457-u-boot.dtsi b/arch/arm/dts/t8103-j457-u-boot.dtsi
new file mode 100644
index 0000000000..6c8dd5a56f
--- /dev/null
+++ b/arch/arm/dts/t8103-j457-u-boot.dtsi
@@ -0,0 +1 @@
+#include "t8103-u-boot.dtsi"
diff --git a/arch/arm/dts/t8103-u-boot.dtsi b/arch/arm/dts/t8103-u-boot.dtsi
new file mode 100644
index 0000000000..43f552979d
--- /dev/null
+++ b/arch/arm/dts/t8103-u-boot.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+
+&serial0 {
+ u-boot,dm-pre-reloc;
+};
+
+&pmgr {
+ u-boot,dm-pre-reloc;
+};
+
+&ps_sio_busif {
+ u-boot,dm-pre-reloc;
+};
+
+&ps_sio {
+ u-boot,dm-pre-reloc;
+};
+
+&ps_uart_p {
+ u-boot,dm-pre-reloc;
+};
+
+&ps_uart0 {
+ u-boot,dm-pre-reloc;
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-23 21:34 [PATCH v2 0/3] Apple M1 power management controller support Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties Mark Kettenis
@ 2021-12-23 21:34 ` Mark Kettenis
2021-12-27 12:21 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
2 siblings, 2 replies; 14+ messages in thread
From: Mark Kettenis @ 2021-12-23 21:34 UTC (permalink / raw)
To: u-boot; +Cc: sjg, jh80.chung, Mark Kettenis
This driver supports power domains for the power management
controller found on Apple SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
---
arch/arm/Kconfig | 3 +
drivers/power/domain/Kconfig | 8 +++
drivers/power/domain/Makefile | 1 +
drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
4 files changed, 125 insertions(+)
create mode 100644 drivers/power/domain/apple-pmgr.c
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 59e031de04..40d3f66acb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -938,6 +938,9 @@ config ARCH_APPLE
select OF_BOARD
select PINCTRL
select POSITION_INDEPENDENT
+ select POWER_DOMAIN
+ select REGMAP
+ select SYSCON
select SYSRESET
select SYSRESET_WATCHDOG
select SYSRESET_WATCHDOG_AUTO
diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
index 99b3f9ae71..6ef7a3b3a7 100644
--- a/drivers/power/domain/Kconfig
+++ b/drivers/power/domain/Kconfig
@@ -9,6 +9,14 @@ config POWER_DOMAIN
domains). This may be used to save power. This API provides the
means to control such power management hardware.
+config APPLE_PMGR_POWER_DOMAIN
+ bool "Enable the Apple PMGR power domain driver"
+ depends on POWER_DOMAIN
+ default y if ARCH_APPLE
+ help
+ Enable support for manipulating the Apple M1 power domains via
+ MMIO mapped registers.
+
config BCM6328_POWER_DOMAIN
bool "Enable the BCM6328 power domain driver"
depends on POWER_DOMAIN && ARCH_BMIPS
diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
index 3d1e5f073c..530ae35671 100644
--- a/drivers/power/domain/Makefile
+++ b/drivers/power/domain/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
+obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
new file mode 100644
index 0000000000..08a30c8ebf
--- /dev/null
+++ b/drivers/power/domain/apple-pmgr.c
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <dm.h>
+#include <linux/err.h>
+#include <linux/bitfield.h>
+#include <power-domain-uclass.h>
+#include <regmap.h>
+#include <syscon.h>
+
+#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
+#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
+
+#define APPLE_PMGR_PS_ACTIVE 0xf
+#define APPLE_PMGR_PS_PWRGATE 0x0
+
+#define APPLE_PMGR_PS_SET_TIMEOUT 100
+
+struct apple_pmgr_priv {
+ struct regmap *regmap;
+ u32 offset;
+};
+
+static int apple_pmgr_request(struct power_domain *power_domain)
+{
+ return 0;
+}
+
+static int apple_pmgr_rfree(struct power_domain *power_domain)
+{
+ return 0;
+}
+
+static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
+{
+ struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
+ uint reg;
+
+ regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
+ FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
+
+ return regmap_read_poll_timeout(
+ priv->regmap, priv->offset, reg,
+ (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
+ APPLE_PMGR_PS_SET_TIMEOUT);
+}
+
+static int apple_pmgr_on(struct power_domain *power_domain)
+{
+ return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
+}
+
+static int apple_pmgr_off(struct power_domain *power_domain)
+{
+ return 0;
+}
+
+static int apple_pmgr_of_xlate(struct power_domain *power_domain,
+ struct ofnode_phandle_args *args)
+{
+ if (args->args_count != 0) {
+ debug("Invalid args_count: %d\n", args->args_count);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct udevice_id apple_pmgr_ids[] = {
+ { .compatible = "apple,pmgr-pwrstate" },
+ { /* sentinel */ }
+};
+
+static int apple_pmgr_probe(struct udevice *dev)
+{
+ struct apple_pmgr_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = dev_power_domain_on(dev);
+ if (ret)
+ return ret;
+
+ priv->regmap = syscon_get_regmap(dev->parent);
+ if (IS_ERR(priv->regmap))
+ return PTR_ERR(priv->regmap);
+
+ ret = dev_read_u32(dev, "reg", &priv->offset);
+ if (ret < 0)
+ return ret;
+
+ return 0;
+}
+
+struct power_domain_ops apple_pmgr_ops = {
+ .request = apple_pmgr_request,
+ .rfree = apple_pmgr_rfree,
+ .on = apple_pmgr_on,
+ .off = apple_pmgr_off,
+ .of_xlate = apple_pmgr_of_xlate,
+};
+
+U_BOOT_DRIVER(apple_pmgr) = {
+ .name = "apple_pmgr",
+ .id = UCLASS_POWER_DOMAIN,
+ .of_match = apple_pmgr_ids,
+ .ops = &apple_pmgr_ops,
+ .probe = apple_pmgr_probe,
+ .priv_auto = sizeof(struct apple_pmgr_priv),
+};
--
2.34.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
@ 2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
1 sibling, 0 replies; 14+ messages in thread
From: Jaehoon Chung @ 2021-12-27 12:20 UTC (permalink / raw)
To: Mark Kettenis, u-boot; +Cc: sjg, jh80.chung
On 12/24/21 6:34 AM, Mark Kettenis wrote:
> This synchronizes the device trees with those that are in the
> process of being upstreamed into Linux 5.16 or proposed for
> Linux 5.17. This includes device trees for machines that were
> still missing.
>
> There are still some differences that will hopefully be resolved
> soon.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Best Regards,
Jaehoon Chung
> ---
> arch/arm/dts/Makefile | 5 +-
> arch/arm/dts/t8103-j274.dts | 122 +---
> arch/arm/dts/t8103-j293.dts | 92 +--
> arch/arm/dts/t8103-j313.dts | 57 ++
> arch/arm/dts/t8103-j456.dts | 71 +++
> arch/arm/dts/t8103-j457.dts | 59 ++
> arch/arm/dts/t8103-jxxx.dtsi | 140 +++++
> arch/arm/dts/t8103-pmgr.dtsi | 1136 ++++++++++++++++++++++++++++++++++
> arch/arm/dts/t8103.dtsi | 585 +++++++++--------
> 9 files changed, 1839 insertions(+), 428 deletions(-)
> create mode 100644 arch/arm/dts/t8103-j313.dts
> create mode 100644 arch/arm/dts/t8103-j456.dts
> create mode 100644 arch/arm/dts/t8103-j457.dts
> create mode 100644 arch/arm/dts/t8103-jxxx.dtsi
> create mode 100644 arch/arm/dts/t8103-pmgr.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 7f622fedbd..35872e1574 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -34,7 +34,10 @@ dtb-$(CONFIG_TARGET_A7Y17LTE) += exynos78x0-axy17lte.dtb
>
> dtb-$(CONFIG_ARCH_APPLE) += \
> t8103-j274.dtb \
> - t8103-j293.dtb
> + t8103-j293.dtb \
> + t8103-j313.dtb \
> + t8103-j456.dtb \
> + t8103-j457.dtb
>
> dtb-$(CONFIG_ARCH_DAVINCI) += \
> da850-evm.dtb \
> diff --git a/arch/arm/dts/t8103-j274.dts b/arch/arm/dts/t8103-j274.dts
> index aef1ae29b6..2144768147 100644
> --- a/arch/arm/dts/t8103-j274.dts
> +++ b/arch/arm/dts/t8103-j274.dts
> @@ -10,126 +10,48 @@
> /dts-v1/;
>
> #include "t8103.dtsi"
> +#include "t8103-jxxx.dtsi"
>
> / {
> compatible = "apple,j274", "apple,t8103", "apple,arm-platform";
> model = "Apple Mac mini (M1, 2020)";
>
> aliases {
> - serial0 = &serial0;
> - ethernet0 = ð0;
> - wifi0 = &wifi0;
> - };
> -
> - chosen {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - stdout-path = "serial0";
> -
> - framebuffer0: framebuffer@0 {
> - compatible = "apple,simple-framebuffer", "simple-framebuffer";
> - reg = <0 0 0 0>; /* To be filled by loader */
> - /* Format properties will be added by loader */
> - status = "disabled";
> - };
> - };
> -
> - memory@800000000 {
> - device_type = "memory";
> - reg = <0x8 0 0x2 0>; /* To be filled by loader */
> + ethernet0 = ðernet0;
> };
> };
>
> -&serial0 {
> - status = "okay";
> -};
> -
> -&pcie0_dart_0 {
> - status = "okay";
> -};
> +/*
> + * Provide labels for the USB type C ports.
> + */
>
> -&pcie0_dart_1 {
> - status = "okay";
> +&typec0 {
> + label = "USB-C Back-left";
> };
>
> -&pcie0_dart_2 {
> - status = "okay";
> +&typec1 {
> + label = "USB-C Back-right";
> };
>
> -&pcie0 {
> - status = "okay";
> -
> - pci0: pci@0,0 {
> - device_type = "pci";
> - reg = <0x0 0x0 0x0 0x0 0x0>;
> - pwren-gpios = <&smc 13 0>;
> - reset-gpios = <&pinctrl_ap 152 0>;
> - max-link-speed = <2>;
> -
> - #address-cells = <3>;
> - #size-cells = <2>;
> - ranges;
> - };
> -
> - pci1: pci@1,0 {
> - device_type = "pci";
> - reg = <0x800 0x0 0x0 0x0 0x0>;
> - reset-gpios = <&pinctrl_ap 153 0>;
> - max-link-speed = <2>;
> -
> - #address-cells = <3>;
> - #size-cells = <2>;
> - ranges;
> - };
> -
> - pci2: pci@2,0 {
> - device_type = "pci";
> - reg = <0x1000 0x0 0x0 0x0 0x0>;
> - reset-gpios = <&pinctrl_ap 33 0>;
> - max-link-speed = <1>;
> +/*
> + * Force the bus number assignments so that we can declare some of the
> + * on-board devices and properties that are populated by the bootloader
> + * (such as MAC addresses).
> + */
>
> - #address-cells = <3>;
> - #size-cells = <2>;
> - ranges;
> - };
> +&port01 {
> + bus-range = <2 2>;
> };
>
> -&pci0 {
> - wifi0: network@0,0 {
> - reg = <0x10000 0x0 0x0 0x0 0x0>;
> - local-mac-address = [00 00 00 00 00 00];
> - };
> -};
> -
> -&pci2 {
> - eth0: ethernet@0,0 {
> +&port02 {
> + bus-range = <3 3>;
> + ethernet0: ethernet@0,0 {
> reg = <0x30000 0x0 0x0 0x0 0x0>;
> - local-mac-address = [00 00 00 00 00 00];
> + /* To be filled by the loader */
> + local-mac-address = [00 10 18 00 00 00];
> };
> };
>
> -&dwc3_0_dart_0 {
> - status = "okay";
> -};
> -
> -&dwc3_0_dart_1 {
> - status = "okay";
> -};
> -
> -&dwc3_0 {
> - status = "okay";
> -};
> -
> -&dwc3_1_dart_0 {
> - status = "okay";
> -};
> -
> -&dwc3_1_dart_1 {
> - status = "okay";
> -};
> -
> -&dwc3_1 {
> +&i2c2 {
> status = "okay";
> };
> diff --git a/arch/arm/dts/t8103-j293.dts b/arch/arm/dts/t8103-j293.dts
> index 4a22596cf4..cf92ee53e0 100644
> --- a/arch/arm/dts/t8103-j293.dts
> +++ b/arch/arm/dts/t8103-j293.dts
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+ OR MIT
> /*
> - * Apple Macbook Pro (M1, 2020)
> + * Apple MacBook Pro (13-inch, M1, 2020)
> *
> * target-type: J293
> *
> @@ -10,88 +10,56 @@
> /dts-v1/;
>
> #include "t8103.dtsi"
> +#include "t8103-jxxx.dtsi"
>
> / {
> compatible = "apple,j293", "apple,t8103", "apple,arm-platform";
> - model = "Apple Macbook Pro (M1, 2020)";
> -
> - aliases {
> - serial0 = &serial0;
> - wifi0 = &wifi0;
> - };
> -
> - chosen {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - stdout-path = "serial0";
> -
> - framebuffer0: framebuffer@0 {
> - compatible = "apple,simple-framebuffer", "simple-framebuffer";
> - reg = <0 0 0 0>; /* To be filled by loader */
> - /* Format properties will be added by loader */
> - status = "disabled";
> - };
> - };
> -
> - memory@800000000 {
> - device_type = "memory";
> - reg = <0x8 0 0x2 0>; /* To be filled by loader */
> - };
> + model = "Apple MacBook Pro (13-inch, M1, 2020)";
> };
>
> -&serial0 {
> - status = "okay";
> -};
> +/*
> + * Provide labels for the USB type C ports.
> + */
>
> -&pcie0_dart_0 {
> - status = "okay";
> +&typec0 {
> + label = "USB-C Left-back";
> };
>
> -&pcie0 {
> - status = "okay";
> -
> - pci0: pci@0,0 {
> - device_type = "pci";
> - reg = <0x0 0x0 0x0 0x0 0x0>;
> - pwren-gpios = <&smc 13 0>;
> - reset-gpios = <&pinctrl_ap 152 0>;
> - max-link-speed = <2>;
> -
> - #address-cells = <3>;
> - #size-cells = <2>;
> - ranges;
> - };
> +&typec1 {
> + label = "USB-C Left-front";
> };
>
> -&pci0 {
> - wifi0: network@0,0 {
> - reg = <0x10000 0x0 0x0 0x0 0x0>;
> - local-mac-address = [00 00 00 00 00 00];
> - };
> -};
> +/*
> + * Remove unused PCIe ports and disable the associated DARTs.
> + */
>
> -&dwc3_0_dart_0 {
> - status = "okay";
> +&pcie0_dart_1 {
> + status = "disabled";
> };
>
> -&dwc3_0_dart_1 {
> - status = "okay";
> +&pcie0_dart_2 {
> + status = "disabled";
> };
>
> -&dwc3_0 {
> - status = "okay";
> -};
> +/delete-node/ &port01;
> +/delete-node/ &port02;
>
> -&dwc3_1_dart_0 {
> +&i2c2 {
> status = "okay";
> };
>
> -&dwc3_1_dart_1 {
> +&i2c4 {
> status = "okay";
> };
>
> -&dwc3_1 {
> +&spi3 {
> status = "okay";
> +
> + keyboard@0 {
> + compatible = "apple,keyboard";
> + spi-max-frequency = <2000000>;
> + reg = <0>;
> + interrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;
> + spien-gpios = <&pinctrl_ap 195 GPIO_ACTIVE_HIGH>;
> + };
> };
> diff --git a/arch/arm/dts/t8103-j313.dts b/arch/arm/dts/t8103-j313.dts
> new file mode 100644
> index 0000000000..c8574d81c8
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j313.dts
> @@ -0,0 +1,57 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple MacBook Air (M1, 2020)
> + *
> + * target-type: J313
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +/dts-v1/;
> +
> +#include "t8103.dtsi"
> +#include "t8103-jxxx.dtsi"
> +
> +/ {
> + compatible = "apple,j313", "apple,t8103", "apple,arm-platform";
> + model = "Apple MacBook Air (M1, 2020)";
> +};
> +
> +/*
> + * Provide labels for the USB type C ports.
> + */
> +
> +&typec0 {
> + label = "USB-C Left-back";
> +};
> +
> +&typec1 {
> + label = "USB-C Left-front";
> +};
> +
> +/*
> + * Remove unused PCIe ports and disable the associated DARTs.
> + */
> +
> +&pcie0_dart_1 {
> + status = "disabled";
> +};
> +
> +&pcie0_dart_2 {
> + status = "disabled";
> +};
> +
> +/delete-node/ &port01;
> +/delete-node/ &port02;
> +
> +&spi3 {
> + status = "okay";
> +
> + keyboard@0 {
> + compatible = "apple,keyboard";
> + spi-max-frequency = <2000000>;
> + reg = <0>;
> + interrupts-extended = <&pinctrl_nub 13 IRQ_TYPE_LEVEL_LOW>;
> + spien-gpios = <&pinctrl_ap 195 GPIO_ACTIVE_HIGH>;
> + };
> +};
> diff --git a/arch/arm/dts/t8103-j456.dts b/arch/arm/dts/t8103-j456.dts
> new file mode 100644
> index 0000000000..9814c97cd9
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j456.dts
> @@ -0,0 +1,71 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple iMac (24-inch, 4x USB-C, M1, 2020)
> + *
> + * target-type: J456
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +/dts-v1/;
> +
> +#include "t8103.dtsi"
> +#include "t8103-jxxx.dtsi"
> +
> +/ {
> + compatible = "apple,j456", "apple,t8103", "apple,arm-platform";
> + model = "Apple iMac (24-inch, 4x USB-C, M1, 2020)";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + };
> +};
> +
> +&i2c0 {
> + hpm2: usb-pd@3b {
> + compatible = "apple,cd321x";
> + reg = <0x3b>;
> + interrupt-parent = <&pinctrl_ap>;
> + interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "irq";
> + };
> +
> + hpm3: usb-pd@3c {
> + compatible = "apple,cd321x";
> + reg = <0x3c>;
> + interrupt-parent = <&pinctrl_ap>;
> + interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "irq";
> + };
> +};
> +
> +/*
> + * Provide labels for the USB type C ports.
> + */
> +
> +&typec0 {
> + label = "USB-C Back-right";
> +};
> +
> +&typec1 {
> + label = "USB-C Back-right-middle";
> +};
> +
> +/*
> + * Force the bus number assignments so that we can declare some of the
> + * on-board devices and properties that are populated by the bootloader
> + * (such as MAC addresses).
> + */
> +
> +&port01 {
> + bus-range = <2 2>;
> +};
> +
> +&port02 {
> + bus-range = <3 3>;
> + ethernet0: ethernet@0,0 {
> + reg = <0x30000 0x0 0x0 0x0 0x0>;
> + /* To be filled by the loader */
> + local-mac-address = [00 10 18 00 00 00];
> + };
> +};
> diff --git a/arch/arm/dts/t8103-j457.dts b/arch/arm/dts/t8103-j457.dts
> new file mode 100644
> index 0000000000..0f4cc64374
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j457.dts
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple iMac (24-inch, 2x USB-C, M1, 2020)
> + *
> + * target-type: J457
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +/dts-v1/;
> +
> +#include "t8103.dtsi"
> +#include "t8103-jxxx.dtsi"
> +
> +/ {
> + compatible = "apple,j457", "apple,t8103", "apple,arm-platform";
> + model = "Apple iMac (24-inch, 2x USB-C, M1, 2020)";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + };
> +};
> +
> +/*
> + * Provide labels for the USB type C ports.
> + */
> +
> +&typec0 {
> + label = "USB-C Back-right";
> +};
> +
> +&typec1 {
> + label = "USB-C Back-left";
> +};
> +
> +/*
> + * Force the bus number assignments so that we can declare some of the
> + * on-board devices and properties that are populated by the bootloader
> + * (such as MAC addresses).
> + */
> +
> +&port02 {
> + bus-range = <3 3>;
> + ethernet0: ethernet@0,0 {
> + reg = <0x30000 0x0 0x0 0x0 0x0>;
> + /* To be filled by the loader */
> + local-mac-address = [00 10 18 00 00 00];
> + };
> +};
> +
> +/*
> + * Remove unused PCIe port and disable the associated DART.
> + */
> +
> +&pcie0_dart_1 {
> + status = "disabled";
> +};
> +
> +/delete-node/ &port01;
> diff --git a/arch/arm/dts/t8103-jxxx.dtsi b/arch/arm/dts/t8103-jxxx.dtsi
> new file mode 100644
> index 0000000000..8478090b34
> --- /dev/null
> +++ b/arch/arm/dts/t8103-jxxx.dtsi
> @@ -0,0 +1,140 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * Apple M1 Mac mini, MacBook Air/Pro, iMac 24" (M1, 2020/2021)
> + *
> + * This file contains parts common to all Apple M1 devices using the t8103.
> + *
> + * target-type: J274, J293, J313, J456, J457
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +#include <dt-bindings/spmi/spmi.h>
> +
> +/ {
> + aliases {
> + serial0 = &serial0;
> + serial2 = &serial2;
> + wifi0 = &wifi0;
> + };
> +
> + chosen {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + stdout-path = "serial0";
> +
> + framebuffer0: framebuffer@0 {
> + compatible = "apple,simple-framebuffer", "simple-framebuffer";
> + reg = <0 0 0 0>; /* To be filled by loader */
> + /* Format properties will be added by loader */
> + status = "disabled";
> + };
> + };
> +
> + memory@800000000 {
> + device_type = "memory";
> + reg = <0x8 0 0x2 0>; /* To be filled by loader */
> + };
> +};
> +
> +&serial0 {
> + status = "okay";
> +};
> +
> +&serial2 {
> + status = "okay";
> +};
> +
> +&i2c0 {
> + hpm0: usb-pd@38 {
> + compatible = "apple,cd321x";
> + reg = <0x38>;
> + interrupt-parent = <&pinctrl_ap>;
> + interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "irq";
> +
> + typec0: connector {
> + compatible = "usb-c-connector";
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + typec0_con_hs: endpoint {
> + remote-endpoint = <&typec0_usb_hs>;
> + };
> + };
> + };
> + };
> + };
> +
> + hpm1: usb-pd@3f {
> + compatible = "apple,cd321x";
> + reg = <0x3f>;
> + interrupt-parent = <&pinctrl_ap>;
> + interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "irq";
> +
> + typec1: connector {
> + compatible = "usb-c-connector";
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + typec1_con_hs: endpoint {
> + remote-endpoint = <&typec1_usb_hs>;
> + };
> + };
> + };
> + };
> + };
> +};
> +
> +/* USB controllers */
> +&dwc3_0 {
> + port {
> + typec0_usb_hs: endpoint {
> + remote-endpoint = <&typec0_con_hs>;
> + };
> + };
> +};
> +
> +&dwc3_1 {
> + port {
> + typec1_usb_hs: endpoint {
> + remote-endpoint = <&typec1_con_hs>;
> + };
> + };
> +};
> +
> +/*
> + * Force the bus number assignments so that we can declare some of the
> + * on-board devices and properties that are populated by the bootloader
> + * (such as MAC addresses).
> + */
> +&port00 {
> + bus-range = <1 1>;
> + pwren-gpios = <&smc 13 0>;
> + wifi0: network@0,0 {
> + reg = <0x10000 0x0 0x0 0x0 0x0>;
> + local-mac-address = [00 00 00 00 00 00];
> + };
> +};
> +
> +&spmi {
> + status = "okay";
> +
> + pmu@f {
> + compatible = "apple,sera-pmu";
> + reg = <0xf SPMI_USID>;
> + };
> +};
> diff --git a/arch/arm/dts/t8103-pmgr.dtsi b/arch/arm/dts/t8103-pmgr.dtsi
> new file mode 100644
> index 0000000000..1310be74df
> --- /dev/null
> +++ b/arch/arm/dts/t8103-pmgr.dtsi
> @@ -0,0 +1,1136 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +/*
> + * PMGR Power domains for the Apple T8103 "M1" SoC
> + *
> + * Copyright The Asahi Linux Contributors
> + */
> +
> +
> +&pmgr {
> + ps_sbr: power-controller@100 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x100 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sbr";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_aic: power-controller@108 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x108 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "aic";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_dwi: power-controller@110 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x110 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dwi";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_soc_spmi0: power-controller@118 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x118 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "soc_spmi0";
> + };
> +
> + ps_soc_spmi1: power-controller@120 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x120 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "soc_spmi1";
> + };
> +
> + ps_soc_spmi2: power-controller@128 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x128 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "soc_spmi2";
> + };
> +
> + ps_gpio: power-controller@130 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x130 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "gpio";
> + };
> +
> + ps_pms_busif: power-controller@138 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x138 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_busif";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_pms: power-controller@140 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x140 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_pms_fpwm0: power-controller@148 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x148 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_fpwm0";
> + power-domains = <&ps_pms>;
> + };
> +
> + ps_pms_fpwm1: power-controller@150 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x150 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_fpwm1";
> + power-domains = <&ps_pms>;
> + };
> +
> + ps_pms_fpwm2: power-controller@158 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x158 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_fpwm2";
> + power-domains = <&ps_pms>;
> + };
> +
> + ps_pms_fpwm3: power-controller@160 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x160 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_fpwm3";
> + power-domains = <&ps_pms>;
> + };
> +
> + ps_pms_fpwm4: power-controller@168 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x168 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_fpwm4";
> + power-domains = <&ps_pms>;
> + };
> +
> + ps_soc_dpe: power-controller@170 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x170 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "soc_dpe";
> + apple,always-on; /* Core device */
> + };
> +
> + ps_pmgr_soc_ocla: power-controller@178 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x178 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pmgr_soc_ocla";
> + };
> +
> + ps_ispsens0: power-controller@180 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x180 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ispsens0";
> + };
> +
> + ps_ispsens1: power-controller@188 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x188 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ispsens1";
> + };
> +
> + ps_ispsens2: power-controller@190 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x190 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ispsens2";
> + };
> +
> + ps_ispsens3: power-controller@198 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x198 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ispsens3";
> + };
> +
> + ps_pcie_ref: power-controller@1a0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1a0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pcie_ref";
> + };
> +
> + ps_aft0: power-controller@1a8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1a8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "aft0";
> + };
> +
> + ps_devc0_ivdmc: power-controller@1b0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1b0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "devc0_ivdmc";
> + };
> +
> + ps_imx: power-controller@1b8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1b8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "imx";
> + apple,always-on; /* Apple fabric, critical block */
> + };
> +
> + ps_sio_busif: power-controller@1c0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1c0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sio_busif";
> + };
> +
> + ps_sio: power-controller@1c8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1c8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sio";
> + power-domains = <&ps_sio_busif>;
> + };
> +
> + ps_sio_cpu: power-controller@1d0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1d0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sio_cpu";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_fpwm0: power-controller@1d8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1d8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "fpwm0";
> + };
> +
> + ps_fpwm1: power-controller@1e0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1e0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "fpwm1";
> + };
> +
> + ps_fpwm2: power-controller@1e8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1e8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "fpwm2";
> + };
> +
> + ps_i2c0: power-controller@1f0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1f0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "i2c0";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_i2c1: power-controller@1f8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x1f8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "i2c1";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_i2c2: power-controller@200 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x200 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "i2c2";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_i2c3: power-controller@208 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x208 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "i2c3";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_i2c4: power-controller@210 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x210 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "i2c4";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_spi_p: power-controller@218 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x218 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi_p";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_uart_p: power-controller@220 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x220 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart_p";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_audio_p: power-controller@228 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x228 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "audio_p";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_sio_adma: power-controller@230 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x230 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sio_adma";
> + power-domains = <&ps_sio>, <&ps_pms>;
> + };
> +
> + ps_aes: power-controller@238 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x238 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "aes";
> + power-domains = <&ps_sio>;
> + };
> +
> + ps_spi0: power-controller@240 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x240 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi0";
> + power-domains = <&ps_sio>, <&ps_spi_p>;
> + };
> +
> + ps_spi1: power-controller@248 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x248 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi1";
> + power-domains = <&ps_sio>, <&ps_spi_p>;
> + };
> +
> + ps_spi2: power-controller@250 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x250 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi2";
> + power-domains = <&ps_sio>, <&ps_spi_p>;
> + };
> +
> + ps_spi3: power-controller@258 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x258 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi3";
> + power-domains = <&ps_sio>, <&ps_spi_p>;
> + };
> +
> + ps_uart_n: power-controller@268 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x268 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart_n";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart0: power-controller@270 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x270 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart0";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart1: power-controller@278 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x278 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart1";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart2: power-controller@280 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x280 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart2";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart3: power-controller@288 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x288 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart3";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart4: power-controller@290 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x290 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart4";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart5: power-controller@298 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x298 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart5";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart6: power-controller@2a0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2a0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart6";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart7: power-controller@2a8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2a8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart7";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_uart8: power-controller@2b0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2b0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "uart8";
> + power-domains = <&ps_uart_p>;
> + };
> +
> + ps_mca0: power-controller@2b8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2b8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca0";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_mca1: power-controller@2c0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2c0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca1";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_mca2: power-controller@2c8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2c8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca2";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_mca3: power-controller@2d0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2d0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca3";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_mca4: power-controller@2d8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2d8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca4";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_mca5: power-controller@2e0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2e0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mca5";
> + power-domains = <&ps_audio_p>, <&ps_sio_adma>;
> + };
> +
> + ps_dpa0: power-controller@2e8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2e8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dpa0";
> + power-domains = <&ps_audio_p>;
> + };
> +
> + ps_dpa1: power-controller@2f0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2f0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dpa1";
> + power-domains = <&ps_audio_p>;
> + };
> +
> + ps_mcc: power-controller@2f8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x2f8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mcc";
> + apple,always-on; /* Memory controller */
> + };
> +
> + ps_spi4: power-controller@260 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x260 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "spi4";
> + power-domains = <&ps_sio>, <&ps_spi_p>;
> + };
> +
> + ps_dcs0: power-controller@300 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x300 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs0";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs1: power-controller@310 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x310 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs1";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs2: power-controller@308 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x308 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs2";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs3: power-controller@318 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x318 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs3";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_smx: power-controller@340 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x340 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "smx";
> + apple,always-on; /* Apple fabric, critical block */
> + };
> +
> + ps_apcie: power-controller@348 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x348 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "apcie";
> + power-domains = <&ps_imx>, <&ps_pcie_ref>;
> + };
> +
> + ps_rmx: power-controller@350 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x350 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "rmx";
> + /* Apple Fabric, display/image stuff: this can power down */
> + };
> +
> + ps_mmx: power-controller@358 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x358 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mmx";
> + /* Apple Fabric, media stuff: this can power down */
> + };
> +
> + ps_disp0_fe: power-controller@360 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x360 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "disp0_fe";
> + power-domains = <&ps_rmx>;
> + apple,always-on; /* TODO: figure out if we can enable PM here */
> + };
> +
> + ps_dispext_fe: power-controller@368 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x368 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dispext_fe";
> + power-domains = <&ps_rmx>;
> + };
> +
> + ps_dispext_cpu0: power-controller@378 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x378 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dispext_cpu0";
> + power-domains = <&ps_dispext_fe>;
> + };
> +
> + ps_jpg: power-controller@3c0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3c0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "jpg";
> + power-domains = <&ps_mmx>;
> + };
> +
> + ps_msr: power-controller@3c8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3c8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "msr";
> + power-domains = <&ps_mmx>;
> + };
> +
> + ps_msr_ase_core: power-controller@3d0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3d0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "msr_ase_core";
> + };
> +
> + ps_pmp: power-controller@3d8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3d8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pmp";
> + };
> +
> + ps_pms_sram: power-controller@3e0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3e0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "pms_sram";
> + };
> +
> + ps_apcie_gp: power-controller@3e8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3e8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "apcie_gp";
> + power-domains = <&ps_apcie>;
> + };
> +
> + ps_ans2: power-controller@3f0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3f0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ans2";
> + /*
> + * The ADT makes ps_apcie_st depend on ps_ans2 instead, but this
> + * doesn't make much sense since ANS2 uses APCIE_ST.
> + */
> + power-domains = <&ps_apcie_st>;
> + };
> +
> + ps_gfx: power-controller@3f8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3f8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "gfx";
> + };
> +
> + ps_dcs4: power-controller@320 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x320 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs4";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs5: power-controller@330 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x330 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs5";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs6: power-controller@328 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x328 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs6";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dcs7: power-controller@338 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x338 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dcs7";
> + apple,always-on; /* LPDDR4 interface */
> + };
> +
> + ps_dispdfr_fe: power-controller@3a8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3a8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dispdfr_fe";
> + power-domains = <&ps_rmx>;
> + };
> +
> + ps_dispdfr_be: power-controller@3b0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3b0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "dispdfr_be";
> + power-domains = <&ps_dispdfr_fe>;
> + };
> +
> + ps_mipi_dsi: power-controller@3b8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x3b8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "mipi_dsi";
> + power-domains = <&ps_dispdfr_be>;
> + };
> +
> + ps_isp_sys: power-controller@400 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x400 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "isp_sys";
> + power-domains = <&ps_rmx>;
> + };
> +
> + ps_venc_sys: power-controller@408 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x408 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_sys";
> + power-domains = <&ps_mmx>;
> + };
> +
> + ps_avd_sys: power-controller@410 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x410 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "avd_sys";
> + power-domains = <&ps_mmx>;
> + };
> +
> + ps_apcie_st: power-controller@418 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x418 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "apcie_st";
> + power-domains = <&ps_apcie>;
> + };
> +
> + ps_ane_sys: power-controller@470 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x470 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ane_sys";
> + };
> +
> + ps_atc0_common: power-controller@420 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x420 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_common";
> + };
> +
> + ps_atc0_pcie: power-controller@428 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x428 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_pcie";
> + power-domains = <&ps_atc0_common>;
> + };
> +
> + ps_atc0_cio: power-controller@430 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x430 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_cio";
> + power-domains = <&ps_atc0_common>;
> + };
> +
> + ps_atc0_cio_pcie: power-controller@438 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x438 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_cio_pcie";
> + power-domains = <&ps_atc0_cio>;
> + };
> +
> + ps_atc0_cio_usb: power-controller@440 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x440 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_cio_usb";
> + power-domains = <&ps_atc0_cio>;
> + };
> +
> + ps_atc1_common: power-controller@448 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x448 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_common";
> + };
> +
> + ps_atc1_pcie: power-controller@450 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x450 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_pcie";
> + power-domains = <&ps_atc1_common>;
> + };
> +
> + ps_atc1_cio: power-controller@458 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x458 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_cio";
> + power-domains = <&ps_atc1_common>;
> + };
> +
> + ps_atc1_cio_pcie: power-controller@460 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x460 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_cio_pcie";
> + power-domains = <&ps_atc1_cio>;
> + };
> +
> + ps_atc1_cio_usb: power-controller@468 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x468 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_cio_usb";
> + power-domains = <&ps_atc1_cio>;
> + };
> +
> + ps_sep: power-controller@c00 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xc00 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "sep";
> + apple,always-on; /* Locked on */
> + };
> +
> + ps_venc_dma: power-controller@8000 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x8000 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_dma";
> + power-domains = <&ps_venc_sys>;
> + };
> +
> + ps_venc_pipe4: power-controller@8008 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x8008 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_pipe4";
> + power-domains = <&ps_venc_dma>;
> + };
> +
> + ps_venc_pipe5: power-controller@8010 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x8010 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_pipe5";
> + power-domains = <&ps_venc_dma>;
> + };
> +
> + ps_venc_me0: power-controller@8018 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x8018 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_me0";
> + power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
> + };
> +
> + ps_venc_me1: power-controller@8020 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x8020 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "venc_me1";
> + power-domains = <&ps_venc_pipe4>, <&ps_venc_pipe5>;
> + };
> +
> + ps_ane_sys_cpu: power-controller@c000 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xc000 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "ane_sys_cpu";
> + power-domains = <&ps_ane_sys>;
> + };
> +
> + ps_disp0_cpu0: power-controller@10018 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x10018 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "disp0_cpu0";
> + power-domains = <&ps_disp0_fe>;
> + apple,always-on; /* TODO: figure out if we can enable PM here */
> + };
> +};
> +
> +&pmgr_mini {
> + ps_debug: power-controller@58 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x58 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "debug";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_nub_spmi0: power-controller@60 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x60 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_spmi0";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_nub_aon: power-controller@70 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x70 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_aon";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_nub_gpio: power-controller@80 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x80 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_gpio";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_nub_fabric: power-controller@a8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xa8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_fabric";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_nub_sram: power-controller@b0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xb0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_sram";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_debug_usb: power-controller@b8 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xb8 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "debug_usb";
> + apple,always-on; /* Core AON device */
> + power-domains = <&ps_debug>;
> + };
> +
> + ps_debug_auth: power-controller@c0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xc0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "debug_auth";
> + apple,always-on; /* Core AON device */
> + power-domains = <&ps_debug>;
> + };
> +
> + ps_nub_spmi1: power-controller@68 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x68 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "nub_spmi1";
> + apple,always-on; /* Core AON device */
> + };
> +
> + ps_msg: power-controller@78 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x78 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "msg";
> + };
> +
> + ps_atc0_usb_aon: power-controller@88 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x88 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_usb_aon";
> + };
> +
> + ps_atc1_usb_aon: power-controller@90 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x90 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_usb_aon";
> + };
> +
> + ps_atc0_usb: power-controller@98 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0x98 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc0_usb";
> + power-domains = <&ps_atc0_usb_aon>, <&ps_atc0_common>;
> + };
> +
> + ps_atc1_usb: power-controller@a0 {
> + compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> + reg = <0xa0 4>;
> + #power-domain-cells = <0>;
> + #reset-cells = <0>;
> + label = "atc1_usb";
> + power-domains = <&ps_atc1_usb_aon>, <&ps_atc1_common>;
> + };
> +};
> diff --git a/arch/arm/dts/t8103.dtsi b/arch/arm/dts/t8103.dtsi
> index 03d8436fec..1f029cb8fd 100644
> --- a/arch/arm/dts/t8103.dtsi
> +++ b/arch/arm/dts/t8103.dtsi
> @@ -11,7 +11,6 @@
> #include <dt-bindings/interrupt-controller/apple-aic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
> #include <dt-bindings/pinctrl/apple.h>
> -#include <dt-bindings/spmi/spmi.h>
>
> / {
> compatible = "apple,t8103", "apple,arm-platform";
> @@ -91,11 +90,11 @@
> timer {
> compatible = "arm,armv8-timer";
> interrupt-parent = <&aic>;
> - interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
> - interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
> - <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
> - <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
> - <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
> + interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
> };
>
> clkref: clock-ref {
> @@ -111,18 +110,100 @@
> #size-cells = <2>;
>
> ranges;
> - dma-ranges;
> - dma-coherent;
> nonposted-mmio;
>
> + i2c0: i2c@235010000 {
> + compatible = "apple,t8103-i2c", "apple,i2c";
> + reg = <0x2 0x35010000 0x0 0x4000>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&i2c0_pins>;
> + pinctrl-names = "default";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + power-domains = <&ps_i2c0>;
> + };
> +
> + i2c1: i2c@235014000 {
> + compatible = "apple,t8103-i2c", "apple,i2c";
> + reg = <0x2 0x35014000 0x0 0x4000>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&i2c1_pins>;
> + pinctrl-names = "default";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + power-domains = <&ps_i2c1>;
> + };
> +
> + i2c2: i2c@235018000 {
> + compatible = "apple,t8103-i2c", "apple,i2c";
> + reg = <0x2 0x35018000 0x0 0x4000>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&i2c2_pins>;
> + pinctrl-names = "default";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + power-domains = <&ps_i2c2>;
> + status = "disabled"; /* not used in all devices */
> + };
> +
> + i2c3: i2c@23501c000 {
> + compatible = "apple,t8103-i2c", "apple,i2c";
> + reg = <0x2 0x3501c000 0x0 0x4000>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&i2c3_pins>;
> + pinctrl-names = "default";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + power-domains = <&ps_i2c3>;
> + };
> +
> + i2c4: i2c@235020000 {
> + compatible = "apple,t8103-i2c", "apple,i2c";
> + reg = <0x2 0x35020000 0x0 0x4000>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
> + pinctrl-0 = <&i2c4_pins>;
> + pinctrl-names = "default";
> + #address-cells = <0x1>;
> + #size-cells = <0x0>;
> + power-domains = <&ps_i2c4>;
> + status = "disabled"; /* only used in J293 */
> + };
> +
> + spi3: spi@23510c000 {
> + compatible = "apple,t8103-spi", "apple,spi";
> + reg = <0x2 0x3510c000 0x0 0x4000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + clocks = <&clkref>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&ps_spi3>;
> + cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_LOW>;
> + status = "disabled";
> + };
> +
> serial0: serial@235200000 {
> compatible = "apple,s5l-uart";
> reg = <0x2 0x35200000 0x0 0x1000>;
> reg-io-width = <4>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clkref>, <&clkref>, <&clkref>;
> - clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
> + /*
> + * TODO: figure out the clocking properly, there may
> + * be a third selectable clock.
> + */
> + clocks = <&clkref>, <&clkref>;
> + clock-names = "uart", "clk_uart_baud0";
> power-domains = <&ps_uart0>;
> status = "disabled";
> };
> @@ -133,8 +214,8 @@
> reg-io-width = <4>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clkref>, <&clkref>, <&clkref>;
> - clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
> + clocks = <&clkref>, <&clkref>;
> + clock-names = "uart", "clk_uart_baud0";
> power-domains = <&ps_uart2>;
> status = "disabled";
> };
> @@ -144,131 +225,28 @@
> #interrupt-cells = <3>;
> interrupt-controller;
> reg = <0x2 0x3b100000 0x0 0x8000>;
> + power-domains = <&ps_aic>;
> };
>
> - pmgr: power-controller@23b700000 {
> + pmgr: power-management@23b700000 {
> compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
> #address-cells = <1>;
> - #size-cells = <0>;
> -
> - reg = <0x2 0x3b700000 0x0 0x14000>;
> -
> - ps_pcie_ref: power-controller@1a0 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x1a0>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "pcie_ref";
> - };
> -
> - ps_imx: power-controller@1b8 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x1b8>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "imx";
> - apple,always-on;
> - };
> -
> - ps_sio: power-controller@1c0 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x1c0>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "sio";
> - };
> -
> - ps_uart_p: power-controller@220 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x220>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - power-domains = <&ps_sio>;
> - apple,domain-name = "uart_p";
> - };
> -
> - ps_uart0: power-controller@270 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x270>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - power-domains = <&ps_uart_p>;
> - apple,domain-name = "uart0";
> - };
> -
> - ps_uart1: power-controller@278 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x278>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "uart1";
> - power-domains = <&ps_uart_p>;
> - };
> -
> - ps_uart2: power-controller@280 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x280>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "uart2";
> - power-domains = <&ps_uart_p>;
> - };
> -
> - ps_uart3: power-controller@288 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x288>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "uart3";
> - power-domains = <&ps_uart_p>;
> - };
> -
> - ps_apcie: power-controller@348 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x348>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "apcie";
> - power-domains = <&ps_imx>;
> - };
> -
> - ps_apcie_gp: power-controller@3e8 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x3e8>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "apcie_gp";
> - power-domains = <&ps_apcie>;
> - };
> -
> - ps_ans2: power-controller@3f0 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x3f0>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "ans2";
> - power-domains = <&ps_apcie_st>;
> - };
> -
> - ps_apcie_st: power-controller@418 {
> - compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
> - reg = <0x418>;
> - #power-domain-cells = <0>;
> - #reset-cells = <0>;
> - apple,domain-name = "apcie_st";
> - power-domains = <&ps_apcie>;
> - };
> + #size-cells = <1>;
> + reg = <0x2 0x3b700000 0 0x14000>;
> };
>
> pinctrl_ap: pinctrl@23c100000 {
> compatible = "apple,t8103-pinctrl", "apple,pinctrl";
> reg = <0x2 0x3c100000 0x0 0x100000>;
> + power-domains = <&ps_gpio>;
>
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&pinctrl_ap 0 0 212>;
> + apple,npins = <212>;
>
> interrupt-controller;
> + #interrupt-cells = <2>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
> <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
> @@ -278,18 +256,55 @@
> <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
> <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
>
> - i2c0_pins: i2c0_pins {
> - pinmux = <APPLE_PINMUX(188, 1)>,
> - <APPLE_PINMUX(192, 1)>;
> + i2c0_pins: i2c0-pins {
> + pinmux = <APPLE_PINMUX(192, 1)>,
> + <APPLE_PINMUX(188, 1)>;
> + };
> +
> + i2c1_pins: i2c1-pins {
> + pinmux = <APPLE_PINMUX(201, 1)>,
> + <APPLE_PINMUX(199, 1)>;
> + };
> +
> + i2c2_pins: i2c2-pins {
> + pinmux = <APPLE_PINMUX(163, 1)>,
> + <APPLE_PINMUX(162, 1)>;
> + };
> +
> + i2c3_pins: i2c3-pins {
> + pinmux = <APPLE_PINMUX(73, 1)>,
> + <APPLE_PINMUX(72, 1)>;
> + };
> +
> + i2c4_pins: i2c4-pins {
> + pinmux = <APPLE_PINMUX(135, 1)>,
> + <APPLE_PINMUX(134, 1)>;
> };
>
> pcie_pins: pcie-pins {
> pinmux = <APPLE_PINMUX(150, 1)>,
> - <APPLE_PINMUX(151, 1)>,
> + <APPLE_PINMUX(151, 1)>,
> <APPLE_PINMUX(32, 1)>;
> };
> };
>
> + spmi: spmi@23d0d9300 {
> + compatible = "apple,t8103-spmi", "apple,spmi";
> + reg = <0x2 0x3d0d9300 0x0 0x100>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + pmgr_mini: power-management@23d280000 {
> + compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + reg = <0x2 0x3d280000 0 0x4000>;
> + };
> +
> pinctrl_aop: pinctrl@24a820000 {
> compatible = "apple,t8103-pinctrl", "apple,pinctrl";
> reg = <0x2 0x4a820000 0x0 0x4000>;
> @@ -297,8 +312,10 @@
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&pinctrl_aop 0 0 42>;
> + apple,npins = <42>;
>
> interrupt-controller;
> + #interrupt-cells = <2>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
> <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
> @@ -312,12 +329,15 @@
> pinctrl_nub: pinctrl@23d1f0000 {
> compatible = "apple,t8103-pinctrl", "apple,pinctrl";
> reg = <0x2 0x3d1f0000 0x0 0x4000>;
> + power-domains = <&ps_nub_gpio>;
>
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&pinctrl_nub 0 0 23>;
> + apple,npins = <23>;
>
> interrupt-controller;
> + #interrupt-cells = <2>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
> <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
> @@ -343,8 +363,10 @@
> gpio-controller;
> #gpio-cells = <2>;
> gpio-ranges = <&pinctrl_smc 0 0 16>;
> + apple,npins = <16>;
>
> interrupt-controller;
> + #interrupt-cells = <2>;
> interrupt-parent = <&aic>;
> interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
> <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
> @@ -355,100 +377,124 @@
> <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - i2c0: i2c@20a110000 {
> - compatible = "apple,i2c-v0";
> - reg = <0x2 0x35010000 0x0 0x4000>;
> + smc_mbox: mbox@23e408000 {
> + compatible = "apple,t8103-asc-mailbox";
> + reg = <0x2 0x3e408000 0x0 0x4000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&clkref>;
> - pinctrl-0 = <&i2c0_pins>;
> - pinctrl-names = "default";
> - #address-cells = <0x1>;
> - #size-cells = <0x0>;
> + interrupts = <AIC_IRQ 400 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 401 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 402 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 403 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "send-empty", "send-not-empty",
> + "recv-empty", "recv-not-empty";
> + #mbox-cells = <0>;
> + };
>
> - hpm0: hpm@38 {
> - compatible = "ti,tps6598x";
> - reg = <0x38>;
> - };
> + smc: smc@23e050000 {
> + compatible = "apple,smc-m1";
> + reg = <0x2 0x3e050000 0x0 0x4000>,
> + <0x2 0x3e400000 0x0 0x4000>;
> + reg-names = "smc", "coproc";
> + mboxes = <&smc_mbox>;
> + gpio-controller;
> + #gpio-cells = <2>;
> + gpio-13 = <0x00800000>;
> + };
>
> - hpm1: hpm@3f {
> - compatible = "ti,tps6598x";
> - reg = <0x3f>;
> - };
> - };
> + dwc3_0_dart_0: iommu@382f00000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x3 0x82f00000 0x0 0x4000>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + power-domains = <&ps_atc0_usb>;
> + };
>
> - ans_mbox: mbox@277400000 {
> - compatible = "apple,iop-mailbox-m1";
> - reg = <0x2 0x77400000 0x0 0x20000>;
> + dwc3_0_dart_1: iommu@382f80000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x3 0x82f80000 0x0 0x4000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
> - <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&ps_ans2>;
> - #mbox-cells = <1>;
> - endpoints = <32>;
> + interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
> + #iommu-cells = <1>;
> + power-domains = <&ps_atc0_usb>;
> };
>
> - ans@27bcc0000 {
> - compatible = "apple,nvme-m1";
> - reg = <0x2 0x7bcc0000 0x0 0x40000>,
> - <0x2 0x7bc50000 0x0 0x4000>;
> + dwc3_0: usb@382280000 {
> + compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
> + reg = <0x3 0x82280000 0x0 0x100000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&ps_apcie_st>;
> - mboxes = <&ans_mbox 32>;
> + interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
> + usb-role-switch;
> + role-switch-default-mode = "host";
> + iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
> + power-domains = <&ps_atc0_usb>;
> };
>
> - pcie0_dart_0: iommu@681008000 {
> - compatible = "apple,t8103-dart", "apple,dart-m1";
> - reg = <0x6 0x81008000 0x0 0x4000>;
> + dwc3_1_dart_0: iommu@502f00000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x5 0x02f00000 0x0 0x4000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
> #iommu-cells = <1>;
> - status = "disabled";
> + power-domains = <&ps_atc1_usb>;
> };
>
> - pcie0_dart_1: iommu@682008000 {
> - compatible = "apple,t8103-dart", "apple,dart-m1";
> - reg = <0x6 0x82008000 0x0 0x4000>;
> + dwc3_1_dart_1: iommu@502f80000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x5 0x02f80000 0x0 0x4000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
> #iommu-cells = <1>;
> - status = "disabled";
> + power-domains = <&ps_atc1_usb>;
> };
>
> - pcie0_dart_2: iommu@683008000 {
> - compatible = "apple,t8103-dart", "apple,dart-m1";
> - reg = <0x6 0x83008000 0x0 0x4000>;
> + dwc3_1: usb@b02280000 {
> + compatible = "apple,t8103-dwc3", "apple,dwc3", "snps,dwc3";
> + reg = <0x5 0x02280000 0x0 0x100000>;
> interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
> + usb-role-switch;
> + role-switch-default-mode = "host";
> + iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
> + power-domains = <&ps_atc1_usb>;
> + };
> +
> + pcie0_dart_0: dart@681008000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x6 0x81008000 0x0 0x4000>;
> #iommu-cells = <1>;
> - status = "disabled";
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&ps_apcie_gp>;
> };
>
> - smc_mbox: mbox@23e400000 {
> - compatible = "apple,iop-mailbox-m1";
> - reg = <0x2 0x3e400000 0x0 0x20000>;
> - #mbox-cells = <1>;
> - endpoints = <32>;
> + pcie0_dart_1: dart@682008000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x6 0x82008000 0x0 0x4000>;
> + #iommu-cells = <1>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&ps_apcie_gp>;
> };
>
> - smc: smc@23e050000 {
> - compatible = "apple,smc-m1";
> - reg = <0x2 0x3e050000 0x0 0x4000>;
> - mboxes = <&smc_mbox 32>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - gpio-13 = <0x00800000>;
> + pcie0_dart_2: dart@683008000 {
> + compatible = "apple,t8103-dart";
> + reg = <0x6 0x83008000 0x0 0x4000>;
> + #iommu-cells = <1>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
> + power-domains = <&ps_apcie_gp>;
> };
>
> pcie0: pcie@690000000 {
> compatible = "apple,t8103-pcie", "apple,pcie";
> + device_type = "pci";
>
> reg = <0x6 0x90000000 0x0 0x1000000>,
> - <0x6 0x80000000 0x0 0x4000>,
> - <0x6 0x81000000 0x0 0x8000>,
> - <0x6 0x82000000 0x0 0x8000>,
> - <0x6 0x83000000 0x0 0x8000>;
> + <0x6 0x80000000 0x0 0x100000>,
> + <0x6 0x81000000 0x0 0x4000>,
> + <0x6 0x82000000 0x0 0x4000>,
> + <0x6 0x83000000 0x0 0x4000>;
> reg-names = "config", "rc", "port0", "port1", "port2";
>
> interrupt-parent = <&aic>;
> @@ -460,6 +506,7 @@
> msi-parent = <&pcie0>;
> msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
>
> +
> iommu-map = <0x100 &pcie0_dart_0 1 1>,
> <0x200 &pcie0_dart_1 1 1>,
> <0x300 &pcie0_dart_2 1 1>;
> @@ -468,96 +515,104 @@
> bus-range = <0 3>;
> #address-cells = <3>;
> #size-cells = <2>;
> - ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000
> - 0x0 0x20000000>,
> - <0x02000000 0x0 0xc0000000 0x6 0xc0000000
> - 0x0 0x40000000>;
> + ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
> + <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
>
> - power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
> + power-domains = <&ps_apcie_gp>;
> pinctrl-0 = <&pcie_pins>;
> pinctrl-names = "default";
>
> - device_type = "pci";
> - status = "disabled";
> - };
> + port00: pci@0,0 {
> + device_type = "pci";
> + reg = <0x0 0x0 0x0 0x0 0x0>;
> + reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
> + max-link-speed = <2>;
>
> - dwc3_0_dart_0: iommu@382f00000 {
> - compatible = "apple,t8103-dart";
> - reg = <0x3 0x82f00000 0x0 0x4000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
>
> - dwc3_0_dart_1: iommu@382f80000 {
> - compatible = "apple,t8103-dart";
> - reg = <0x3 0x82f80000 0x0 0x4000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + interrupt-controller;
> + #interrupt-cells = <1>;
>
> - dwc3_0: usb@382280000{
> - compatible = "snps,dwc3";
> - reg = <0x3 0x82280000 0x0 0x100000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "host";
> - iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
> - status = "disabled";
> - };
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
> + <0 0 0 2 &port00 0 0 0 1>,
> + <0 0 0 3 &port00 0 0 0 2>,
> + <0 0 0 4 &port00 0 0 0 3>;
> + };
>
> - dwc3_1_dart_0: iommu@502f00000 {
> - compatible = "apple,t8103-dart";
> - reg = <0x5 0x02f00000 0x0 0x4000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + port01: pci@1,0 {
> + device_type = "pci";
> + reg = <0x800 0x0 0x0 0x0 0x0>;
> + reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
> + max-link-speed = <2>;
>
> - dwc3_1_dart_1: iommu@502f80000 {
> - compatible = "apple,t8103-dart";
> - reg = <0x5 0x02f80000 0x0 0x4000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
> - #iommu-cells = <1>;
> - status = "disabled";
> - };
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
>
> - dwc3_1: usb@502280000{
> - compatible = "snps,dwc3";
> - reg = <0x5 0x02280000 0x0 0x100000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
> - dr_mode = "host";
> - iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
> - status = "disabled";
> - };
> + interrupt-controller;
> + #interrupt-cells = <1>;
>
> - spi@23510c000 {
> - compatible = "apple,t8103-spi", "apple,spi";
> - reg = <0x2 0x3510c000 0x0 0x4000>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
> - cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_HIGH>;
> - };
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
> + <0 0 0 2 &port01 0 0 0 1>,
> + <0 0 0 3 &port01 0 0 0 2>,
> + <0 0 0 4 &port01 0 0 0 3>;
> + };
>
> - spmi@23d0d8000 {
> - compatible = "apple,t8103-spmi", "apple,spmi";
> - reg = <0x2 0x3d0d9300 0x0 0x100>;
> - interrupt-parent = <&aic>;
> - interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
> + port02: pci@2,0 {
> + device_type = "pci";
> + reg = <0x1000 0x0 0x0 0x0 0x0>;
> + reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
> + max-link-speed = <1>;
>
> - #address-cells = <2>;
> - #size-cells = <0>;
> + #address-cells = <3>;
> + #size-cells = <2>;
> + ranges;
>
> - pmu@f {
> - compatible = "apple,sera-pmu";
> - reg = <0xf SPMI_USID>;
> + interrupt-controller;
> + #interrupt-cells = <1>;
> +
> + interrupt-map-mask = <0 0 0 7>;
> + interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
> + <0 0 0 2 &port02 0 0 0 1>,
> + <0 0 0 3 &port02 0 0 0 2>,
> + <0 0 0 4 &port02 0 0 0 3>;
> };
> };
> + ans: mbox@277408000 {
> + compatible = "apple,t8103-asc-mailbox";
> + reg = <0x2 0x77408000 0x0 0x4000>;
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
> + <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "send-empty", "send-not-empty",
> + "recv-empty", "recv-not-empty";
> + #mbox-cells = <0>;
> + power-domains = <&ps_ans2>;
> + };
> +
> + sart: sart@27bc50000 {
> + compatible = "apple,t8103-sart";
> + reg = <0x2 0x7bc50000 0x0 0x10000>;
> + power-domains = <&ps_ans2>;
> + };
> +
> + ans2: nvme@27bcc0000 {
> + compatible = "apple,t8103-ans-nvme", "apple,nvme-m1";
> + reg = <0x2 0x7bcc0000 0x0 0x40000>, <0x2 0x77400000 0x0 0x4000>;
> + reg-names = "nvme", "coproc";
> + interrupt-parent = <&aic>;
> + interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
> + mboxes = <&ans>;
> + apple,sart = <&sart>;
> + power-domains = <&ps_ans2>;
> + };
> };
> };
> +
> +#include "t8103-pmgr.dtsi"
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties
2021-12-23 21:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties Mark Kettenis
@ 2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot, dm-pre-reloc properties Simon Glass
1 sibling, 0 replies; 14+ messages in thread
From: Jaehoon Chung @ 2021-12-27 12:20 UTC (permalink / raw)
To: Mark Kettenis, u-boot; +Cc: sjg, jh80.chung
On 12/24/21 6:34 AM, Mark Kettenis wrote:
> These are necessary to make sure the power domains needed for the
> serial console are availble in the pre-relocation phase.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Best Regards,
Jaehoon Chung
> ---
> arch/arm/dts/t8103-j274-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j293-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j313-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j456-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j457-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-u-boot.dtsi | 25 +++++++++++++++++++++++++
> 6 files changed, 30 insertions(+)
> create mode 100644 arch/arm/dts/t8103-j274-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j293-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j313-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j456-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j457-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-u-boot.dtsi
>
> diff --git a/arch/arm/dts/t8103-j274-u-boot.dtsi b/arch/arm/dts/t8103-j274-u-boot.dtsi
> new file mode 100644
> index 0000000000..6c8dd5a56f
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j274-u-boot.dtsi
> @@ -0,0 +1 @@
> +#include "t8103-u-boot.dtsi"
> diff --git a/arch/arm/dts/t8103-j293-u-boot.dtsi b/arch/arm/dts/t8103-j293-u-boot.dtsi
> new file mode 100644
> index 0000000000..6c8dd5a56f
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j293-u-boot.dtsi
> @@ -0,0 +1 @@
> +#include "t8103-u-boot.dtsi"
> diff --git a/arch/arm/dts/t8103-j313-u-boot.dtsi b/arch/arm/dts/t8103-j313-u-boot.dtsi
> new file mode 100644
> index 0000000000..6c8dd5a56f
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j313-u-boot.dtsi
> @@ -0,0 +1 @@
> +#include "t8103-u-boot.dtsi"
> diff --git a/arch/arm/dts/t8103-j456-u-boot.dtsi b/arch/arm/dts/t8103-j456-u-boot.dtsi
> new file mode 100644
> index 0000000000..6c8dd5a56f
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j456-u-boot.dtsi
> @@ -0,0 +1 @@
> +#include "t8103-u-boot.dtsi"
> diff --git a/arch/arm/dts/t8103-j457-u-boot.dtsi b/arch/arm/dts/t8103-j457-u-boot.dtsi
> new file mode 100644
> index 0000000000..6c8dd5a56f
> --- /dev/null
> +++ b/arch/arm/dts/t8103-j457-u-boot.dtsi
> @@ -0,0 +1 @@
> +#include "t8103-u-boot.dtsi"
> diff --git a/arch/arm/dts/t8103-u-boot.dtsi b/arch/arm/dts/t8103-u-boot.dtsi
> new file mode 100644
> index 0000000000..43f552979d
> --- /dev/null
> +++ b/arch/arm/dts/t8103-u-boot.dtsi
> @@ -0,0 +1,25 @@
> +// SPDX-License-Identifier: GPL-2.0+ OR MIT
> +
> +&serial0 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&pmgr {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&ps_sio_busif {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&ps_sio {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&ps_uart_p {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&ps_uart0 {
> + u-boot,dm-pre-reloc;
> +};
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-23 21:34 ` [PATCH v2 3/3] power: domain: Add Apple pmgr driver Mark Kettenis
@ 2021-12-27 12:21 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
1 sibling, 0 replies; 14+ messages in thread
From: Jaehoon Chung @ 2021-12-27 12:21 UTC (permalink / raw)
To: Mark Kettenis, u-boot; +Cc: sjg, jh80.chung
On 12/24/21 6:34 AM, Mark Kettenis wrote:
> This driver supports power domains for the power management
> controller found on Apple SoCs.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Best Regards,
Jaehoon Chung
> ---
> arch/arm/Kconfig | 3 +
> drivers/power/domain/Kconfig | 8 +++
> drivers/power/domain/Makefile | 1 +
> drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> 4 files changed, 125 insertions(+)
> create mode 100644 drivers/power/domain/apple-pmgr.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 59e031de04..40d3f66acb 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -938,6 +938,9 @@ config ARCH_APPLE
> select OF_BOARD
> select PINCTRL
> select POSITION_INDEPENDENT
> + select POWER_DOMAIN
> + select REGMAP
> + select SYSCON
> select SYSRESET
> select SYSRESET_WATCHDOG
> select SYSRESET_WATCHDOG_AUTO
> diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> index 99b3f9ae71..6ef7a3b3a7 100644
> --- a/drivers/power/domain/Kconfig
> +++ b/drivers/power/domain/Kconfig
> @@ -9,6 +9,14 @@ config POWER_DOMAIN
> domains). This may be used to save power. This API provides the
> means to control such power management hardware.
>
> +config APPLE_PMGR_POWER_DOMAIN
> + bool "Enable the Apple PMGR power domain driver"
> + depends on POWER_DOMAIN
> + default y if ARCH_APPLE
> + help
> + Enable support for manipulating the Apple M1 power domains via
> + MMIO mapped registers.
> +
> config BCM6328_POWER_DOMAIN
> bool "Enable the BCM6328 power domain driver"
> depends on POWER_DOMAIN && ARCH_BMIPS
> diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> index 3d1e5f073c..530ae35671 100644
> --- a/drivers/power/domain/Makefile
> +++ b/drivers/power/domain/Makefile
> @@ -4,6 +4,7 @@
> #
>
> obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> new file mode 100644
> index 0000000000..08a30c8ebf
> --- /dev/null
> +++ b/drivers/power/domain/apple-pmgr.c
> @@ -0,0 +1,113 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <dm.h>
> +#include <linux/err.h>
> +#include <linux/bitfield.h>
> +#include <power-domain-uclass.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +
> +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> +
> +#define APPLE_PMGR_PS_ACTIVE 0xf
> +#define APPLE_PMGR_PS_PWRGATE 0x0
> +
> +#define APPLE_PMGR_PS_SET_TIMEOUT 100
> +
> +struct apple_pmgr_priv {
> + struct regmap *regmap;
> + u32 offset;
> +};
> +
> +static int apple_pmgr_request(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_rfree(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> +{
> + struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> + uint reg;
> +
> + regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
> + FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
> +
> + return regmap_read_poll_timeout(
> + priv->regmap, priv->offset, reg,
> + (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
> + APPLE_PMGR_PS_SET_TIMEOUT);
> +}
> +
> +static int apple_pmgr_on(struct power_domain *power_domain)
> +{
> + return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> +}
> +
> +static int apple_pmgr_off(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> + struct ofnode_phandle_args *args)
> +{
> + if (args->args_count != 0) {
> + debug("Invalid args_count: %d\n", args->args_count);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static const struct udevice_id apple_pmgr_ids[] = {
> + { .compatible = "apple,pmgr-pwrstate" },
> + { /* sentinel */ }
> +};
> +
> +static int apple_pmgr_probe(struct udevice *dev)
> +{
> + struct apple_pmgr_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = dev_power_domain_on(dev);
> + if (ret)
> + return ret;
> +
> + priv->regmap = syscon_get_regmap(dev->parent);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + ret = dev_read_u32(dev, "reg", &priv->offset);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
> +}
> +
> +struct power_domain_ops apple_pmgr_ops = {
> + .request = apple_pmgr_request,
> + .rfree = apple_pmgr_rfree,
> + .on = apple_pmgr_on,
> + .off = apple_pmgr_off,
> + .of_xlate = apple_pmgr_of_xlate,
> +};
> +
> +U_BOOT_DRIVER(apple_pmgr) = {
> + .name = "apple_pmgr",
> + .id = UCLASS_POWER_DOMAIN,
> + .of_match = apple_pmgr_ids,
> + .ops = &apple_pmgr_ops,
> + .probe = apple_pmgr_probe,
> + .priv_auto = sizeof(struct apple_pmgr_priv),
> +};
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
@ 2021-12-28 8:34 ` Simon Glass
1 sibling, 0 replies; 14+ messages in thread
From: Simon Glass @ 2021-12-28 8:34 UTC (permalink / raw)
To: Mark Kettenis; +Cc: U-Boot Mailing List, Jaehoon Chung
On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
>
> This synchronizes the device trees with those that are in the
> process of being upstreamed into Linux 5.16 or proposed for
> Linux 5.17. This includes device trees for machines that were
> still missing.
>
> There are still some differences that will hopefully be resolved
> soon.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
> arch/arm/dts/Makefile | 5 +-
> arch/arm/dts/t8103-j274.dts | 122 +---
> arch/arm/dts/t8103-j293.dts | 92 +--
> arch/arm/dts/t8103-j313.dts | 57 ++
> arch/arm/dts/t8103-j456.dts | 71 +++
> arch/arm/dts/t8103-j457.dts | 59 ++
> arch/arm/dts/t8103-jxxx.dtsi | 140 +++++
> arch/arm/dts/t8103-pmgr.dtsi | 1136 ++++++++++++++++++++++++++++++++++
> arch/arm/dts/t8103.dtsi | 585 +++++++++--------
> 9 files changed, 1839 insertions(+), 428 deletions(-)
> create mode 100644 arch/arm/dts/t8103-j313.dts
> create mode 100644 arch/arm/dts/t8103-j456.dts
> create mode 100644 arch/arm/dts/t8103-j457.dts
> create mode 100644 arch/arm/dts/t8103-jxxx.dtsi
> create mode 100644 arch/arm/dts/t8103-pmgr.dtsi
>
Reviewed-by: Simon Glass <sjg@chromium.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 2/3] arm: dts: apple: Add u-boot, dm-pre-reloc properties
2021-12-23 21:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
@ 2021-12-28 8:34 ` Simon Glass
1 sibling, 0 replies; 14+ messages in thread
From: Simon Glass @ 2021-12-28 8:34 UTC (permalink / raw)
To: Mark Kettenis; +Cc: U-Boot Mailing List, Jaehoon Chung
On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
>
> These are necessary to make sure the power domains needed for the
> serial console are availble in the pre-relocation phase.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
> arch/arm/dts/t8103-j274-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j293-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j313-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j456-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-j457-u-boot.dtsi | 1 +
> arch/arm/dts/t8103-u-boot.dtsi | 25 +++++++++++++++++++++++++
> 6 files changed, 30 insertions(+)
> create mode 100644 arch/arm/dts/t8103-j274-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j293-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j313-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j456-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-j457-u-boot.dtsi
> create mode 100644 arch/arm/dts/t8103-u-boot.dtsi
Reviewed-by: Simon Glass <sjg@chromium.org>
You should not need the empty files, not sure what is happening there.
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-23 21:34 ` [PATCH v2 3/3] power: domain: Add Apple pmgr driver Mark Kettenis
2021-12-27 12:21 ` Jaehoon Chung
@ 2021-12-28 8:34 ` Simon Glass
2021-12-28 14:27 ` Mark Kettenis
1 sibling, 1 reply; 14+ messages in thread
From: Simon Glass @ 2021-12-28 8:34 UTC (permalink / raw)
To: Mark Kettenis; +Cc: U-Boot Mailing List, Jaehoon Chung
Hi Mark,
On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
>
> This driver supports power domains for the power management
> controller found on Apple SoCs.
>
> Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> ---
> arch/arm/Kconfig | 3 +
> drivers/power/domain/Kconfig | 8 +++
> drivers/power/domain/Makefile | 1 +
> drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> 4 files changed, 125 insertions(+)
> create mode 100644 drivers/power/domain/apple-pmgr.c
Reviewed-by: Simon Glass <sjg@chromium.org>
nits below
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 59e031de04..40d3f66acb 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -938,6 +938,9 @@ config ARCH_APPLE
> select OF_BOARD
> select PINCTRL
> select POSITION_INDEPENDENT
> + select POWER_DOMAIN
> + select REGMAP
> + select SYSCON
> select SYSRESET
> select SYSRESET_WATCHDOG
> select SYSRESET_WATCHDOG_AUTO
> diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> index 99b3f9ae71..6ef7a3b3a7 100644
> --- a/drivers/power/domain/Kconfig
> +++ b/drivers/power/domain/Kconfig
> @@ -9,6 +9,14 @@ config POWER_DOMAIN
> domains). This may be used to save power. This API provides the
> means to control such power management hardware.
>
> +config APPLE_PMGR_POWER_DOMAIN
> + bool "Enable the Apple PMGR power domain driver"
> + depends on POWER_DOMAIN
> + default y if ARCH_APPLE
> + help
> + Enable support for manipulating the Apple M1 power domains via
> + MMIO mapped registers.
Needs more detail here, perhaps a pointer to docs, or something about
what the driver supports.
> +
> config BCM6328_POWER_DOMAIN
> bool "Enable the BCM6328 power domain driver"
> depends on POWER_DOMAIN && ARCH_BMIPS
> diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> index 3d1e5f073c..530ae35671 100644
> --- a/drivers/power/domain/Makefile
> +++ b/drivers/power/domain/Makefile
> @@ -4,6 +4,7 @@
> #
>
> obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> new file mode 100644
> index 0000000000..08a30c8ebf
> --- /dev/null
> +++ b/drivers/power/domain/apple-pmgr.c
> @@ -0,0 +1,113 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <dm.h>
> +#include <linux/err.h>
> +#include <linux/bitfield.h>
> +#include <power-domain-uclass.h>
> +#include <regmap.h>
> +#include <syscon.h>
> +
> +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> +
> +#define APPLE_PMGR_PS_ACTIVE 0xf
> +#define APPLE_PMGR_PS_PWRGATE 0x0
> +
> +#define APPLE_PMGR_PS_SET_TIMEOUT 100
TIMEOUT_MS ?
_US ?
> +
> +struct apple_pmgr_priv {
> + struct regmap *regmap;
> + u32 offset;
Needs comment for struct
> +};
> +
> +static int apple_pmgr_request(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_rfree(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> +{
> + struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> + uint reg;
> +
> + regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
> + FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
> +
> + return regmap_read_poll_timeout(
> + priv->regmap, priv->offset, reg,
> + (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
> + APPLE_PMGR_PS_SET_TIMEOUT);
> +}
> +
> +static int apple_pmgr_on(struct power_domain *power_domain)
> +{
> + return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> +}
> +
> +static int apple_pmgr_off(struct power_domain *power_domain)
> +{
> + return 0;
> +}
> +
> +static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> + struct ofnode_phandle_args *args)
> +{
> + if (args->args_count != 0) {
s/ != 0//
> + debug("Invalid args_count: %d\n", args->args_count);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static const struct udevice_id apple_pmgr_ids[] = {
> + { .compatible = "apple,pmgr-pwrstate" },
> + { /* sentinel */ }
> +};
> +
> +static int apple_pmgr_probe(struct udevice *dev)
> +{
> + struct apple_pmgr_priv *priv = dev_get_priv(dev);
> + int ret;
> +
> + ret = dev_power_domain_on(dev);
> + if (ret)
> + return ret;
> +
> + priv->regmap = syscon_get_regmap(dev->parent);
> + if (IS_ERR(priv->regmap))
> + return PTR_ERR(priv->regmap);
> +
> + ret = dev_read_u32(dev, "reg", &priv->offset);
> + if (ret < 0)
> + return ret;
> +
> + return 0;
> +}
> +
> +struct power_domain_ops apple_pmgr_ops = {
> + .request = apple_pmgr_request,
> + .rfree = apple_pmgr_rfree,
> + .on = apple_pmgr_on,
> + .off = apple_pmgr_off,
> + .of_xlate = apple_pmgr_of_xlate,
> +};
> +
> +U_BOOT_DRIVER(apple_pmgr) = {
> + .name = "apple_pmgr",
> + .id = UCLASS_POWER_DOMAIN,
> + .of_match = apple_pmgr_ids,
> + .ops = &apple_pmgr_ops,
> + .probe = apple_pmgr_probe,
> + .priv_auto = sizeof(struct apple_pmgr_priv),
> +};
> --
> 2.34.1
>
Regards,
Simon
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-28 8:34 ` Simon Glass
@ 2021-12-28 14:27 ` Mark Kettenis
2021-12-29 13:36 ` Simon Glass
0 siblings, 1 reply; 14+ messages in thread
From: Mark Kettenis @ 2021-12-28 14:27 UTC (permalink / raw)
To: Simon Glass; +Cc: kettenis, u-boot, jh80.chung
> From: Simon Glass <sjg@chromium.org>
> Date: Tue, 28 Dec 2021 01:34:16 -0700
>
> Hi Mark,
>
> On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
> >
> > This driver supports power domains for the power management
> > controller found on Apple SoCs.
> >
> > Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> > ---
> > arch/arm/Kconfig | 3 +
> > drivers/power/domain/Kconfig | 8 +++
> > drivers/power/domain/Makefile | 1 +
> > drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> > 4 files changed, 125 insertions(+)
> > create mode 100644 drivers/power/domain/apple-pmgr.c
>
> Reviewed-by: Simon Glass <sjg@chromium.org>
>
> nits below
>
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index 59e031de04..40d3f66acb 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -938,6 +938,9 @@ config ARCH_APPLE
> > select OF_BOARD
> > select PINCTRL
> > select POSITION_INDEPENDENT
> > + select POWER_DOMAIN
> > + select REGMAP
> > + select SYSCON
> > select SYSRESET
> > select SYSRESET_WATCHDOG
> > select SYSRESET_WATCHDOG_AUTO
> > diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> > index 99b3f9ae71..6ef7a3b3a7 100644
> > --- a/drivers/power/domain/Kconfig
> > +++ b/drivers/power/domain/Kconfig
> > @@ -9,6 +9,14 @@ config POWER_DOMAIN
> > domains). This may be used to save power. This API provides the
> > means to control such power management hardware.
> >
> > +config APPLE_PMGR_POWER_DOMAIN
> > + bool "Enable the Apple PMGR power domain driver"
> > + depends on POWER_DOMAIN
> > + default y if ARCH_APPLE
> > + help
> > + Enable support for manipulating the Apple M1 power domains via
> > + MMIO mapped registers.
>
> Needs more detail here, perhaps a pointer to docs, or something about
> what the driver supports.
Struggling to come up with more. The "via MMIO mapped registers" is
already a bit silly. There are no docs. And the one line already
indicates what the driver supports. Do you want me to add a sentence
that says the same thing but in different words?
> > +
> > config BCM6328_POWER_DOMAIN
> > bool "Enable the BCM6328 power domain driver"
> > depends on POWER_DOMAIN && ARCH_BMIPS
> > diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> > index 3d1e5f073c..530ae35671 100644
> > --- a/drivers/power/domain/Makefile
> > +++ b/drivers/power/domain/Makefile
> > @@ -4,6 +4,7 @@
> > #
> >
> > obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> > +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> > obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> > obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> > obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> > diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> > new file mode 100644
> > index 0000000000..08a30c8ebf
> > --- /dev/null
> > +++ b/drivers/power/domain/apple-pmgr.c
> > @@ -0,0 +1,113 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> > + */
> > +
> > +#include <common.h>
> > +#include <asm/io.h>
> > +#include <dm.h>
> > +#include <linux/err.h>
> > +#include <linux/bitfield.h>
> > +#include <power-domain-uclass.h>
> > +#include <regmap.h>
> > +#include <syscon.h>
> > +
> > +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> > +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> > +
> > +#define APPLE_PMGR_PS_ACTIVE 0xf
> > +#define APPLE_PMGR_PS_PWRGATE 0x0
> > +
> > +#define APPLE_PMGR_PS_SET_TIMEOUT 100
>
> TIMEOUT_MS ?
> _US ?
_US
> > +
> > +struct apple_pmgr_priv {
> > + struct regmap *regmap;
> > + u32 offset;
>
> Needs comment for struct
Really? I mean, I can add a "Device private data" comment, but that's
pretty much implied by the _priv and the vast majority of the drivers
don't do such a thing.
>
> > +};
> > +
> > +static int apple_pmgr_request(struct power_domain *power_domain)
> > +{
> > + return 0;
> > +}
> > +
> > +static int apple_pmgr_rfree(struct power_domain *power_domain)
> > +{
> > + return 0;
> > +}
> > +
> > +static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> > +{
> > + struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> > + uint reg;
> > +
> > + regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
> > + FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
> > +
> > + return regmap_read_poll_timeout(
> > + priv->regmap, priv->offset, reg,
> > + (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
> > + APPLE_PMGR_PS_SET_TIMEOUT);
> > +}
> > +
> > +static int apple_pmgr_on(struct power_domain *power_domain)
> > +{
> > + return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> > +}
> > +
> > +static int apple_pmgr_off(struct power_domain *power_domain)
> > +{
> > + return 0;
> > +}
> > +
> > +static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> > + struct ofnode_phandle_args *args)
> > +{
> > + if (args->args_count != 0) {
>
> s/ != 0//
!= 0 seems better here since that is the value we're checking for.
>
> > + debug("Invalid args_count: %d\n", args->args_count);
> > + return -EINVAL;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static const struct udevice_id apple_pmgr_ids[] = {
> > + { .compatible = "apple,pmgr-pwrstate" },
> > + { /* sentinel */ }
> > +};
> > +
> > +static int apple_pmgr_probe(struct udevice *dev)
> > +{
> > + struct apple_pmgr_priv *priv = dev_get_priv(dev);
> > + int ret;
> > +
> > + ret = dev_power_domain_on(dev);
> > + if (ret)
> > + return ret;
> > +
> > + priv->regmap = syscon_get_regmap(dev->parent);
> > + if (IS_ERR(priv->regmap))
> > + return PTR_ERR(priv->regmap);
> > +
> > + ret = dev_read_u32(dev, "reg", &priv->offset);
> > + if (ret < 0)
> > + return ret;
> > +
> > + return 0;
> > +}
> > +
> > +struct power_domain_ops apple_pmgr_ops = {
> > + .request = apple_pmgr_request,
> > + .rfree = apple_pmgr_rfree,
> > + .on = apple_pmgr_on,
> > + .off = apple_pmgr_off,
> > + .of_xlate = apple_pmgr_of_xlate,
> > +};
> > +
> > +U_BOOT_DRIVER(apple_pmgr) = {
> > + .name = "apple_pmgr",
> > + .id = UCLASS_POWER_DOMAIN,
> > + .of_match = apple_pmgr_ids,
> > + .ops = &apple_pmgr_ops,
> > + .probe = apple_pmgr_probe,
> > + .priv_auto = sizeof(struct apple_pmgr_priv),
> > +};
> > --
> > 2.34.1
> >
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-28 14:27 ` Mark Kettenis
@ 2021-12-29 13:36 ` Simon Glass
2021-12-29 15:00 ` Mark Kettenis
0 siblings, 1 reply; 14+ messages in thread
From: Simon Glass @ 2021-12-29 13:36 UTC (permalink / raw)
To: Mark Kettenis; +Cc: Mark Kettenis, U-Boot Mailing List, Jaehoon Chung
Hi Mark,
On Tue, 28 Dec 2021 at 07:27, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> > From: Simon Glass <sjg@chromium.org>
> > Date: Tue, 28 Dec 2021 01:34:16 -0700
> >
> > Hi Mark,
> >
> > On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
> > >
> > > This driver supports power domains for the power management
> > > controller found on Apple SoCs.
> > >
> > > Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> > > ---
> > > arch/arm/Kconfig | 3 +
> > > drivers/power/domain/Kconfig | 8 +++
> > > drivers/power/domain/Makefile | 1 +
> > > drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> > > 4 files changed, 125 insertions(+)
> > > create mode 100644 drivers/power/domain/apple-pmgr.c
> >
> > Reviewed-by: Simon Glass <sjg@chromium.org>
> >
> > nits below
> >
> > >
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > index 59e031de04..40d3f66acb 100644
> > > --- a/arch/arm/Kconfig
> > > +++ b/arch/arm/Kconfig
> > > @@ -938,6 +938,9 @@ config ARCH_APPLE
> > > select OF_BOARD
> > > select PINCTRL
> > > select POSITION_INDEPENDENT
> > > + select POWER_DOMAIN
> > > + select REGMAP
> > > + select SYSCON
> > > select SYSRESET
> > > select SYSRESET_WATCHDOG
> > > select SYSRESET_WATCHDOG_AUTO
> > > diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> > > index 99b3f9ae71..6ef7a3b3a7 100644
> > > --- a/drivers/power/domain/Kconfig
> > > +++ b/drivers/power/domain/Kconfig
> > > @@ -9,6 +9,14 @@ config POWER_DOMAIN
> > > domains). This may be used to save power. This API provides the
> > > means to control such power management hardware.
> > >
> > > +config APPLE_PMGR_POWER_DOMAIN
> > > + bool "Enable the Apple PMGR power domain driver"
> > > + depends on POWER_DOMAIN
> > > + default y if ARCH_APPLE
> > > + help
> > > + Enable support for manipulating the Apple M1 power domains via
> > > + MMIO mapped registers.
> >
> > Needs more detail here, perhaps a pointer to docs, or something about
> > what the driver supports.
>
> Struggling to come up with more. The "via MMIO mapped registers" is
> already a bit silly. There are no docs. And the one line already
> indicates what the driver supports. Do you want me to add a sentence
> that says the same thing but in different words?
What is PMGR?
What power domains does the driver support? All of them or just a subset?
>
> > > +
> > > config BCM6328_POWER_DOMAIN
> > > bool "Enable the BCM6328 power domain driver"
> > > depends on POWER_DOMAIN && ARCH_BMIPS
> > > diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> > > index 3d1e5f073c..530ae35671 100644
> > > --- a/drivers/power/domain/Makefile
> > > +++ b/drivers/power/domain/Makefile
> > > @@ -4,6 +4,7 @@
> > > #
> > >
> > > obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> > > +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> > > obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> > > obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> > > obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> > > diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> > > new file mode 100644
> > > index 0000000000..08a30c8ebf
> > > --- /dev/null
> > > +++ b/drivers/power/domain/apple-pmgr.c
> > > @@ -0,0 +1,113 @@
> > > +// SPDX-License-Identifier: GPL-2.0+
> > > +/*
> > > + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> > > + */
> > > +
> > > +#include <common.h>
> > > +#include <asm/io.h>
> > > +#include <dm.h>
> > > +#include <linux/err.h>
> > > +#include <linux/bitfield.h>
> > > +#include <power-domain-uclass.h>
> > > +#include <regmap.h>
> > > +#include <syscon.h>
> > > +
> > > +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> > > +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> > > +
> > > +#define APPLE_PMGR_PS_ACTIVE 0xf
> > > +#define APPLE_PMGR_PS_PWRGATE 0x0
> > > +
> > > +#define APPLE_PMGR_PS_SET_TIMEOUT 100
> >
> > TIMEOUT_MS ?
> > _US ?
>
> _US
>
> > > +
> > > +struct apple_pmgr_priv {
> > > + struct regmap *regmap;
> > > + u32 offset;
> >
> > Needs comment for struct
>
> Really? I mean, I can add a "Device private data" comment, but that's
> pretty much implied by the _priv and the vast majority of the drivers
> don't do such a thing.
What is offset?
>
> >
> > > +};
> > > +
> > > +static int apple_pmgr_request(struct power_domain *power_domain)
> > > +{
> > > + return 0;
> > > +}
> > > +
> > > +static int apple_pmgr_rfree(struct power_domain *power_domain)
> > > +{
> > > + return 0;
> > > +}
> > > +
> > > +static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> > > +{
> > > + struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> > > + uint reg;
> > > +
> > > + regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
> > > + FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
> > > +
> > > + return regmap_read_poll_timeout(
> > > + priv->regmap, priv->offset, reg,
> > > + (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
> > > + APPLE_PMGR_PS_SET_TIMEOUT);
> > > +}
> > > +
> > > +static int apple_pmgr_on(struct power_domain *power_domain)
> > > +{
> > > + return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> > > +}
> > > +
> > > +static int apple_pmgr_off(struct power_domain *power_domain)
> > > +{
> > > + return 0;
> > > +}
> > > +
> > > +static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> > > + struct ofnode_phandle_args *args)
> > > +{
> > > + if (args->args_count != 0) {
> >
> > s/ != 0//
>
> != 0 seems better here since that is the value we're checking for.
It can't be negative though.
[..]
Regards,
Simon
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-29 13:36 ` Simon Glass
@ 2021-12-29 15:00 ` Mark Kettenis
2021-12-30 6:03 ` Simon Glass
0 siblings, 1 reply; 14+ messages in thread
From: Mark Kettenis @ 2021-12-29 15:00 UTC (permalink / raw)
To: Simon Glass; +Cc: kettenis, u-boot, jh80.chung
> From: Simon Glass <sjg@chromium.org>
> Date: Wed, 29 Dec 2021 06:36:24 -0700
>
> Hi Mark,
>
> On Tue, 28 Dec 2021 at 07:27, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
> >
> > > From: Simon Glass <sjg@chromium.org>
> > > Date: Tue, 28 Dec 2021 01:34:16 -0700
> > >
> > > Hi Mark,
> > >
> > > On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
> > > >
> > > > This driver supports power domains for the power management
> > > > controller found on Apple SoCs.
> > > >
> > > > Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> > > > ---
> > > > arch/arm/Kconfig | 3 +
> > > > drivers/power/domain/Kconfig | 8 +++
> > > > drivers/power/domain/Makefile | 1 +
> > > > drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> > > > 4 files changed, 125 insertions(+)
> > > > create mode 100644 drivers/power/domain/apple-pmgr.c
> > >
> > > Reviewed-by: Simon Glass <sjg@chromium.org>
> > >
> > > nits below
> > >
> > > >
> > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > > index 59e031de04..40d3f66acb 100644
> > > > --- a/arch/arm/Kconfig
> > > > +++ b/arch/arm/Kconfig
> > > > @@ -938,6 +938,9 @@ config ARCH_APPLE
> > > > select OF_BOARD
> > > > select PINCTRL
> > > > select POSITION_INDEPENDENT
> > > > + select POWER_DOMAIN
> > > > + select REGMAP
> > > > + select SYSCON
> > > > select SYSRESET
> > > > select SYSRESET_WATCHDOG
> > > > select SYSRESET_WATCHDOG_AUTO
> > > > diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> > > > index 99b3f9ae71..6ef7a3b3a7 100644
> > > > --- a/drivers/power/domain/Kconfig
> > > > +++ b/drivers/power/domain/Kconfig
> > > > @@ -9,6 +9,14 @@ config POWER_DOMAIN
> > > > domains). This may be used to save power. This API provides the
> > > > means to control such power management hardware.
> > > >
> > > > +config APPLE_PMGR_POWER_DOMAIN
> > > > + bool "Enable the Apple PMGR power domain driver"
> > > > + depends on POWER_DOMAIN
> > > > + default y if ARCH_APPLE
> > > > + help
> > > > + Enable support for manipulating the Apple M1 power domains via
> > > > + MMIO mapped registers.
> > >
> > > Needs more detail here, perhaps a pointer to docs, or something about
> > > what the driver supports.
> >
> > Struggling to come up with more. The "via MMIO mapped registers" is
> > already a bit silly. There are no docs. And the one line already
> > indicates what the driver supports. Do you want me to add a sentence
> > that says the same thing but in different words?
>
> What is PMGR?
Power ManaGeR? Who knows? It is wat Apple seems to call this thing.
> What power domains does the driver support? All of them or just a subset?
Again, we don't know. It supports the power domains we know about.
This is revers-engineered and most of the naming comes from hints
dropped by Apple in their version of the device tree and/or the macOS
driver names. The more we say here, the more likely it is wrong.
> > > > +
> > > > config BCM6328_POWER_DOMAIN
> > > > bool "Enable the BCM6328 power domain driver"
> > > > depends on POWER_DOMAIN && ARCH_BMIPS
> > > > diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> > > > index 3d1e5f073c..530ae35671 100644
> > > > --- a/drivers/power/domain/Makefile
> > > > +++ b/drivers/power/domain/Makefile
> > > > @@ -4,6 +4,7 @@
> > > > #
> > > >
> > > > obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> > > > +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> > > > obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> > > > obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> > > > obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> > > > diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> > > > new file mode 100644
> > > > index 0000000000..08a30c8ebf
> > > > --- /dev/null
> > > > +++ b/drivers/power/domain/apple-pmgr.c
> > > > @@ -0,0 +1,113 @@
> > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > +/*
> > > > + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> > > > + */
> > > > +
> > > > +#include <common.h>
> > > > +#include <asm/io.h>
> > > > +#include <dm.h>
> > > > +#include <linux/err.h>
> > > > +#include <linux/bitfield.h>
> > > > +#include <power-domain-uclass.h>
> > > > +#include <regmap.h>
> > > > +#include <syscon.h>
> > > > +
> > > > +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> > > > +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> > > > +
> > > > +#define APPLE_PMGR_PS_ACTIVE 0xf
> > > > +#define APPLE_PMGR_PS_PWRGATE 0x0
> > > > +
> > > > +#define APPLE_PMGR_PS_SET_TIMEOUT 100
> > >
> > > TIMEOUT_MS ?
> > > _US ?
> >
> > _US
> >
> > > > +
> > > > +struct apple_pmgr_priv {
> > > > + struct regmap *regmap;
> > > > + u32 offset;
> > >
> > > Needs comment for struct
> >
> > Really? I mean, I can add a "Device private data" comment, but that's
> > pretty much implied by the _priv and the vast majority of the drivers
> > don't do such a thing.
>
> What is offset?
The offset into the register map for this particular power domain.
Adding a comment feels like stating the obvious to me. But if you
feel it needs one, I can add it.
> > > > +};
> > > > +
> > > > +static int apple_pmgr_request(struct power_domain *power_domain)
> > > > +{
> > > > + return 0;
> > > > +}
> > > > +
> > > > +static int apple_pmgr_rfree(struct power_domain *power_domain)
> > > > +{
> > > > + return 0;
> > > > +}
> > > > +
> > > > +static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> > > > +{
> > > > + struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> > > > + uint reg;
> > > > +
> > > > + regmap_update_bits(priv->regmap, priv->offset, APPLE_PMGR_PS_TARGET,
> > > > + FIELD_PREP(APPLE_PMGR_PS_TARGET, pstate));
> > > > +
> > > > + return regmap_read_poll_timeout(
> > > > + priv->regmap, priv->offset, reg,
> > > > + (FIELD_GET(APPLE_PMGR_PS_ACTUAL, reg) == pstate), 1,
> > > > + APPLE_PMGR_PS_SET_TIMEOUT);
> > > > +}
> > > > +
> > > > +static int apple_pmgr_on(struct power_domain *power_domain)
> > > > +{
> > > > + return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> > > > +}
> > > > +
> > > > +static int apple_pmgr_off(struct power_domain *power_domain)
> > > > +{
> > > > + return 0;
> > > > +}
> > > > +
> > > > +static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> > > > + struct ofnode_phandle_args *args)
> > > > +{
> > > > + if (args->args_count != 0) {
> > >
> > > s/ != 0//
> >
> > != 0 seems better here since that is the value we're checking for.
>
> It can't be negative though.
>
> [..]
>
> Regards,
> Simon
>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 3/3] power: domain: Add Apple pmgr driver
2021-12-29 15:00 ` Mark Kettenis
@ 2021-12-30 6:03 ` Simon Glass
0 siblings, 0 replies; 14+ messages in thread
From: Simon Glass @ 2021-12-30 6:03 UTC (permalink / raw)
To: Mark Kettenis; +Cc: Mark Kettenis, U-Boot Mailing List, Jaehoon Chung
Hi Mark,
On Wed, 29 Dec 2021 at 08:00, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
>
> > From: Simon Glass <sjg@chromium.org>
> > Date: Wed, 29 Dec 2021 06:36:24 -0700
> >
> > Hi Mark,
> >
> > On Tue, 28 Dec 2021 at 07:27, Mark Kettenis <mark.kettenis@xs4all.nl> wrote:
> > >
> > > > From: Simon Glass <sjg@chromium.org>
> > > > Date: Tue, 28 Dec 2021 01:34:16 -0700
> > > >
> > > > Hi Mark,
> > > >
> > > > On Thu, 23 Dec 2021 at 14:35, Mark Kettenis <kettenis@openbsd.org> wrote:
> > > > >
> > > > > This driver supports power domains for the power management
> > > > > controller found on Apple SoCs.
> > > > >
> > > > > Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
> > > > > ---
> > > > > arch/arm/Kconfig | 3 +
> > > > > drivers/power/domain/Kconfig | 8 +++
> > > > > drivers/power/domain/Makefile | 1 +
> > > > > drivers/power/domain/apple-pmgr.c | 113 ++++++++++++++++++++++++++++++
> > > > > 4 files changed, 125 insertions(+)
> > > > > create mode 100644 drivers/power/domain/apple-pmgr.c
> > > >
> > > > Reviewed-by: Simon Glass <sjg@chromium.org>
> > > >
> > > > nits below
> > > >
> > > > >
> > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > > > index 59e031de04..40d3f66acb 100644
> > > > > --- a/arch/arm/Kconfig
> > > > > +++ b/arch/arm/Kconfig
> > > > > @@ -938,6 +938,9 @@ config ARCH_APPLE
> > > > > select OF_BOARD
> > > > > select PINCTRL
> > > > > select POSITION_INDEPENDENT
> > > > > + select POWER_DOMAIN
> > > > > + select REGMAP
> > > > > + select SYSCON
> > > > > select SYSRESET
> > > > > select SYSRESET_WATCHDOG
> > > > > select SYSRESET_WATCHDOG_AUTO
> > > > > diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> > > > > index 99b3f9ae71..6ef7a3b3a7 100644
> > > > > --- a/drivers/power/domain/Kconfig
> > > > > +++ b/drivers/power/domain/Kconfig
> > > > > @@ -9,6 +9,14 @@ config POWER_DOMAIN
> > > > > domains). This may be used to save power. This API provides the
> > > > > means to control such power management hardware.
> > > > >
> > > > > +config APPLE_PMGR_POWER_DOMAIN
> > > > > + bool "Enable the Apple PMGR power domain driver"
> > > > > + depends on POWER_DOMAIN
> > > > > + default y if ARCH_APPLE
> > > > > + help
> > > > > + Enable support for manipulating the Apple M1 power domains via
> > > > > + MMIO mapped registers.
> > > >
> > > > Needs more detail here, perhaps a pointer to docs, or something about
> > > > what the driver supports.
> > >
> > > Struggling to come up with more. The "via MMIO mapped registers" is
> > > already a bit silly. There are no docs. And the one line already
> > > indicates what the driver supports. Do you want me to add a sentence
> > > that says the same thing but in different words?
> >
> > What is PMGR?
>
> Power ManaGeR? Who knows? It is wat Apple seems to call this thing.
>
> > What power domains does the driver support? All of them or just a subset?
>
> Again, we don't know. It supports the power domains we know about.
>
> This is revers-engineered and most of the naming comes from hints
> dropped by Apple in their version of the device tree and/or the macOS
> driver names. The more we say here, the more likely it is wrong.
>
> > > > > +
> > > > > config BCM6328_POWER_DOMAIN
> > > > > bool "Enable the BCM6328 power domain driver"
> > > > > depends on POWER_DOMAIN && ARCH_BMIPS
> > > > > diff --git a/drivers/power/domain/Makefile b/drivers/power/domain/Makefile
> > > > > index 3d1e5f073c..530ae35671 100644
> > > > > --- a/drivers/power/domain/Makefile
> > > > > +++ b/drivers/power/domain/Makefile
> > > > > @@ -4,6 +4,7 @@
> > > > > #
> > > > >
> > > > > obj-$(CONFIG_$(SPL_)POWER_DOMAIN) += power-domain-uclass.o
> > > > > +obj-$(CONFIG_APPLE_PMGR_POWER_DOMAIN) += apple-pmgr.o
> > > > > obj-$(CONFIG_BCM6328_POWER_DOMAIN) += bcm6328-power-domain.o
> > > > > obj-$(CONFIG_IMX8_POWER_DOMAIN) += imx8-power-domain-legacy.o imx8-power-domain.o
> > > > > obj-$(CONFIG_IMX8M_POWER_DOMAIN) += imx8m-power-domain.o
> > > > > diff --git a/drivers/power/domain/apple-pmgr.c b/drivers/power/domain/apple-pmgr.c
> > > > > new file mode 100644
> > > > > index 0000000000..08a30c8ebf
> > > > > --- /dev/null
> > > > > +++ b/drivers/power/domain/apple-pmgr.c
> > > > > @@ -0,0 +1,113 @@
> > > > > +// SPDX-License-Identifier: GPL-2.0+
> > > > > +/*
> > > > > + * Copyright (C) 2021 Mark Kettenis <kettenis@openbsd.org>
> > > > > + */
> > > > > +
> > > > > +#include <common.h>
> > > > > +#include <asm/io.h>
> > > > > +#include <dm.h>
> > > > > +#include <linux/err.h>
> > > > > +#include <linux/bitfield.h>
> > > > > +#include <power-domain-uclass.h>
> > > > > +#include <regmap.h>
> > > > > +#include <syscon.h>
> > > > > +
> > > > > +#define APPLE_PMGR_PS_TARGET GENMASK(3, 0)
> > > > > +#define APPLE_PMGR_PS_ACTUAL GENMASK(7, 4)
> > > > > +
> > > > > +#define APPLE_PMGR_PS_ACTIVE 0xf
> > > > > +#define APPLE_PMGR_PS_PWRGATE 0x0
> > > > > +
> > > > > +#define APPLE_PMGR_PS_SET_TIMEOUT 100
> > > >
> > > > TIMEOUT_MS ?
> > > > _US ?
> > >
> > > _US
> > >
> > > > > +
> > > > > +struct apple_pmgr_priv {
> > > > > + struct regmap *regmap;
> > > > > + u32 offset;
> > > >
> > > > Needs comment for struct
> > >
> > > Really? I mean, I can add a "Device private data" comment, but that's
> > > pretty much implied by the _priv and the vast majority of the drivers
> > > don't do such a thing.
> >
> > What is offset?
>
> The offset into the register map for this particular power domain.
> Adding a comment feels like stating the obvious to me. But if you
> feel it needs one, I can add it.
Yes please.
Re the other things, just do your best. We often have docs problems,
so Apple is not unique here.
Regards,
Simon
^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2021-12-30 6:03 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-23 21:34 [PATCH v2 0/3] Apple M1 power management controller support Mark Kettenis
2021-12-23 21:34 ` [PATCH v2 1/3] arm: dts: apple: Update Apple M1 device trees Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
2021-12-23 21:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot,dm-pre-reloc properties Mark Kettenis
2021-12-27 12:20 ` Jaehoon Chung
2021-12-28 8:34 ` [PATCH v2 2/3] arm: dts: apple: Add u-boot, dm-pre-reloc properties Simon Glass
2021-12-23 21:34 ` [PATCH v2 3/3] power: domain: Add Apple pmgr driver Mark Kettenis
2021-12-27 12:21 ` Jaehoon Chung
2021-12-28 8:34 ` Simon Glass
2021-12-28 14:27 ` Mark Kettenis
2021-12-29 13:36 ` Simon Glass
2021-12-29 15:00 ` Mark Kettenis
2021-12-30 6:03 ` Simon Glass
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