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From: Apurva Nandan <a-nandan@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>, Apurva Nandan <a-nandan@ti.com>,
	Patrice Chotard <patrice.chotard@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Daniel Palmer <daniel@0x0f.com>,
	Alexander Lobakin <alobakin@pm.me>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: <p.yadav@ti.com>
Subject: [PATCH v3 04/17] mtd: spinand: Rename 'op_templates' to 'data_ops'
Date: Sat, 1 Jan 2022 13:12:37 +0530	[thread overview]
Message-ID: <20220101074250.14443-5-a-nandan@ti.com> (raw)
In-Reply-To: <20220101074250.14443-1-a-nandan@ti.com>

Manufacturers have been deviating from the standard SPI operations for
NAND flashes. There have been variations in non-page read/write
instructions too. Additionally, operations, including non-page r/w ops,
vary when flash is in different SPI mode, eg. Octal DTR.

To avoid live-patching in hot-paths or vendor-specific adjustment,
it is better to have a set of operation templates and variants for
non-page read/write operations as well. These would get initialized at
the probe time or when flash changes modes. These would be called
'ctrl_ops'.

To make code better understandable, create two types of op templates
which are: data_ops and ctrl_ops. Reason for having two different type
of templates is the difference in their use cases i.e. it is possible
to have ops of different protocol for read/write/update simulatneously
in the data_ops, but all the ops in the ctrl_ops follow same protocol.

Rename op_templates to data_ops, and the ctrl_ops would be introduced
in later commits.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
 drivers/mtd/nand/spi/core.c | 32 ++++++++++++++++----------------
 include/linux/mtd/spinand.h | 26 +++++++++++++-------------
 2 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 7d8c2873ab29..481516c9db79 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -184,9 +184,9 @@ static int spinand_init_quad_enable(struct spinand_device *spinand)
 	if (!(spinand->flags & SPINAND_HAS_QE_BIT))
 		return 0;
 
-	if (spinand->op_templates.read_cache->data.buswidth == 4 ||
-	    spinand->op_templates.write_cache->data.buswidth == 4 ||
-	    spinand->op_templates.update_cache->data.buswidth == 4)
+	if (spinand->data_ops.read_cache->data.buswidth == 4 ||
+	    spinand->data_ops.write_cache->data.buswidth == 4 ||
+	    spinand->data_ops.update_cache->data.buswidth == 4)
 		enable = true;
 
 	return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
@@ -849,7 +849,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 	/* The plane number is passed in MSB just above the column address */
 	info.offset = plane << fls(nand->memorg.pagesize);
 
-	info.op_tmpl = *spinand->op_templates.update_cache;
+	info.op_tmpl = *spinand->data_ops.update_cache;
 	desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
 					  spinand->spimem, &info);
 	if (IS_ERR(desc))
@@ -857,7 +857,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 
 	spinand->dirmaps[plane].wdesc = desc;
 
-	info.op_tmpl = *spinand->op_templates.read_cache;
+	info.op_tmpl = *spinand->data_ops.read_cache;
 	desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
 					  spinand->spimem, &info);
 	if (IS_ERR(desc))
@@ -976,8 +976,8 @@ static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
 }
 
 static const struct spi_mem_op *
-spinand_select_op_variant(struct spinand_device *spinand,
-			  const struct spinand_op_variants *variants)
+spinand_select_data_op_variant(struct spinand_device *spinand,
+			       const struct spinand_op_variants *variants)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	unsigned int i;
@@ -1050,23 +1050,23 @@ int spinand_match_and_init(struct spinand_device *spinand,
 		spinand->id.len = 1 + table[i].devid.len;
 		spinand->select_target = table[i].select_target;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.read_cache);
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.read_cache);
 		if (!op)
 			return -ENOTSUPP;
 
-		spinand->op_templates.read_cache = op;
+		spinand->data_ops.read_cache = op;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.write_cache);
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.write_cache);
 		if (!op)
 			return -ENOTSUPP;
 
-		spinand->op_templates.write_cache = op;
+		spinand->data_ops.write_cache = op;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.update_cache);
-		spinand->op_templates.update_cache = op;
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.update_cache);
+		spinand->data_ops.update_cache = op;
 
 		return 0;
 	}
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 77927afcea0f..439d8ce40e1d 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -391,10 +391,10 @@ struct spinand_ondie_ecc_conf {
  * @memorg: memory organization
  * @eccreq: ECC requirements
  * @eccinfo: on-die ECC info
- * @op_variants: operations variants
- * @op_variants.read_cache: variants of the read-cache operation
- * @op_variants.write_cache: variants of the write-cache operation
- * @op_variants.update_cache: variants of the update-cache operation
+ * @data_ops_variants: operations variants for page read/writes
+ * @data_ops_variants.read_cache: variants of the read-cache operation
+ * @data_ops_variants.write_cache: variants of the write-cache operation
+ * @data_ops_variants.update_cache: variants of the update-cache operation
  * @select_target: function used to select a target/die. Required only for
  *		   multi-die chips
  *
@@ -412,7 +412,7 @@ struct spinand_info {
 		const struct spinand_op_variants *read_cache;
 		const struct spinand_op_variants *write_cache;
 		const struct spinand_op_variants *update_cache;
-	} op_variants;
+	} data_ops_variants;
 	int (*select_target)(struct spinand_device *spinand,
 			     unsigned int target);
 };
@@ -440,14 +440,14 @@ struct spinand_info {
 #define SPINAND_SELECT_TARGET(__func)					\
 	.select_target = __func,
 
-#define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants,	\
-		     __flags, ...)					\
+#define SPINAND_INFO(__model, __id, __memorg, __eccreq,			\
+		     __data_ops_variants, __flags, ...)			\
 	{								\
 		.model = __model,					\
 		.devid = __id,						\
 		.memorg = __memorg,					\
 		.eccreq = __eccreq,					\
-		.op_variants = __op_variants,				\
+		.data_ops_variants = __data_ops_variants,		\
 		.flags = __flags,					\
 		__VA_ARGS__						\
 	}
@@ -464,10 +464,10 @@ struct spinand_dirmap {
  * @lock: lock used to serialize accesses to the NAND
  * @id: NAND ID as returned by READ_ID
  * @flags: NAND flags
- * @op_templates: various SPI mem op templates
- * @op_templates.read_cache: read cache op template
- * @op_templates.write_cache: write cache op template
- * @op_templates.update_cache: update cache op template
+ * @data_ops: various SPI mem op templates for reading and writing on pages
+ * @data_ops.read_cache: read cache op template
+ * @data_ops.write_cache: write cache op template
+ * @data_ops.update_cache: update cache op template
  * @select_target: select a specific target/die. Usually called before sending
  *		   a command addressing a page or an eraseblock embedded in
  *		   this die. Only required if your chip exposes several dies
@@ -496,7 +496,7 @@ struct spinand_device {
 		const struct spi_mem_op *read_cache;
 		const struct spi_mem_op *write_cache;
 		const struct spi_mem_op *update_cache;
-	} op_templates;
+	} data_ops;
 
 	struct spinand_dirmap *dirmaps;
 
-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Apurva Nandan <a-nandan@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>, Apurva Nandan <a-nandan@ti.com>,
	Patrice Chotard <patrice.chotard@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	Daniel Palmer <daniel@0x0f.com>,
	Alexander Lobakin <alobakin@pm.me>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: <p.yadav@ti.com>
Subject: [PATCH v3 04/17] mtd: spinand: Rename 'op_templates' to 'data_ops'
Date: Sat, 1 Jan 2022 13:12:37 +0530	[thread overview]
Message-ID: <20220101074250.14443-5-a-nandan@ti.com> (raw)
In-Reply-To: <20220101074250.14443-1-a-nandan@ti.com>

Manufacturers have been deviating from the standard SPI operations for
NAND flashes. There have been variations in non-page read/write
instructions too. Additionally, operations, including non-page r/w ops,
vary when flash is in different SPI mode, eg. Octal DTR.

To avoid live-patching in hot-paths or vendor-specific adjustment,
it is better to have a set of operation templates and variants for
non-page read/write operations as well. These would get initialized at
the probe time or when flash changes modes. These would be called
'ctrl_ops'.

To make code better understandable, create two types of op templates
which are: data_ops and ctrl_ops. Reason for having two different type
of templates is the difference in their use cases i.e. it is possible
to have ops of different protocol for read/write/update simulatneously
in the data_ops, but all the ops in the ctrl_ops follow same protocol.

Rename op_templates to data_ops, and the ctrl_ops would be introduced
in later commits.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
 drivers/mtd/nand/spi/core.c | 32 ++++++++++++++++----------------
 include/linux/mtd/spinand.h | 26 +++++++++++++-------------
 2 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index 7d8c2873ab29..481516c9db79 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -184,9 +184,9 @@ static int spinand_init_quad_enable(struct spinand_device *spinand)
 	if (!(spinand->flags & SPINAND_HAS_QE_BIT))
 		return 0;
 
-	if (spinand->op_templates.read_cache->data.buswidth == 4 ||
-	    spinand->op_templates.write_cache->data.buswidth == 4 ||
-	    spinand->op_templates.update_cache->data.buswidth == 4)
+	if (spinand->data_ops.read_cache->data.buswidth == 4 ||
+	    spinand->data_ops.write_cache->data.buswidth == 4 ||
+	    spinand->data_ops.update_cache->data.buswidth == 4)
 		enable = true;
 
 	return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
@@ -849,7 +849,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 	/* The plane number is passed in MSB just above the column address */
 	info.offset = plane << fls(nand->memorg.pagesize);
 
-	info.op_tmpl = *spinand->op_templates.update_cache;
+	info.op_tmpl = *spinand->data_ops.update_cache;
 	desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
 					  spinand->spimem, &info);
 	if (IS_ERR(desc))
@@ -857,7 +857,7 @@ static int spinand_create_dirmap(struct spinand_device *spinand,
 
 	spinand->dirmaps[plane].wdesc = desc;
 
-	info.op_tmpl = *spinand->op_templates.read_cache;
+	info.op_tmpl = *spinand->data_ops.read_cache;
 	desc = devm_spi_mem_dirmap_create(&spinand->spimem->spi->dev,
 					  spinand->spimem, &info);
 	if (IS_ERR(desc))
@@ -976,8 +976,8 @@ static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
 }
 
 static const struct spi_mem_op *
-spinand_select_op_variant(struct spinand_device *spinand,
-			  const struct spinand_op_variants *variants)
+spinand_select_data_op_variant(struct spinand_device *spinand,
+			       const struct spinand_op_variants *variants)
 {
 	struct nand_device *nand = spinand_to_nand(spinand);
 	unsigned int i;
@@ -1050,23 +1050,23 @@ int spinand_match_and_init(struct spinand_device *spinand,
 		spinand->id.len = 1 + table[i].devid.len;
 		spinand->select_target = table[i].select_target;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.read_cache);
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.read_cache);
 		if (!op)
 			return -ENOTSUPP;
 
-		spinand->op_templates.read_cache = op;
+		spinand->data_ops.read_cache = op;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.write_cache);
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.write_cache);
 		if (!op)
 			return -ENOTSUPP;
 
-		spinand->op_templates.write_cache = op;
+		spinand->data_ops.write_cache = op;
 
-		op = spinand_select_op_variant(spinand,
-					       info->op_variants.update_cache);
-		spinand->op_templates.update_cache = op;
+		op = spinand_select_data_op_variant(spinand,
+					info->data_ops_variants.update_cache);
+		spinand->data_ops.update_cache = op;
 
 		return 0;
 	}
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 77927afcea0f..439d8ce40e1d 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -391,10 +391,10 @@ struct spinand_ondie_ecc_conf {
  * @memorg: memory organization
  * @eccreq: ECC requirements
  * @eccinfo: on-die ECC info
- * @op_variants: operations variants
- * @op_variants.read_cache: variants of the read-cache operation
- * @op_variants.write_cache: variants of the write-cache operation
- * @op_variants.update_cache: variants of the update-cache operation
+ * @data_ops_variants: operations variants for page read/writes
+ * @data_ops_variants.read_cache: variants of the read-cache operation
+ * @data_ops_variants.write_cache: variants of the write-cache operation
+ * @data_ops_variants.update_cache: variants of the update-cache operation
  * @select_target: function used to select a target/die. Required only for
  *		   multi-die chips
  *
@@ -412,7 +412,7 @@ struct spinand_info {
 		const struct spinand_op_variants *read_cache;
 		const struct spinand_op_variants *write_cache;
 		const struct spinand_op_variants *update_cache;
-	} op_variants;
+	} data_ops_variants;
 	int (*select_target)(struct spinand_device *spinand,
 			     unsigned int target);
 };
@@ -440,14 +440,14 @@ struct spinand_info {
 #define SPINAND_SELECT_TARGET(__func)					\
 	.select_target = __func,
 
-#define SPINAND_INFO(__model, __id, __memorg, __eccreq, __op_variants,	\
-		     __flags, ...)					\
+#define SPINAND_INFO(__model, __id, __memorg, __eccreq,			\
+		     __data_ops_variants, __flags, ...)			\
 	{								\
 		.model = __model,					\
 		.devid = __id,						\
 		.memorg = __memorg,					\
 		.eccreq = __eccreq,					\
-		.op_variants = __op_variants,				\
+		.data_ops_variants = __data_ops_variants,		\
 		.flags = __flags,					\
 		__VA_ARGS__						\
 	}
@@ -464,10 +464,10 @@ struct spinand_dirmap {
  * @lock: lock used to serialize accesses to the NAND
  * @id: NAND ID as returned by READ_ID
  * @flags: NAND flags
- * @op_templates: various SPI mem op templates
- * @op_templates.read_cache: read cache op template
- * @op_templates.write_cache: write cache op template
- * @op_templates.update_cache: update cache op template
+ * @data_ops: various SPI mem op templates for reading and writing on pages
+ * @data_ops.read_cache: read cache op template
+ * @data_ops.write_cache: write cache op template
+ * @data_ops.update_cache: update cache op template
  * @select_target: select a specific target/die. Usually called before sending
  *		   a command addressing a page or an eraseblock embedded in
  *		   this die. Only required if your chip exposes several dies
@@ -496,7 +496,7 @@ struct spinand_device {
 		const struct spi_mem_op *read_cache;
 		const struct spi_mem_op *write_cache;
 		const struct spi_mem_op *update_cache;
-	} op_templates;
+	} data_ops;
 
 	struct spinand_dirmap *dirmaps;
 
-- 
2.25.1


______________________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2022-01-01  7:44 UTC|newest]

Thread overview: 76+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-01  7:42 [PATCH v3 00/17] mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support Apurva Nandan
2022-01-01  7:42 ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 01/17] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-04 14:52   ` Mark Brown
2022-01-04 14:52     ` Mark Brown
2022-01-04 15:31   ` Boris Brezillon
2022-01-04 15:31     ` Boris Brezillon
2022-01-05  5:50     ` Pratyush Yadav
2022-01-05  5:50       ` Pratyush Yadav
2022-01-05  7:36       ` Boris Brezillon
2022-01-05  7:36         ` Boris Brezillon
2022-01-05  8:24     ` Tudor.Ambarus
2022-01-05  8:24       ` Tudor.Ambarus
2022-01-01  7:42 ` [PATCH v3 02/17] mtd: spinand: Define macros for Octal DTR ops Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 03/17] mtd: spinand: Add enum spinand_protocol to indicate current SPI IO mode Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-03 10:05   ` Boris Brezillon
2022-01-03 10:05     ` Boris Brezillon
2022-01-01  7:42 ` Apurva Nandan [this message]
2022-01-01  7:42   ` [PATCH v3 04/17] mtd: spinand: Rename 'op_templates' to 'data_ops' Apurva Nandan
2022-01-03  9:48   ` Boris Brezillon
2022-01-03  9:48     ` Boris Brezillon
2022-01-01  7:42 ` [PATCH v3 05/17] mtd: spinand: Define ctrl_ops for non-page read/write op templates Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-03 10:01   ` Boris Brezillon
2022-01-03 10:01     ` Boris Brezillon
2022-01-03 10:36     ` Boris Brezillon
2022-01-03 10:36       ` Boris Brezillon
2022-02-15 15:33     ` Apurva Nandan
2022-02-15 15:33       ` Apurva Nandan
2022-02-15 17:37       ` Boris Brezillon
2022-02-15 17:37         ` Boris Brezillon
2022-03-02 15:30         ` Apurva Nandan
2022-03-02 15:30           ` Apurva Nandan
2022-03-02 20:05           ` Boris Brezillon
2022-03-02 20:05             ` Boris Brezillon
2022-03-10  7:57         ` Apurva Nandan
2022-03-10  7:57           ` Apurva Nandan
2022-03-10  8:40           ` Boris Brezillon
2022-03-10  8:40             ` Boris Brezillon
2022-03-14 11:47             ` Apurva Nandan
2022-03-14 11:47               ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 06/17] mtd: spinand: Define default ctrl_ops in the core Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 07/17] mtd: spinand: Switch from op macros usage to 'ctrl_ops' " Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 08/17] mtd: spinand: Add support for manufacturer-based ctrl_ops variations Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 09/17] mtd: spinand: Add change_mode() in manufacturer_ops Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-05  9:52   ` Boris Brezillon
2022-01-05  9:52     ` Boris Brezillon
2022-01-01  7:42 ` [PATCH v3 10/17] mtd: spinand: Add pointer to probed flash's spinand_info Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 11/17] mtd: spinand: Allow enabling/disabling Octal DTR mode in the core Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-03 10:14   ` Boris Brezillon
2022-01-03 10:14     ` Boris Brezillon
2022-01-01  7:42 ` [PATCH v3 12/17] mtd: spinand: Add mtd_suspend() to disable Octal DTR mode at suspend Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-03 10:17   ` Boris Brezillon
2022-01-03 10:17     ` Boris Brezillon
2022-01-01  7:42 ` [PATCH v3 13/17] mtd: spinand: winbond: Add support for write volatile configuration register op Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 14/17] mtd: spinand: winbond: Add octal_dtr_enable/disable() in manufacturer_ops Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 15/17] mtd: spianand: winbond: Add change_mode() manufacturer_ops Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-03 10:27   ` Boris Brezillon
2022-01-03 10:27     ` Boris Brezillon
2022-01-01  7:42 ` [PATCH v3 16/17] mtd: spinand: winbond: Rename cache op_variants struct variable Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan
2022-01-01  7:42 ` [PATCH v3 17/17] mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Apurva Nandan
2022-01-01  7:42   ` Apurva Nandan

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