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From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Will Deacon <will@kernel.org>, Andrew Jones <drjones@redhat.com>,
	Peng Liang <liangpeng10@huawei.com>,
	Peter Shier <pshier@google.com>,
	Ricardo Koller <ricarkol@google.com>,
	Oliver Upton <oupton@google.com>,
	Jing Zhang <jingzhangos@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	Reiji Watanabe <reijiw@google.com>
Subject: [RFC PATCH v4 12/26] KVM: arm64: Make MVFR1_EL1 writable
Date: Wed,  5 Jan 2022 20:26:54 -0800	[thread overview]
Message-ID: <20220106042708.2869332-13-reijiw@google.com> (raw)
In-Reply-To: <20220106042708.2869332-1-reijiw@google.com>

This patch adds id_reg_info for MVFR1_EL1 to make it writable
by userspace.

There are only a few valid combinations of values that can be set
for FPHP and SIMDHP fields according to Arm ARM.  Return an error
when userspace tries to set those fields to values that don't match
any of the valid combinations.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
 arch/arm64/kvm/sys_regs.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 1707c7832593..1c18a19c5785 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -617,6 +617,36 @@ static int validate_id_dfr0_el1(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+static int validate_mvfr1_el1(struct kvm_vcpu *vcpu,
+			      const struct id_reg_info *id_reg, u64 val)
+{
+	unsigned int fphp, simdhp;
+	struct fphp_simdhp {
+		unsigned int fphp;
+		unsigned int simdhp;
+	};
+	/* Permitted fphp/simdhp value combinations according to Arm ARM */
+	struct fphp_simdhp valid_fphp_simdhp[3] = {{0, 0}, {2, 1}, {3, 2}};
+	int i;
+	bool is_valid_fphp_simdhp = false;
+
+	fphp = cpuid_feature_extract_unsigned_field(val, MVFR1_FPHP_SHIFT);
+	simdhp = cpuid_feature_extract_unsigned_field(val, MVFR1_SIMDHP_SHIFT);
+
+	for (i = 0; i < ARRAY_SIZE(valid_fphp_simdhp); i++) {
+		if (valid_fphp_simdhp[i].fphp == fphp &&
+		    valid_fphp_simdhp[i].simdhp == simdhp) {
+			is_valid_fphp_simdhp = true;
+			break;
+		}
+	}
+
+	if (!is_valid_fphp_simdhp)
+		return -EINVAL;
+
+	return 0;
+}
+
 static void init_id_aa64pfr0_el1_info(struct id_reg_info *id_reg)
 {
 	u64 limit = id_reg->vcpu_limit_val;
@@ -774,6 +804,11 @@ static struct id_reg_info id_dfr0_el1_info = {
 	.vcpu_mask = vcpu_mask_id_dfr0_el1,
 };
 
+static struct id_reg_info mvfr1_el1_info = {
+	.sys_reg = SYS_MVFR1_EL1,
+	.validate = validate_mvfr1_el1,
+};
+
 /*
  * An ID register that needs special handling to control the value for the
  * guest must have its own id_reg_info in id_reg_info_table.
@@ -784,6 +819,7 @@ static struct id_reg_info id_dfr0_el1_info = {
 #define	GET_ID_REG_INFO(id)	(id_reg_info_table[IDREG_IDX(id)])
 static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = {
 	[IDREG_IDX(SYS_ID_DFR0_EL1)] = &id_dfr0_el1_info,
+	[IDREG_IDX(SYS_MVFR1_EL1)] = &mvfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] = &id_aa64pfr0_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR1_EL1)] = &id_aa64pfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] = &id_aa64dfr0_el1_info,
-- 
2.34.1.448.ga2b2bfdf31-goog


WARNING: multiple messages have this Message-ID (diff)
From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, Will Deacon <will@kernel.org>,
	Peter Shier <pshier@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v4 12/26] KVM: arm64: Make MVFR1_EL1 writable
Date: Wed,  5 Jan 2022 20:26:54 -0800	[thread overview]
Message-ID: <20220106042708.2869332-13-reijiw@google.com> (raw)
In-Reply-To: <20220106042708.2869332-1-reijiw@google.com>

This patch adds id_reg_info for MVFR1_EL1 to make it writable
by userspace.

There are only a few valid combinations of values that can be set
for FPHP and SIMDHP fields according to Arm ARM.  Return an error
when userspace tries to set those fields to values that don't match
any of the valid combinations.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
 arch/arm64/kvm/sys_regs.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 1707c7832593..1c18a19c5785 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -617,6 +617,36 @@ static int validate_id_dfr0_el1(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+static int validate_mvfr1_el1(struct kvm_vcpu *vcpu,
+			      const struct id_reg_info *id_reg, u64 val)
+{
+	unsigned int fphp, simdhp;
+	struct fphp_simdhp {
+		unsigned int fphp;
+		unsigned int simdhp;
+	};
+	/* Permitted fphp/simdhp value combinations according to Arm ARM */
+	struct fphp_simdhp valid_fphp_simdhp[3] = {{0, 0}, {2, 1}, {3, 2}};
+	int i;
+	bool is_valid_fphp_simdhp = false;
+
+	fphp = cpuid_feature_extract_unsigned_field(val, MVFR1_FPHP_SHIFT);
+	simdhp = cpuid_feature_extract_unsigned_field(val, MVFR1_SIMDHP_SHIFT);
+
+	for (i = 0; i < ARRAY_SIZE(valid_fphp_simdhp); i++) {
+		if (valid_fphp_simdhp[i].fphp == fphp &&
+		    valid_fphp_simdhp[i].simdhp == simdhp) {
+			is_valid_fphp_simdhp = true;
+			break;
+		}
+	}
+
+	if (!is_valid_fphp_simdhp)
+		return -EINVAL;
+
+	return 0;
+}
+
 static void init_id_aa64pfr0_el1_info(struct id_reg_info *id_reg)
 {
 	u64 limit = id_reg->vcpu_limit_val;
@@ -774,6 +804,11 @@ static struct id_reg_info id_dfr0_el1_info = {
 	.vcpu_mask = vcpu_mask_id_dfr0_el1,
 };
 
+static struct id_reg_info mvfr1_el1_info = {
+	.sys_reg = SYS_MVFR1_EL1,
+	.validate = validate_mvfr1_el1,
+};
+
 /*
  * An ID register that needs special handling to control the value for the
  * guest must have its own id_reg_info in id_reg_info_table.
@@ -784,6 +819,7 @@ static struct id_reg_info id_dfr0_el1_info = {
 #define	GET_ID_REG_INFO(id)	(id_reg_info_table[IDREG_IDX(id)])
 static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = {
 	[IDREG_IDX(SYS_ID_DFR0_EL1)] = &id_dfr0_el1_info,
+	[IDREG_IDX(SYS_MVFR1_EL1)] = &mvfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] = &id_aa64pfr0_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR1_EL1)] = &id_aa64pfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] = &id_aa64dfr0_el1_info,
-- 
2.34.1.448.ga2b2bfdf31-goog

_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Reiji Watanabe <reijiw@google.com>
To: Marc Zyngier <maz@kernel.org>, kvmarm@lists.cs.columbia.edu
Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	 James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Will Deacon <will@kernel.org>, Andrew Jones <drjones@redhat.com>,
	 Peng Liang <liangpeng10@huawei.com>,
	Peter Shier <pshier@google.com>,
	 Ricardo Koller <ricarkol@google.com>,
	Oliver Upton <oupton@google.com>,
	 Jing Zhang <jingzhangos@google.com>,
	Raghavendra Rao Anata <rananta@google.com>,
	Reiji Watanabe <reijiw@google.com>
Subject: [RFC PATCH v4 12/26] KVM: arm64: Make MVFR1_EL1 writable
Date: Wed,  5 Jan 2022 20:26:54 -0800	[thread overview]
Message-ID: <20220106042708.2869332-13-reijiw@google.com> (raw)
In-Reply-To: <20220106042708.2869332-1-reijiw@google.com>

This patch adds id_reg_info for MVFR1_EL1 to make it writable
by userspace.

There are only a few valid combinations of values that can be set
for FPHP and SIMDHP fields according to Arm ARM.  Return an error
when userspace tries to set those fields to values that don't match
any of the valid combinations.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
---
 arch/arm64/kvm/sys_regs.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 1707c7832593..1c18a19c5785 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -617,6 +617,36 @@ static int validate_id_dfr0_el1(struct kvm_vcpu *vcpu,
 	return 0;
 }
 
+static int validate_mvfr1_el1(struct kvm_vcpu *vcpu,
+			      const struct id_reg_info *id_reg, u64 val)
+{
+	unsigned int fphp, simdhp;
+	struct fphp_simdhp {
+		unsigned int fphp;
+		unsigned int simdhp;
+	};
+	/* Permitted fphp/simdhp value combinations according to Arm ARM */
+	struct fphp_simdhp valid_fphp_simdhp[3] = {{0, 0}, {2, 1}, {3, 2}};
+	int i;
+	bool is_valid_fphp_simdhp = false;
+
+	fphp = cpuid_feature_extract_unsigned_field(val, MVFR1_FPHP_SHIFT);
+	simdhp = cpuid_feature_extract_unsigned_field(val, MVFR1_SIMDHP_SHIFT);
+
+	for (i = 0; i < ARRAY_SIZE(valid_fphp_simdhp); i++) {
+		if (valid_fphp_simdhp[i].fphp == fphp &&
+		    valid_fphp_simdhp[i].simdhp == simdhp) {
+			is_valid_fphp_simdhp = true;
+			break;
+		}
+	}
+
+	if (!is_valid_fphp_simdhp)
+		return -EINVAL;
+
+	return 0;
+}
+
 static void init_id_aa64pfr0_el1_info(struct id_reg_info *id_reg)
 {
 	u64 limit = id_reg->vcpu_limit_val;
@@ -774,6 +804,11 @@ static struct id_reg_info id_dfr0_el1_info = {
 	.vcpu_mask = vcpu_mask_id_dfr0_el1,
 };
 
+static struct id_reg_info mvfr1_el1_info = {
+	.sys_reg = SYS_MVFR1_EL1,
+	.validate = validate_mvfr1_el1,
+};
+
 /*
  * An ID register that needs special handling to control the value for the
  * guest must have its own id_reg_info in id_reg_info_table.
@@ -784,6 +819,7 @@ static struct id_reg_info id_dfr0_el1_info = {
 #define	GET_ID_REG_INFO(id)	(id_reg_info_table[IDREG_IDX(id)])
 static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = {
 	[IDREG_IDX(SYS_ID_DFR0_EL1)] = &id_dfr0_el1_info,
+	[IDREG_IDX(SYS_MVFR1_EL1)] = &mvfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] = &id_aa64pfr0_el1_info,
 	[IDREG_IDX(SYS_ID_AA64PFR1_EL1)] = &id_aa64pfr1_el1_info,
 	[IDREG_IDX(SYS_ID_AA64DFR0_EL1)] = &id_aa64dfr0_el1_info,
-- 
2.34.1.448.ga2b2bfdf31-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-01-06  4:28 UTC|newest]

Thread overview: 201+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-06  4:26 [RFC PATCH v4 00/26] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2022-01-06  4:26 ` Reiji Watanabe
2022-01-06  4:26 ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 01/26] KVM: arm64: Introduce a validation function for an ID register Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-07  7:12   ` Reiji Watanabe
2022-01-07  7:12     ` Reiji Watanabe
2022-01-07  7:12     ` Reiji Watanabe
2022-01-24 16:20   ` Fuad Tabba
2022-01-24 16:20     ` Fuad Tabba
2022-01-24 16:20     ` Fuad Tabba
2022-01-26  6:04     ` Reiji Watanabe
2022-01-26  6:04       ` Reiji Watanabe
2022-01-26  6:04       ` Reiji Watanabe
2022-02-01 14:13       ` Fuad Tabba
2022-02-01 14:13         ` Fuad Tabba
2022-02-01 14:13         ` Fuad Tabba
2022-02-02  6:46         ` Reiji Watanabe
2022-02-02  6:46           ` Reiji Watanabe
2022-02-02  6:46           ` Reiji Watanabe
2022-01-26  4:30   ` Ricardo Koller
2022-01-26  4:30     ` Ricardo Koller
2022-01-26  4:30     ` Ricardo Koller
2022-01-28  6:01     ` Reiji Watanabe
2022-01-28  6:01       ` Reiji Watanabe
2022-01-28  6:01       ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 02/26] KVM: arm64: Save ID registers' sanitized value per guest Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-24 16:21   ` Fuad Tabba
2022-01-24 16:21     ` Fuad Tabba
2022-01-24 16:21     ` Fuad Tabba
2022-02-09  2:26     ` Reiji Watanabe
2022-02-09  2:26       ` Reiji Watanabe
2022-02-09  2:26       ` Reiji Watanabe
2022-01-26  5:22   ` Ricardo Koller
2022-01-26  5:22     ` Ricardo Koller
2022-01-26  5:22     ` Ricardo Koller
2022-01-28  6:24     ` Reiji Watanabe
2022-01-28  6:24       ` Reiji Watanabe
2022-01-28  6:24       ` Reiji Watanabe
2022-01-28 19:27       ` Ricardo Koller
2022-01-28 19:27         ` Ricardo Koller
2022-01-28 19:27         ` Ricardo Koller
2022-01-29  5:52         ` Reiji Watanabe
2022-01-29  5:52           ` Reiji Watanabe
2022-01-29  5:52           ` Reiji Watanabe
2022-01-31  3:40           ` Ricardo Koller
2022-01-31  3:40             ` Ricardo Koller
2022-01-31  3:40             ` Ricardo Koller
2022-02-01  6:00             ` Reiji Watanabe
2022-02-01  6:00               ` Reiji Watanabe
2022-02-01  6:00               ` Reiji Watanabe
2022-02-01 18:38               ` Ricardo Koller
2022-02-01 18:38                 ` Ricardo Koller
2022-02-01 18:38                 ` Ricardo Koller
2022-02-03  6:31                 ` Reiji Watanabe
2022-02-03  6:31                   ` Reiji Watanabe
2022-02-03  6:31                   ` Reiji Watanabe
2022-02-04 14:41                   ` Ricardo Koller
2022-02-04 14:41                     ` Ricardo Koller
2022-02-04 14:41                     ` Ricardo Koller
2022-01-06  4:26 ` [RFC PATCH v4 03/26] KVM: arm64: Introduce struct id_reg_info Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-24 16:28   ` Fuad Tabba
2022-01-24 16:28     ` Fuad Tabba
2022-01-24 16:28     ` Fuad Tabba
2022-01-26  6:46     ` Reiji Watanabe
2022-01-26  6:46       ` Reiji Watanabe
2022-01-26  6:46       ` Reiji Watanabe
2022-02-01 14:13       ` Fuad Tabba
2022-02-01 14:13         ` Fuad Tabba
2022-02-01 14:13         ` Fuad Tabba
2022-01-06  4:26 ` [RFC PATCH v4 04/26] KVM: arm64: Make ID_AA64PFR0_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-24 16:51   ` Fuad Tabba
2022-01-24 16:51     ` Fuad Tabba
2022-01-24 16:51     ` Fuad Tabba
2022-01-27  4:01     ` Reiji Watanabe
2022-01-27  4:01       ` Reiji Watanabe
2022-01-27  4:01       ` Reiji Watanabe
2022-02-01 14:14       ` Fuad Tabba
2022-02-01 14:14         ` Fuad Tabba
2022-02-01 14:14         ` Fuad Tabba
2022-02-10  5:33         ` Reiji Watanabe
2022-02-10  5:33           ` Reiji Watanabe
2022-02-10  5:33           ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 05/26] KVM: arm64: Make ID_AA64PFR1_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 06/26] KVM: arm64: Make ID_AA64ISAR0_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 07/26] KVM: arm64: Make ID_AA64ISAR1_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 08/26] KVM: arm64: Make ID_AA64MMFR0_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 09/26] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 10/26] KVM: arm64: Make ID_AA64DFR0_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 11/26] KVM: arm64: Make ID_DFR0_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` Reiji Watanabe [this message]
2022-01-06  4:26   ` [RFC PATCH v4 12/26] KVM: arm64: Make MVFR1_EL1 writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 13/26] KVM: arm64: Make ID registers without id_reg_info writable Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 14/26] KVM: arm64: Add consistency checking for frac fields of ID registers Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-24 17:00   ` Fuad Tabba
2022-01-24 17:00     ` Fuad Tabba
2022-01-24 17:00     ` Fuad Tabba
2022-01-27  5:03     ` Reiji Watanabe
2022-01-27  5:03       ` Reiji Watanabe
2022-01-27  5:03       ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 15/26] KVM: arm64: Introduce KVM_CAP_ARM_ID_REG_CONFIGURABLE capability Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 16/26] KVM: arm64: Add kunit test for ID register validation Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26 ` [RFC PATCH v4 17/26] KVM: arm64: Use vcpu->arch cptr_el2 to track value of cptr_el2 for VHE Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:26   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 18/26] KVM: arm64: Use vcpu->arch.mdcr_el2 to track value of mdcr_el2 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 19/26] KVM: arm64: Introduce framework to trap disabled features Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 20/26] KVM: arm64: Trap disabled features of ID_AA64PFR0_EL1 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-24 17:16   ` Fuad Tabba
2022-01-24 17:16     ` Fuad Tabba
2022-01-24 17:16     ` Fuad Tabba
2022-01-27  7:19     ` Reiji Watanabe
2022-01-27  7:19       ` Reiji Watanabe
2022-01-27  7:19       ` Reiji Watanabe
2022-02-01 14:14       ` Fuad Tabba
2022-02-01 14:14         ` Fuad Tabba
2022-02-01 14:14         ` Fuad Tabba
2022-02-10  4:15         ` Reiji Watanabe
2022-02-10  4:15           ` Reiji Watanabe
2022-02-10  4:15           ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 21/26] KVM: arm64: Trap disabled features of ID_AA64PFR1_EL1 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 22/26] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-24 17:19   ` Fuad Tabba
2022-01-24 17:19     ` Fuad Tabba
2022-01-24 17:19     ` Fuad Tabba
2022-01-28  5:40     ` Reiji Watanabe
2022-01-28  5:40       ` Reiji Watanabe
2022-01-28  5:40       ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 23/26] KVM: arm64: Trap disabled features of ID_AA64MMFR1_EL1 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-24 17:37   ` Fuad Tabba
2022-01-24 17:37     ` Fuad Tabba
2022-01-24 17:37     ` Fuad Tabba
2022-01-28  5:43     ` Reiji Watanabe
2022-01-28  5:43       ` Reiji Watanabe
2022-01-28  5:43       ` Reiji Watanabe
2022-02-09  4:51       ` Reiji Watanabe
2022-02-09  4:51         ` Reiji Watanabe
2022-02-09  4:51         ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 24/26] KVM: arm64: Trap disabled features of ID_AA64ISAR1_EL1 Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 25/26] KVM: arm64: Add kunit test for trap initialization Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27 ` [RFC PATCH v4 26/26] KVM: arm64: selftests: Introduce id_reg_test Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-06  4:27   ` Reiji Watanabe
2022-01-18  4:24 ` [RFC PATCH v4 00/26] KVM: arm64: Make CPU ID registers writable by userspace Reiji Watanabe
2022-01-18  4:24   ` Reiji Watanabe
2022-01-18  4:24   ` Reiji Watanabe
2022-01-24 16:18 ` Fuad Tabba
2022-01-24 16:18   ` Fuad Tabba
2022-01-24 16:18   ` Fuad Tabba
2022-01-25  6:31   ` Reiji Watanabe
2022-01-25  6:31     ` Reiji Watanabe
2022-01-25  6:31     ` Reiji Watanabe
2022-02-01 14:12     ` Fuad Tabba
2022-02-01 14:12       ` Fuad Tabba
2022-02-01 14:12       ` Fuad Tabba

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