[PULL 0/2] SD/MMC patches for 2022-01-08

[PULL 0/2] SD/MMC patches for 2022-01-08

[Philippe Mathieu-Daudé]

Hi Richard,

This is the SD/MMC PR that ought to be sent previously.

The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:

  Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/sdmmc-20220108

for you to fetch changes up to b66f73a0cb312c81470433dfd5275d2824bb89de:

  hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:28 +0100)

----------------------------------------------------------------
SD/MMC patches queue

- Add SDHC support for SD card SPI-mode (Frank Chang)

----------------------------------------------------------------

Frank Chang (1):
  hw/sd: Add SDHC support for SD card SPI-mode

Philippe Mathieu-Daudé (1):
  hw/sd/sdcard: Rename Write Protect Group variables

 hw/sd/sd.c | 52 +++++++++++++++++++++++++++++++---------------------
 1 file changed, 31 insertions(+), 21 deletions(-)

-- 
2.33.1

[PULL 1/2] hw/sd/sdcard: Rename Write Protect Group variables

[Philippe Mathieu-Daudé]

'wp_groups' holds a bitmap, rename it as 'wp_group_bmap'.
'wpgrps_size' is the bitmap size (in bits), rename it as
'wp_group_bits'.

Patch created mechanically using:

  $ sed -i -e s/wp_groups/wp_group_bmap/ \
           -e s/wpgrps_size/wp_group_bits/ hw/sd/sd.c

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210728181728.2012952-4-f4bug@amsat.org>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
---
 hw/sd/sd.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index bb5dbff68c0..c10a1e469b7 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -116,8 +116,8 @@ struct SDState {
     int32_t state;    /* current card state, one of SDCardStates */
     uint32_t vhs;
     bool wp_switch;
-    unsigned long *wp_groups;
-    int32_t wpgrps_size;
+    unsigned long *wp_group_bmap;
+    int32_t wp_group_bits;
     uint64_t size;
     uint32_t blk_len;
     uint32_t multi_blk_cnt;
@@ -567,10 +567,10 @@ static void sd_reset(DeviceState *dev)
     sd_set_cardstatus(sd);
     sd_set_sdstatus(sd);
 
-    g_free(sd->wp_groups);
+    g_free(sd->wp_group_bmap);
     sd->wp_switch = sd->blk ? !blk_is_writable(sd->blk) : false;
-    sd->wpgrps_size = sect;
-    sd->wp_groups = bitmap_new(sd->wpgrps_size);
+    sd->wp_group_bits = sect;
+    sd->wp_group_bmap = bitmap_new(sd->wp_group_bits);
     memset(sd->function_group, 0, sizeof(sd->function_group));
     sd->erase_start = INVALID_ADDRESS;
     sd->erase_end = INVALID_ADDRESS;
@@ -673,7 +673,7 @@ static const VMStateDescription sd_vmstate = {
         VMSTATE_UINT32(card_status, SDState),
         VMSTATE_PARTIAL_BUFFER(sd_status, SDState, 1),
         VMSTATE_UINT32(vhs, SDState),
-        VMSTATE_BITMAP(wp_groups, SDState, 0, wpgrps_size),
+        VMSTATE_BITMAP(wp_group_bmap, SDState, 0, wp_group_bits),
         VMSTATE_UINT32(blk_len, SDState),
         VMSTATE_UINT32(multi_blk_cnt, SDState),
         VMSTATE_UINT32(erase_start, SDState),
@@ -803,8 +803,8 @@ static void sd_erase(SDState *sd)
         if (sdsc) {
             /* Only SDSC cards support write protect groups */
             wpnum = sd_addr_to_wpnum(erase_addr);
-            assert(wpnum < sd->wpgrps_size);
-            if (test_bit(wpnum, sd->wp_groups)) {
+            assert(wpnum < sd->wp_group_bits);
+            if (test_bit(wpnum, sd->wp_group_bmap)) {
                 sd->card_status |= WP_ERASE_SKIP;
                 continue;
             }
@@ -828,8 +828,8 @@ static uint32_t sd_wpbits(SDState *sd, uint64_t addr)
              */
             continue;
         }
-        assert(wpnum < sd->wpgrps_size);
-        if (test_bit(wpnum, sd->wp_groups)) {
+        assert(wpnum < sd->wp_group_bits);
+        if (test_bit(wpnum, sd->wp_group_bmap)) {
             ret |= (1 << i);
         }
     }
@@ -869,7 +869,7 @@ static void sd_function_switch(SDState *sd, uint32_t arg)
 
 static inline bool sd_wp_addr(SDState *sd, uint64_t addr)
 {
-    return test_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+    return test_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
 }
 
 static void sd_lock_command(SDState *sd)
@@ -897,7 +897,7 @@ static void sd_lock_command(SDState *sd)
             sd->card_status |= LOCK_UNLOCK_FAILED;
             return;
         }
-        bitmap_zero(sd->wp_groups, sd->wpgrps_size);
+        bitmap_zero(sd->wp_group_bmap, sd->wp_group_bits);
         sd->csd[14] &= ~0x10;
         sd->card_status &= ~CARD_IS_LOCKED;
         sd->pwd_len = 0;
@@ -1348,7 +1348,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
             }
 
             sd->state = sd_programming_state;
-            set_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+            set_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
             /* Bzzzzzzztt .... Operation complete.  */
             sd->state = sd_transfer_state;
             return sd_r1b;
@@ -1370,7 +1370,7 @@ static sd_rsp_type_t sd_normal_command(SDState *sd, SDRequest req)
             }
 
             sd->state = sd_programming_state;
-            clear_bit(sd_addr_to_wpnum(addr), sd->wp_groups);
+            clear_bit(sd_addr_to_wpnum(addr), sd->wp_group_bmap);
             /* Bzzzzzzztt .... Operation complete.  */
             sd->state = sd_transfer_state;
             return sd_r1b;
-- 
2.33.1

[PULL 2/2] hw/sd: Add SDHC support for SD card SPI-mode

[Philippe Mathieu-Daudé]

From: Frank Chang <frank.chang@sifive.com>

In SPI-mode, SD card's OCR register: Card Capacity Status (CCS) bit
is not set to 1 correclty when the assigned SD image size is larger
than 2GB (SDHC). This will cause the SD card to be indentified as SDSC
incorrectly. CCS bit should be set to 1 if we are using SDHC.

Also, as there's no power up emulation in SPI-mode.
The OCR register: Card power up status bit bit (busy) should also
be set to 1 when reset. (busy bit is set to LOW if the card has not
finished the power up routine.)

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211228125719.14712-1-frank.chang@sifive.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 hw/sd/sd.c | 24 +++++++++++++++++-------
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index c10a1e469b7..cd67a7bac8e 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -290,12 +290,6 @@ FIELD(OCR, CARD_POWER_UP,              31,  1)
                                | R_OCR_CARD_CAPACITY_MASK \
                                | R_OCR_CARD_POWER_UP_MASK)
 
-static void sd_set_ocr(SDState *sd)
-{
-    /* All voltages OK */
-    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
-}
-
 static void sd_ocr_powerup(void *opaque)
 {
     SDState *sd = opaque;
@@ -311,6 +305,22 @@ static void sd_ocr_powerup(void *opaque)
     }
 }
 
+static void sd_set_ocr(SDState *sd)
+{
+    /* All voltages OK */
+    sd->ocr = R_OCR_VDD_VOLTAGE_WIN_HI_MASK;
+
+    if (sd->spi) {
+        /*
+         * We don't need to emulate power up sequence in SPI-mode.
+         * Thus, the card's power up status bit should be set to 1 when reset.
+         * The card's capacity status bit should also be set if SD card size
+         * is larger than 2GB for SDHC support.
+         */
+        sd_ocr_powerup(sd);
+    }
+}
+
 static void sd_set_scr(SDState *sd)
 {
     sd->scr[0] = 0 << 4;        /* SCR structure version 1.0 */
@@ -560,6 +570,7 @@ static void sd_reset(DeviceState *dev)
 
     sd->state = sd_idle_state;
     sd->rca = 0x0000;
+    sd->size = size;
     sd_set_ocr(sd);
     sd_set_scr(sd);
     sd_set_cid(sd);
@@ -574,7 +585,6 @@ static void sd_reset(DeviceState *dev)
     memset(sd->function_group, 0, sizeof(sd->function_group));
     sd->erase_start = INVALID_ADDRESS;
     sd->erase_end = INVALID_ADDRESS;
-    sd->size = size;
     sd->blk_len = 0x200;
     sd->pwd_len = 0;
     sd->expecting_acmd = false;
-- 
2.33.1

Re: [PULL 0/2] SD/MMC patches for 2022-01-08

[Peter Maydell]

On Sat, 8 Jan 2022 at 21:59, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi Richard,
>
> This is the SD/MMC PR that ought to be sent previously.
>
> The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:
>
>   Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800)
>
> are available in the Git repository at:
>
>   https://github.com/philmd/qemu.git tags/sdmmc-20220108
>
> for you to fetch changes up to b66f73a0cb312c81470433dfd5275d2824bb89de:
>
>   hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:28 +0100)
>
> ----------------------------------------------------------------
> SD/MMC patches queue
>
> - Add SDHC support for SD card SPI-mode (Frank Chang)
>
> ----------------------------------------------------------------

Hi; gpg says (my copy of) your key has expired:

gpg: Signature made Sat 08 Jan 2022 21:56:02 GMT
gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG)
<f4bug@amsat.org>" [expired]
gpg: Note: This key has expired!
Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE

Can you point me at a keyserver I can get an updated version, please?

thanks
-- PMM

Re: [PULL 0/2] SD/MMC patches for 2022-01-08

[Philippe Mathieu-Daudé]

On 1/10/22 17:02, Peter Maydell wrote:
> On Sat, 8 Jan 2022 at 21:59, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>>
>> Hi Richard,
>>
>> This is the SD/MMC PR that ought to be sent previously.
>>
>> The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:
>>
>>   Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800)
>>
>> are available in the Git repository at:
>>
>>   https://github.com/philmd/qemu.git tags/sdmmc-20220108
>>
>> for you to fetch changes up to b66f73a0cb312c81470433dfd5275d2824bb89de:
>>
>>   hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:28 +0100)
>>
>> ----------------------------------------------------------------
>> SD/MMC patches queue
>>
>> - Add SDHC support for SD card SPI-mode (Frank Chang)
>>
>> ----------------------------------------------------------------
> 
> Hi; gpg says (my copy of) your key has expired:
> 
> gpg: Signature made Sat 08 Jan 2022 21:56:02 GMT
> gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
> gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG)
> <f4bug@amsat.org>" [expired]
> gpg: Note: This key has expired!
> Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE
> 
> Can you point me at a keyserver I can get an updated version, please?

Sorry. It is on pgp.mit.edu and keyserver.ubuntu.com; which keyserver
are you using? (so I can upload it there too).

Thanks,

Phil.

Re: [PULL 0/2] SD/MMC patches for 2022-01-08

[Peter Maydell]

On Mon, 10 Jan 2022 at 19:20, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> On 1/10/22 17:02, Peter Maydell wrote:
> > On Sat, 8 Jan 2022 at 21:59, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> >>
> >> Hi Richard,
> >>
> >> This is the SD/MMC PR that ought to be sent previously.
> >>
> >> The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:
> >>
> >>   Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800)
> >>
> >> are available in the Git repository at:
> >>
> >>   https://github.com/philmd/qemu.git tags/sdmmc-20220108
> >>
> >> for you to fetch changes up to b66f73a0cb312c81470433dfd5275d2824bb89de:
> >>
> >>   hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:28 +0100)
> >>
> >> ----------------------------------------------------------------
> >> SD/MMC patches queue
> >>
> >> - Add SDHC support for SD card SPI-mode (Frank Chang)
> >>
> >> ----------------------------------------------------------------
> >
> > Hi; gpg says (my copy of) your key has expired:
> >
> > gpg: Signature made Sat 08 Jan 2022 21:56:02 GMT
> > gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
> > gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG)
> > <f4bug@amsat.org>" [expired]
> > gpg: Note: This key has expired!
> > Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE
> >
> > Can you point me at a keyserver I can get an updated version, please?
>
> Sorry. It is on pgp.mit.edu and keyserver.ubuntu.com; which keyserver
> are you using? (so I can upload it there too).

I use those two servers; for some reason --refresh-keys wasn't pulling
the key, but --recv-keys did. Anyway, I've got it now, and am testing
the pullreq.

thanks
-- PMM

Re: [PULL 0/2] SD/MMC patches for 2022-01-08

[Peter Maydell]

On Sat, 8 Jan 2022 at 21:59, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> Hi Richard,
>
> This is the SD/MMC PR that ought to be sent previously.
>
> The following changes since commit b5a3d8bc9146ba22a25116cb748c97341bf99737:
>
>   Merge tag 'pull-misc-20220103' of https://gitlab.com/rth7680/qemu into staging (2022-01-03 09:34:41 -0800)
>
> are available in the Git repository at:
>
>   https://github.com/philmd/qemu.git tags/sdmmc-20220108
>
> for you to fetch changes up to b66f73a0cb312c81470433dfd5275d2824bb89de:
>
>   hw/sd: Add SDHC support for SD card SPI-mode (2022-01-04 08:50:28 +0100)
>
> ----------------------------------------------------------------
> SD/MMC patches queue
>
> - Add SDHC support for SD card SPI-mode (Frank Chang)
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/7.0
for any user-visible changes.

-- PMM