From: Yifei Jiang <jiangyifei@huawei.com> To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org> Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>, <libvir-list@redhat.com>, <anup@brainfault.org>, <palmer@dabbelt.com>, <Alistair.Francis@wdc.com>, <bin.meng@windriver.com>, <fanliang@huawei.com>, <wu.wubin@huawei.com>, <wanghaibin.wang@huawei.com>, <wanbo13@huawei.com>, Yifei Jiang <jiangyifei@huawei.com> Subject: [PATCH v4 00/12] Add riscv kvm accel support Date: Mon, 10 Jan 2022 09:38:19 +0800 [thread overview] Message-ID: <20220110013831.1594-1-jiangyifei@huawei.com> (raw) This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ make -j$(nproc) 2. Build kernel 3. Build QEMU VM Cross built in riscv toolchain. $ PKG_CONFIG_LIBDIR=<toolchain pkgconfig path> $ export PKG_CONFIG_SYSROOT_DIR=<toolchain sysroot path> $ ./configure --target-list=riscv64-softmmu --enable-kvm \ --cross-prefix=riscv64-linux-gnu- --disable-libiscsi --disable-glusterfs \ --disable-libusb --disable-usb-redir --audio-drv-list= --disable-opengl \ --disable-libxml2 $ make -j$(nproc) 4. Start emulation $ ./qemu-system-riscv64 -M virt -m 4096M -cpu rv64,x-h=true -nographic \ -name guest=riscv-hyp,debug-threads=on \ -smp 4 \ -bios ./fw_jump.bin \ -kernel ./Image \ -drive file=./hyp.img,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 \ -append "root=/dev/vda rw console=ttyS0 earlycon=sbi" 5. Start kvm-acceled QEMU VM in emulation $ ./qemu-system-riscv64 -M virt,accel=kvm -m 1024M -cpu host -nographic \ -name guest=riscv-guset \ -smp 2 \ -bios none \ -kernel ./Image \ -drive file=./guest.img,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 \ -append "root=/dev/vda rw console=ttyS0 earlycon=sbi" Changes since patch v3 - Re-write the for-loop in sifive_plic_create(). - Drop unnecessary change in hw/riscv/virt.c. - Use serial to handle console sbi call. Changes since patch v2 - Create a macro for get and put timer csr. - Remove M-mode PLIC contexts when kvm is enabled. - Add get timer frequency. - Move cpu_host_load to vmstate_kvmtimer. Changes since patch v1 - Rebase on recent commit a216e7cf119c91ffdf5931834a1a030ebea40d70 - Sync-up headers with Linux-5.16-rc4. - Fixbug in kvm_arch_init_vcpu. - Create a macro for get and put regs csr. - Start kernel directly when kvm_enabled. - Use riscv_cpu_set_irq to inject KVM interrupts. - Use the Semihosting Console API for RISC-V kvm handle sbi. - Update vmstate_riscv_cpu version id. Placing kvm_timer into a subsection. Changes since RFC v6 - Rebase on recent commit 8627edfb3f1fca24a96a0954148885c3241c10f8 - Sync-up headers with Linux-5.16-rc1 Changes since RFC v5 - Rebase on QEMU v6.1.0-rc1 and kvm-riscv linux v19. - Move kvm interrupt setting to riscv_cpu_update_mip(). - Replace __u64 with uint64_t. Changes since RFC v4 - Rebase on QEMU v6.0.0-rc2 and kvm-riscv linux v17. - Remove time scaling support as software solution is incomplete. Because it will cause unacceptable performance degradation. and We will post a better solution. - Revise according to Alistair's review comments. - Remove compile time XLEN checks in kvm_riscv_reg_id - Surround TYPE_RISCV_CPU_HOST definition by CONFIG_KVM and share it between RV32 and RV64. - Add kvm-stub.c for reduce unnecessary compilation checks. - Add riscv_setup_direct_kernel() to direct boot kernel for KVM. Changes since RFC v3 - Rebase on QEMU v5.2.0-rc2 and kvm-riscv linux v15. - Add time scaling support(New patches 13, 14 and 15). - Fix the bug that guest vm can't reboot. Changes since RFC v2 - Fix checkpatch error at target/riscv/sbi_ecall_interface.h. - Add riscv migration support. Changes since RFC v1 - Add separate SBI ecall interface header. - Add riscv32 kvm accel support. Yifei Jiang (12): update-linux-headers: Add asm-riscv/kvm.h target/riscv: Add target/riscv/kvm.c to place the public kvm interface target/riscv: Implement function kvm_arch_init_vcpu target/riscv: Implement kvm_arch_get_registers target/riscv: Implement kvm_arch_put_registers target/riscv: Support start kernel directly by KVM target/riscv: Support setting external interrupt by KVM target/riscv: Handle KVM_EXIT_RISCV_SBI exit target/riscv: Add host cpu type target/riscv: Add kvm_riscv_get/put_regs_timer target/riscv: Implement virtual time adjusting with vm state changing target/riscv: Support virtual time context synchronization hw/intc/sifive_plic.c | 21 +- hw/riscv/boot.c | 16 +- hw/riscv/virt.c | 83 +++-- include/hw/riscv/boot.h | 1 + linux-headers/asm-riscv/kvm.h | 128 +++++++ meson.build | 2 + target/riscv/cpu.c | 29 +- target/riscv/cpu.h | 11 + target/riscv/kvm-stub.c | 30 ++ target/riscv/kvm.c | 532 +++++++++++++++++++++++++++++ target/riscv/kvm_riscv.h | 25 ++ target/riscv/machine.c | 30 ++ target/riscv/meson.build | 1 + target/riscv/sbi_ecall_interface.h | 72 ++++ 14 files changed, 948 insertions(+), 33 deletions(-) create mode 100644 linux-headers/asm-riscv/kvm.h create mode 100644 target/riscv/kvm-stub.c create mode 100644 target/riscv/kvm.c create mode 100644 target/riscv/kvm_riscv.h create mode 100644 target/riscv/sbi_ecall_interface.h -- 2.19.1
WARNING: multiple messages have this Message-ID (diff)
From: Yifei Jiang via <qemu-devel@nongnu.org> To: <qemu-devel@nongnu.org>, <qemu-riscv@nongnu.org> Cc: <kvm-riscv@lists.infradead.org>, <kvm@vger.kernel.org>, <libvir-list@redhat.com>, <anup@brainfault.org>, <palmer@dabbelt.com>, <Alistair.Francis@wdc.com>, <bin.meng@windriver.com>, <fanliang@huawei.com>, <wu.wubin@huawei.com>, <wanghaibin.wang@huawei.com>, <wanbo13@huawei.com>, Yifei Jiang <jiangyifei@huawei.com> Subject: [PATCH v4 00/12] Add riscv kvm accel support Date: Mon, 10 Jan 2022 09:38:19 +0800 [thread overview] Message-ID: <20220110013831.1594-1-jiangyifei@huawei.com> (raw) This series adds both riscv32 and riscv64 kvm support, and implements migration based on riscv. Because of RISC-V KVM has been merged into the Linux master, so this series are changed from RFC to patch. Several steps to use this: 1. Build emulation $ ./configure --target-list=riscv64-softmmu $ make -j$(nproc) 2. Build kernel 3. Build QEMU VM Cross built in riscv toolchain. $ PKG_CONFIG_LIBDIR=<toolchain pkgconfig path> $ export PKG_CONFIG_SYSROOT_DIR=<toolchain sysroot path> $ ./configure --target-list=riscv64-softmmu --enable-kvm \ --cross-prefix=riscv64-linux-gnu- --disable-libiscsi --disable-glusterfs \ --disable-libusb --disable-usb-redir --audio-drv-list= --disable-opengl \ --disable-libxml2 $ make -j$(nproc) 4. Start emulation $ ./qemu-system-riscv64 -M virt -m 4096M -cpu rv64,x-h=true -nographic \ -name guest=riscv-hyp,debug-threads=on \ -smp 4 \ -bios ./fw_jump.bin \ -kernel ./Image \ -drive file=./hyp.img,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 \ -append "root=/dev/vda rw console=ttyS0 earlycon=sbi" 5. Start kvm-acceled QEMU VM in emulation $ ./qemu-system-riscv64 -M virt,accel=kvm -m 1024M -cpu host -nographic \ -name guest=riscv-guset \ -smp 2 \ -bios none \ -kernel ./Image \ -drive file=./guest.img,format=raw,id=hd0 \ -device virtio-blk-device,drive=hd0 \ -append "root=/dev/vda rw console=ttyS0 earlycon=sbi" Changes since patch v3 - Re-write the for-loop in sifive_plic_create(). - Drop unnecessary change in hw/riscv/virt.c. - Use serial to handle console sbi call. Changes since patch v2 - Create a macro for get and put timer csr. - Remove M-mode PLIC contexts when kvm is enabled. - Add get timer frequency. - Move cpu_host_load to vmstate_kvmtimer. Changes since patch v1 - Rebase on recent commit a216e7cf119c91ffdf5931834a1a030ebea40d70 - Sync-up headers with Linux-5.16-rc4. - Fixbug in kvm_arch_init_vcpu. - Create a macro for get and put regs csr. - Start kernel directly when kvm_enabled. - Use riscv_cpu_set_irq to inject KVM interrupts. - Use the Semihosting Console API for RISC-V kvm handle sbi. - Update vmstate_riscv_cpu version id. Placing kvm_timer into a subsection. Changes since RFC v6 - Rebase on recent commit 8627edfb3f1fca24a96a0954148885c3241c10f8 - Sync-up headers with Linux-5.16-rc1 Changes since RFC v5 - Rebase on QEMU v6.1.0-rc1 and kvm-riscv linux v19. - Move kvm interrupt setting to riscv_cpu_update_mip(). - Replace __u64 with uint64_t. Changes since RFC v4 - Rebase on QEMU v6.0.0-rc2 and kvm-riscv linux v17. - Remove time scaling support as software solution is incomplete. Because it will cause unacceptable performance degradation. and We will post a better solution. - Revise according to Alistair's review comments. - Remove compile time XLEN checks in kvm_riscv_reg_id - Surround TYPE_RISCV_CPU_HOST definition by CONFIG_KVM and share it between RV32 and RV64. - Add kvm-stub.c for reduce unnecessary compilation checks. - Add riscv_setup_direct_kernel() to direct boot kernel for KVM. Changes since RFC v3 - Rebase on QEMU v5.2.0-rc2 and kvm-riscv linux v15. - Add time scaling support(New patches 13, 14 and 15). - Fix the bug that guest vm can't reboot. Changes since RFC v2 - Fix checkpatch error at target/riscv/sbi_ecall_interface.h. - Add riscv migration support. Changes since RFC v1 - Add separate SBI ecall interface header. - Add riscv32 kvm accel support. Yifei Jiang (12): update-linux-headers: Add asm-riscv/kvm.h target/riscv: Add target/riscv/kvm.c to place the public kvm interface target/riscv: Implement function kvm_arch_init_vcpu target/riscv: Implement kvm_arch_get_registers target/riscv: Implement kvm_arch_put_registers target/riscv: Support start kernel directly by KVM target/riscv: Support setting external interrupt by KVM target/riscv: Handle KVM_EXIT_RISCV_SBI exit target/riscv: Add host cpu type target/riscv: Add kvm_riscv_get/put_regs_timer target/riscv: Implement virtual time adjusting with vm state changing target/riscv: Support virtual time context synchronization hw/intc/sifive_plic.c | 21 +- hw/riscv/boot.c | 16 +- hw/riscv/virt.c | 83 +++-- include/hw/riscv/boot.h | 1 + linux-headers/asm-riscv/kvm.h | 128 +++++++ meson.build | 2 + target/riscv/cpu.c | 29 +- target/riscv/cpu.h | 11 + target/riscv/kvm-stub.c | 30 ++ target/riscv/kvm.c | 532 +++++++++++++++++++++++++++++ target/riscv/kvm_riscv.h | 25 ++ target/riscv/machine.c | 30 ++ target/riscv/meson.build | 1 + target/riscv/sbi_ecall_interface.h | 72 ++++ 14 files changed, 948 insertions(+), 33 deletions(-) create mode 100644 linux-headers/asm-riscv/kvm.h create mode 100644 target/riscv/kvm-stub.c create mode 100644 target/riscv/kvm.c create mode 100644 target/riscv/kvm_riscv.h create mode 100644 target/riscv/sbi_ecall_interface.h -- 2.19.1
next reply other threads:[~2022-01-10 1:38 UTC|newest] Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-01-10 1:38 Yifei Jiang [this message] 2022-01-10 1:38 ` [PATCH v4 00/12] Add riscv kvm accel support Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 01/12] update-linux-headers: Add asm-riscv/kvm.h Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 02/12] target/riscv: Add target/riscv/kvm.c to place the public kvm interface Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 23:09 ` Alistair Francis 2022-01-10 23:09 ` Alistair Francis 2022-01-12 8:04 ` Jiangyifei 2022-01-12 8:04 ` Jiangyifei via 2022-01-10 1:38 ` [PATCH v4 03/12] target/riscv: Implement function kvm_arch_init_vcpu Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 04/12] target/riscv: Implement kvm_arch_get_registers Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 05/12] target/riscv: Implement kvm_arch_put_registers Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 23:06 ` Alistair Francis 2022-01-10 23:06 ` Alistair Francis 2022-01-12 8:01 ` Jiangyifei 2022-01-12 8:01 ` Jiangyifei via 2022-01-10 1:38 ` [PATCH v4 06/12] target/riscv: Support start kernel directly by KVM Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-11 0:27 ` Alistair Francis 2022-01-11 0:27 ` Alistair Francis 2022-01-12 8:07 ` Jiangyifei 2022-01-12 8:07 ` Jiangyifei via 2022-01-10 1:38 ` [PATCH v4 07/12] target/riscv: Support setting external interrupt " Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 08/12] target/riscv: Handle KVM_EXIT_RISCV_SBI exit Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 6:48 ` Alistair Francis 2022-01-10 6:48 ` Alistair Francis 2022-01-10 1:38 ` [PATCH v4 09/12] target/riscv: Add host cpu type Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 10/12] target/riscv: Add kvm_riscv_get/put_regs_timer Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 6:52 ` Alistair Francis 2022-01-10 6:52 ` Alistair Francis 2022-01-10 1:38 ` [PATCH v4 11/12] target/riscv: Implement virtual time adjusting with vm state changing Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via 2022-01-10 1:38 ` [PATCH v4 12/12] target/riscv: Support virtual time context synchronization Yifei Jiang 2022-01-10 1:38 ` Yifei Jiang via
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