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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
	Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH v3 09/13] drm/i915/xehp/guc: enable compute engine inside GuC
Date: Tue,  1 Mar 2022 15:15:45 -0800	[thread overview]
Message-ID: <20220301231549.1817978-10-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220301231549.1817978-1-matthew.d.roper@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Tell GuC that CCS is enabled by setting a bit in its ADS.

Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Original-author: Michel Thierry
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 29fbe4681ca7..9bb551b83e7a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -434,6 +434,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt,
 				     struct iosys_map *info_map)
 {
 	info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1);
+	info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt));
 	info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1);
 	info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt));
 	info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v3 09/13] drm/i915/xehp/guc: enable compute engine inside GuC
Date: Tue,  1 Mar 2022 15:15:45 -0800	[thread overview]
Message-ID: <20220301231549.1817978-10-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20220301231549.1817978-1-matthew.d.roper@intel.com>

From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Tell GuC that CCS is enabled by setting a bit in its ADS.

Cc: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Original-author: Michel Thierry
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 29fbe4681ca7..9bb551b83e7a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -434,6 +434,7 @@ static void fill_engine_enable_masks(struct intel_gt *gt,
 				     struct iosys_map *info_map)
 {
 	info_map_write(info_map, engine_enabled_masks[GUC_RENDER_CLASS], 1);
+	info_map_write(info_map, engine_enabled_masks[GUC_COMPUTE_CLASS], CCS_MASK(gt));
 	info_map_write(info_map, engine_enabled_masks[GUC_BLITTER_CLASS], 1);
 	info_map_write(info_map, engine_enabled_masks[GUC_VIDEO_CLASS], VDBOX_MASK(gt));
 	info_map_write(info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS], VEBOX_MASK(gt));
-- 
2.34.1


  parent reply	other threads:[~2022-03-01 23:17 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-01 23:15 [PATCH v3 00/13] i915: Prepare for Xe_HP compute engines Matt Roper
2022-03-01 23:15 ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 01/13] drm/i915/xehp: Define compute class and engine Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 02/13] drm/i915/xehp: CCS shares the render reset domain Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 03/13] drm/i915/xehp: Add Compute CS IRQ handlers Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 04/13] drm/i915/xehp: compute engine pipe_control Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 05/13] drm/i915/xehp: CCS should use RCS setup functions Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 06/13] drm/i915: Move context descriptor fields to intel_lrc.h Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 07/13] drm/i915/xehp: Define context scheduling attributes in lrc descriptor Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 08/13] drm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:51   ` Umesh Nerlige Ramappa
2022-03-02  0:04     ` Matt Roper
2022-03-02  0:15     ` [PATCH v4 " Matt Roper
2022-03-02  0:15       ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` Matt Roper [this message]
2022-03-01 23:15   ` [Intel-gfx] [PATCH v3 09/13] drm/i915/xehp/guc: enable compute engine inside GuC Matt Roper
2022-03-01 23:38   ` Ceraolo Spurio, Daniele
2022-03-01 23:38     ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-03-02  0:18   ` Matt Roper
2022-03-02  0:18     ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 10/13] drm/i915/xehp: Don't support parallel submission on compute / render Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 11/13] drm/i915/xehp: handle fused off CCS engines Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:47   ` Matt Roper
2022-03-01 23:47     ` [Intel-gfx] " Matt Roper
2022-03-02  5:20   ` [PATCH v5 " Matt Roper
2022-03-02  5:20     ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 12/13] drm/i915/xehp: Add compute workarounds Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-01 23:15 ` [PATCH v3 13/13] drm/i915/xehpsdv: Move render/compute engine reset domains related workarounds Matt Roper
2022-03-01 23:15   ` [Intel-gfx] " Matt Roper
2022-03-02  0:07   ` Matt Roper
2022-03-02  0:07     ` [Intel-gfx] " Matt Roper
2022-03-02  2:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Prepare for Xe_HP compute engines (rev3) Patchwork
2022-03-02  2:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-02  2:58 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-03-02  6:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Prepare for Xe_HP compute engines (rev4) Patchwork
2022-03-02  6:10 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-02  6:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-02 13:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-03-02 14:54   ` Matt Roper

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