From: Jonathan Cameron <Jonathan.Cameron@huawei.com> To: linuxarm@huawei.com, qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>, "Marcel Apfelbaum" <marcel@redhat.com>, "Michael S . Tsirkin" <mst@redhat.com>, "Igor Mammedov" <imammedo@redhat.com>, "Markus Armbruster" <armbru@redhat.com> Cc: linux-cxl@vger.kernel.org, "Ben Widawsky" <ben.widawsky@intel.com>, "Peter Maydell" <peter.maydell@linaro.org>, "Shameerali Kolothum Thodi" <shameerali.kolothum.thodi@huawei.com>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, "Saransh Gupta1" <saransh@ibm.com>, "Shreyas Shah" <shreyas.shah@elastics.cloud>, "Chris Browy" <cbrowy@avery-design.com>, "Samarth Saxena" <samarths@cadence.com>, "Dan Williams" <dan.j.williams@intel.com> Subject: [PATCH v7 19/46] hw/cxl/device: Add some trivial commands Date: Sun, 6 Mar 2022 17:41:10 +0000 [thread overview] Message-ID: <20220306174137.5707-20-Jonathan.Cameron@huawei.com> (raw) In-Reply-To: <20220306174137.5707-1-Jonathan.Cameron@huawei.com> From: Ben Widawsky <ben.widawsky@intel.com> GET_FW_INFO and GET_PARTITION_INFO, for this emulation, is equivalent to info already returned in the IDENTIFY command. To have a more robust implementation, add those. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- v7: * Use QEMU_PACKED etc from compiler.h (Alex) Note this applies in other patches, not all called out explicitly. * use pstrcpy() rather than snprintf() for a fixed string hw/cxl/cxl-mailbox-utils.c | 69 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 7ed9606c6b..fcd41d9a9d 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "hw/cxl/cxl.h" #include "hw/pci/pci.h" +#include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/uuid.h" @@ -44,6 +45,8 @@ enum { #define CLEAR_RECORDS 0x1 #define GET_INTERRUPT_POLICY 0x2 #define SET_INTERRUPT_POLICY 0x3 + FIRMWARE_UPDATE = 0x02, + #define GET_INFO 0x0 TIMESTAMP = 0x03, #define GET 0x0 #define SET 0x1 @@ -52,6 +55,8 @@ enum { #define GET_LOG 0x1 IDENTIFY = 0x40, #define MEMORY_DEVICE 0x0 + CCLS = 0x41, + #define GET_PARTITION_INFO 0x0 }; /* 8.2.8.4.5.1 Command Return Codes */ @@ -114,6 +119,39 @@ DEFINE_MAILBOX_HANDLER_NOP(events_clear_records); DEFINE_MAILBOX_HANDLER_ZEROED(events_get_interrupt_policy, 4); DEFINE_MAILBOX_HANDLER_NOP(events_set_interrupt_policy); +/* 8.2.9.2.1 */ +static ret_code cmd_firmware_update_get_info(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct { + uint8_t slots_supported; + uint8_t slot_info; + uint8_t caps; + uint8_t rsvd[0xd]; + char fw_rev1[0x10]; + char fw_rev2[0x10]; + char fw_rev3[0x10]; + char fw_rev4[0x10]; + } QEMU_PACKED *fw_info; + QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50); + + if (cxl_dstate->pmem_size < (256 << 20)) { + return CXL_MBOX_INTERNAL_ERROR; + } + + fw_info = (void *)cmd->payload; + memset(fw_info, 0, sizeof(*fw_info)); + + fw_info->slots_supported = 2; + fw_info->slot_info = BIT(0) | BIT(3); + fw_info->caps = 0; + pstrcpy(fw_info->fw_rev1, sizeof(fw_info->fw_rev1), "BWFW VERSION 0"); + + *len = sizeof(*fw_info); + return CXL_MBOX_SUCCESS; +} + /* 8.2.9.3.1 */ static ret_code cmd_timestamp_get(struct cxl_cmd *cmd, CXLDeviceState *cxl_dstate, @@ -258,6 +296,33 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } +static ret_code cmd_ccls_get_partition_info(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct { + uint64_t active_vmem; + uint64_t active_pmem; + uint64_t next_vmem; + uint64_t next_pmem; + } QEMU_PACKED *part_info = (void *)cmd->payload; + QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20); + uint64_t size = cxl_dstate->pmem_size; + + if (!QEMU_IS_ALIGNED(size, 256 << 20)) { + return CXL_MBOX_INTERNAL_ERROR; + } + + /* PMEM only */ + part_info->active_vmem = 0; + part_info->next_vmem = 0; + part_info->active_pmem = size / (256 << 20); + part_info->next_pmem = part_info->active_pmem; + + *len = sizeof(*part_info); + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_POLICY_CHANGE (1 << 3) #define IMMEDIATE_LOG_CHANGE (1 << 4) @@ -271,12 +336,16 @@ static struct cxl_cmd cxl_cmd_set[256][256] = { cmd_events_get_interrupt_policy, 0, 0 }, [EVENTS][SET_INTERRUPT_POLICY] = { "EVENTS_SET_INTERRUPT_POLICY", cmd_events_set_interrupt_policy, 4, IMMEDIATE_CONFIG_CHANGE }, + [FIRMWARE_UPDATE][GET_INFO] = { "FIRMWARE_UPDATE_GET_INFO", + cmd_firmware_update_get_info, 0, 0 }, [TIMESTAMP][GET] = { "TIMESTAMP_GET", cmd_timestamp_get, 0, 0 }, [TIMESTAMP][SET] = { "TIMESTAMP_SET", cmd_timestamp_set, 8, IMMEDIATE_POLICY_CHANGE }, [LOGS][GET_SUPPORTED] = { "LOGS_GET_SUPPORTED", cmd_logs_get_supported, 0, 0 }, [LOGS][GET_LOG] = { "LOGS_GET_LOG", cmd_logs_get_log, 0x18, 0 }, [IDENTIFY][MEMORY_DEVICE] = { "IDENTIFY_MEMORY_DEVICE", cmd_identify_memory_device, 0, 0 }, + [CCLS][GET_PARTITION_INFO] = { "CCLS_GET_PARTITION_INFO", + cmd_ccls_get_partition_info, 0, 0 }, }; void cxl_process_mailbox(CXLDeviceState *cxl_dstate) -- 2.32.0
WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Cameron via <qemu-devel@nongnu.org> To: linuxarm@huawei.com, qemu-devel@nongnu.org, "Alex Bennée" <alex.bennee@linaro.org>, "Marcel Apfelbaum" <marcel@redhat.com>, "Michael S . Tsirkin" <mst@redhat.com>, "Igor Mammedov" <imammedo@redhat.com>, "Markus Armbruster" <armbru@redhat.com> Cc: linux-cxl@vger.kernel.org, "Ben Widawsky" <ben.widawsky@intel.com>, "Peter Maydell" <peter.maydell@linaro.org>, "Shameerali Kolothum Thodi" <shameerali.kolothum.thodi@huawei.com>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, "Saransh Gupta1" <saransh@ibm.com>, "Shreyas Shah" <shreyas.shah@elastics.cloud>, "Chris Browy" <cbrowy@avery-design.com>, "Samarth Saxena" <samarths@cadence.com>, "Dan Williams" <dan.j.williams@intel.com> Subject: [PATCH v7 19/46] hw/cxl/device: Add some trivial commands Date: Sun, 6 Mar 2022 17:41:10 +0000 [thread overview] Message-ID: <20220306174137.5707-20-Jonathan.Cameron@huawei.com> (raw) In-Reply-To: <20220306174137.5707-1-Jonathan.Cameron@huawei.com> From: Ben Widawsky <ben.widawsky@intel.com> GET_FW_INFO and GET_PARTITION_INFO, for this emulation, is equivalent to info already returned in the IDENTIFY command. To have a more robust implementation, add those. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> --- v7: * Use QEMU_PACKED etc from compiler.h (Alex) Note this applies in other patches, not all called out explicitly. * use pstrcpy() rather than snprintf() for a fixed string hw/cxl/cxl-mailbox-utils.c | 69 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c index 7ed9606c6b..fcd41d9a9d 100644 --- a/hw/cxl/cxl-mailbox-utils.c +++ b/hw/cxl/cxl-mailbox-utils.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "hw/cxl/cxl.h" #include "hw/pci/pci.h" +#include "qemu/cutils.h" #include "qemu/log.h" #include "qemu/uuid.h" @@ -44,6 +45,8 @@ enum { #define CLEAR_RECORDS 0x1 #define GET_INTERRUPT_POLICY 0x2 #define SET_INTERRUPT_POLICY 0x3 + FIRMWARE_UPDATE = 0x02, + #define GET_INFO 0x0 TIMESTAMP = 0x03, #define GET 0x0 #define SET 0x1 @@ -52,6 +55,8 @@ enum { #define GET_LOG 0x1 IDENTIFY = 0x40, #define MEMORY_DEVICE 0x0 + CCLS = 0x41, + #define GET_PARTITION_INFO 0x0 }; /* 8.2.8.4.5.1 Command Return Codes */ @@ -114,6 +119,39 @@ DEFINE_MAILBOX_HANDLER_NOP(events_clear_records); DEFINE_MAILBOX_HANDLER_ZEROED(events_get_interrupt_policy, 4); DEFINE_MAILBOX_HANDLER_NOP(events_set_interrupt_policy); +/* 8.2.9.2.1 */ +static ret_code cmd_firmware_update_get_info(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct { + uint8_t slots_supported; + uint8_t slot_info; + uint8_t caps; + uint8_t rsvd[0xd]; + char fw_rev1[0x10]; + char fw_rev2[0x10]; + char fw_rev3[0x10]; + char fw_rev4[0x10]; + } QEMU_PACKED *fw_info; + QEMU_BUILD_BUG_ON(sizeof(*fw_info) != 0x50); + + if (cxl_dstate->pmem_size < (256 << 20)) { + return CXL_MBOX_INTERNAL_ERROR; + } + + fw_info = (void *)cmd->payload; + memset(fw_info, 0, sizeof(*fw_info)); + + fw_info->slots_supported = 2; + fw_info->slot_info = BIT(0) | BIT(3); + fw_info->caps = 0; + pstrcpy(fw_info->fw_rev1, sizeof(fw_info->fw_rev1), "BWFW VERSION 0"); + + *len = sizeof(*fw_info); + return CXL_MBOX_SUCCESS; +} + /* 8.2.9.3.1 */ static ret_code cmd_timestamp_get(struct cxl_cmd *cmd, CXLDeviceState *cxl_dstate, @@ -258,6 +296,33 @@ static ret_code cmd_identify_memory_device(struct cxl_cmd *cmd, return CXL_MBOX_SUCCESS; } +static ret_code cmd_ccls_get_partition_info(struct cxl_cmd *cmd, + CXLDeviceState *cxl_dstate, + uint16_t *len) +{ + struct { + uint64_t active_vmem; + uint64_t active_pmem; + uint64_t next_vmem; + uint64_t next_pmem; + } QEMU_PACKED *part_info = (void *)cmd->payload; + QEMU_BUILD_BUG_ON(sizeof(*part_info) != 0x20); + uint64_t size = cxl_dstate->pmem_size; + + if (!QEMU_IS_ALIGNED(size, 256 << 20)) { + return CXL_MBOX_INTERNAL_ERROR; + } + + /* PMEM only */ + part_info->active_vmem = 0; + part_info->next_vmem = 0; + part_info->active_pmem = size / (256 << 20); + part_info->next_pmem = part_info->active_pmem; + + *len = sizeof(*part_info); + return CXL_MBOX_SUCCESS; +} + #define IMMEDIATE_CONFIG_CHANGE (1 << 1) #define IMMEDIATE_POLICY_CHANGE (1 << 3) #define IMMEDIATE_LOG_CHANGE (1 << 4) @@ -271,12 +336,16 @@ static struct cxl_cmd cxl_cmd_set[256][256] = { cmd_events_get_interrupt_policy, 0, 0 }, [EVENTS][SET_INTERRUPT_POLICY] = { "EVENTS_SET_INTERRUPT_POLICY", cmd_events_set_interrupt_policy, 4, IMMEDIATE_CONFIG_CHANGE }, + [FIRMWARE_UPDATE][GET_INFO] = { "FIRMWARE_UPDATE_GET_INFO", + cmd_firmware_update_get_info, 0, 0 }, [TIMESTAMP][GET] = { "TIMESTAMP_GET", cmd_timestamp_get, 0, 0 }, [TIMESTAMP][SET] = { "TIMESTAMP_SET", cmd_timestamp_set, 8, IMMEDIATE_POLICY_CHANGE }, [LOGS][GET_SUPPORTED] = { "LOGS_GET_SUPPORTED", cmd_logs_get_supported, 0, 0 }, [LOGS][GET_LOG] = { "LOGS_GET_LOG", cmd_logs_get_log, 0x18, 0 }, [IDENTIFY][MEMORY_DEVICE] = { "IDENTIFY_MEMORY_DEVICE", cmd_identify_memory_device, 0, 0 }, + [CCLS][GET_PARTITION_INFO] = { "CCLS_GET_PARTITION_INFO", + cmd_ccls_get_partition_info, 0, 0 }, }; void cxl_process_mailbox(CXLDeviceState *cxl_dstate) -- 2.32.0
next prev parent reply other threads:[~2022-03-06 17:51 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-03-06 17:40 [PATCH v7 00/46] CXl 2.0 emulation Support Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 01/46] hw/pci/cxl: Add a CXL component type (interface) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 02/46] hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 03/46] MAINTAINERS: Add entry for Compute Express Link Emulation Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 04/46] hw/cxl/device: Introduce a CXL device (8.2.8) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 05/46] hw/cxl/device: Implement the CAP array (8.2.8.1-2) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 06/46] hw/cxl/device: Implement basic mailbox (8.2.8.4) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 07/46] hw/cxl/device: Add memory device utilities Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:40 ` [PATCH v7 08/46] hw/cxl/device: Add cheap EVENTS implementation (8.2.9.1) Jonathan Cameron 2022-03-06 17:40 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 09/46] hw/cxl/device: Timestamp implementation (8.2.9.3) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 10/46] hw/cxl/device: Add log commands (8.2.9.4) + CEL Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 11/46] hw/pxb: Use a type for realizing expanders Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 12/46] hw/pci/cxl: Create a CXL bus type Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 13/46] cxl: Machine level control on whether CXL support is enabled Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 14/46] hw/pxb: Allow creation of a CXL PXB (host bridge) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 15/46] qtest/cxl: Introduce initial test for pxb-cxl only Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 16/46] hw/cxl/rp: Add a root port Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 17/46] hw/cxl/device: Add a memory device (8.2.8.5) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 18/46] hw/cxl/device: Implement MMIO HDM decoding (8.2.5.12) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` Jonathan Cameron [this message] 2022-03-06 17:41 ` [PATCH v7 19/46] hw/cxl/device: Add some trivial commands Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 20/46] hw/cxl/device: Plumb real Label Storage Area (LSA) sizing Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 21/46] hw/cxl/device: Implement get/set Label Storage Area (LSA) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 22/46] qtests/cxl: Add initial root port and CXL type3 tests Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 23/46] hw/cxl/component: Implement host bridge MMIO (8.2.5, table 142) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 24/46] acpi/cxl: Add _OSC implementation (9.14.2) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 21:31 ` Michael S. Tsirkin 2022-03-06 21:31 ` Michael S. Tsirkin 2022-03-07 17:01 ` Jonathan Cameron 2022-03-07 17:01 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 25/46] acpi/cxl: Create the CEDT (9.14.1) Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 26/46] hw/cxl/component: Add utils for interleave parameter encoding/decoding Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 27/46] hw/cxl/host: Add support for CXL Fixed Memory Windows Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 28/46] acpi/cxl: Introduce CFMWS structures in CEDT Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 29/46] hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 30/46] pci/pcie_port: Add pci_find_port_by_pn() Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 31/46] CXL/cxl_component: Add cxl_get_hb_cstate() Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 32/46] mem/cxl_type3: Add read and write functions for associated hostmem Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 33/46] cxl/cxl-host: Add memops for CFMWS region Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 34/46] RFC: softmmu/memory: Add ops to memory_region_ram_init_from_file Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 35/46] hw/cxl/component Add a dumb HDM decoder handler Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 36/46] i386/pc: Enable CXL fixed memory windows Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 37/46] tests/acpi: q35: Allow addition of a CXL test Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 38/46] qtests/bios-tables-test: Add a test for CXL emulation Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 39/46] tests/acpi: Add tables " Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 40/46] qtest/cxl: Add more complex test cases with CFMWs Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 41/46] hw/arm/virt: Basic CXL enablement on pci_expander_bridge instances pxb-cxl Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 42/46] qtest/cxl: Add aarch64 virt test for CXL Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 43/46] docs/cxl: Add initial Compute eXpress Link (CXL) documentation Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 44/46] pci-bridge/cxl_upstream: Add a CXL switch upstream port Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 45/46] pci-bridge/cxl_downstream: Add a CXL switch downstream port Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 17:41 ` [PATCH v7 46/46] cxl/cxl-host: Support interleave decoding with one level of switches Jonathan Cameron 2022-03-06 17:41 ` Jonathan Cameron via 2022-03-06 21:33 ` [PATCH v7 00/46] CXl 2.0 emulation Support Michael S. Tsirkin 2022-03-06 21:33 ` Michael S. Tsirkin 2022-03-07 9:39 ` Jonathan Cameron via 2022-03-07 9:39 ` Jonathan Cameron 2022-03-09 8:15 ` Peter Xu 2022-03-09 8:15 ` Peter Xu 2022-03-09 11:28 ` Jonathan Cameron 2022-03-09 11:28 ` Jonathan Cameron via 2022-03-10 8:02 ` Peter Xu 2022-03-10 8:02 ` Peter Xu 2022-03-16 16:50 ` Jonathan Cameron 2022-03-16 16:50 ` Jonathan Cameron via 2022-03-16 17:16 ` Mark Cave-Ayland 2022-03-16 17:16 ` Mark Cave-Ayland 2022-03-16 17:58 ` Jonathan Cameron 2022-03-16 17:58 ` Jonathan Cameron via 2022-03-16 18:26 ` Jonathan Cameron 2022-03-16 18:26 ` Jonathan Cameron via 2022-03-17 8:12 ` Mark Cave-Ayland 2022-03-17 8:12 ` Mark Cave-Ayland 2022-03-17 16:47 ` Jonathan Cameron 2022-03-17 16:47 ` Jonathan Cameron via 2022-03-18 8:14 ` Mark Cave-Ayland 2022-03-18 8:14 ` Mark Cave-Ayland 2022-03-18 10:08 ` Jonathan Cameron 2022-03-18 10:08 ` Jonathan Cameron via
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